URL https://opencores.org/ocsvn/reed_solomon_decoder/reed_solomon_decoder/trunk

Subversion Repositories reed_solomon_decoder

[/] [reed_solomon_decoder/] [trunk/] [simulation/] [Makefile] - Blame information for rev 4

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MODULE=RS_dec
TESTBENCH=${MODULE}_tb.v
SOURCES=$(wildcard ../rtl/*.v)
 
all: sim
 
${MODULE}.vvp: ${TESTBENCH} ${SOURCES}
        iverilog ${TESTBENCH} ${SOURCES} -o $@
 
sim: ${MODULE}.vvp
        vvp -n ${MODULE}.vvp
 
clean:
        rm -f a.out ${MODULE}.vvp
 
all-clean: clean
        rm -f *~
 

Line No.	Rev	Author	Line
1	4	vk.semicon	`MODULE=RS_dec`
2			`TESTBENCH=${MODULE}_tb.v`
3			`SOURCES=$(wildcard ../rtl/*.v)`
4
5			`all: sim`
6
7			`${MODULE}.vvp: ${TESTBENCH} ${SOURCES}`
8			`iverilog ${TESTBENCH} ${SOURCES} -o $@`
9
10			`sim: ${MODULE}.vvp`
11			`vvp -n ${MODULE}.vvp`
12
13			`clean:`
14			`rm -f a.out ${MODULE}.vvp`
15
16			`all-clean: clean`
17			`rm -f *~`
18

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Subversion Repositories reed_solomon_decoder

[/] [reed_solomon_decoder/] [trunk/] [simulation/] [Makefile] - Blame information for rev 4