1 |
2 |
magro732 |
-------------------------------------------------------------------------------
|
2 |
|
|
--
|
3 |
|
|
-- RapidIO IP Library Core
|
4 |
|
|
--
|
5 |
|
|
-- This file is part of the RapidIO IP library project
|
6 |
|
|
-- http://www.opencores.org/cores/rio/
|
7 |
|
|
--
|
8 |
|
|
-- Description
|
9 |
|
|
-- Contains automatic simulation test code to verify a RioSwitch implementation.
|
10 |
|
|
--
|
11 |
|
|
-- To Do:
|
12 |
47 |
magro732 |
-- - Test all sizes of packets that go through the maintenance port.
|
13 |
51 |
magro732 |
-- - Make sure all testcases from the 1.0 branch is in here.
|
14 |
2 |
magro732 |
--
|
15 |
|
|
-- Author(s):
|
16 |
|
|
-- - Magnus Rosenius, magro732@opencores.org
|
17 |
|
|
--
|
18 |
|
|
-------------------------------------------------------------------------------
|
19 |
|
|
--
|
20 |
|
|
-- Copyright (C) 2013 Authors and OPENCORES.ORG
|
21 |
|
|
--
|
22 |
|
|
-- This source file may be used and distributed without
|
23 |
|
|
-- restriction provided that this copyright statement is not
|
24 |
|
|
-- removed from the file and that any derivative work contains
|
25 |
|
|
-- the original copyright notice and the associated disclaimer.
|
26 |
|
|
--
|
27 |
|
|
-- This source file is free software; you can redistribute it
|
28 |
|
|
-- and/or modify it under the terms of the GNU Lesser General
|
29 |
|
|
-- Public License as published by the Free Software Foundation;
|
30 |
|
|
-- either version 2.1 of the License, or (at your option) any
|
31 |
|
|
-- later version.
|
32 |
|
|
--
|
33 |
|
|
-- This source is distributed in the hope that it will be
|
34 |
|
|
-- useful, but WITHOUT ANY WARRANTY; without even the implied
|
35 |
|
|
-- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
36 |
|
|
-- PURPOSE. See the GNU Lesser General Public License for more
|
37 |
|
|
-- details.
|
38 |
|
|
--
|
39 |
|
|
-- You should have received a copy of the GNU Lesser General
|
40 |
|
|
-- Public License along with this source; if not, download it
|
41 |
|
|
-- from http://www.opencores.org/lgpl.shtml
|
42 |
|
|
--
|
43 |
|
|
-------------------------------------------------------------------------------
|
44 |
|
|
|
45 |
|
|
|
46 |
|
|
-------------------------------------------------------------------------------
|
47 |
|
|
-- TestRioSwitch.
|
48 |
|
|
-------------------------------------------------------------------------------
|
49 |
|
|
|
50 |
|
|
library ieee;
|
51 |
|
|
use ieee.std_logic_1164.all;
|
52 |
|
|
use ieee.numeric_std.all;
|
53 |
|
|
use ieee.math_real.all;
|
54 |
|
|
library std;
|
55 |
|
|
use std.textio.all;
|
56 |
|
|
use work.rio_common.all;
|
57 |
47 |
magro732 |
use work.TestPortPackage.all;
|
58 |
2 |
magro732 |
|
59 |
|
|
|
60 |
|
|
-------------------------------------------------------------------------------
|
61 |
|
|
-- Entity for TestRioSwitch.
|
62 |
|
|
-------------------------------------------------------------------------------
|
63 |
|
|
entity TestRioSwitch is
|
64 |
|
|
end entity;
|
65 |
|
|
|
66 |
|
|
|
67 |
|
|
-------------------------------------------------------------------------------
|
68 |
|
|
-- Architecture for TestRioSwitch.
|
69 |
|
|
-------------------------------------------------------------------------------
|
70 |
|
|
architecture TestRioSwitchImpl of TestRioSwitch is
|
71 |
|
|
|
72 |
|
|
component RioSwitch is
|
73 |
|
|
generic(
|
74 |
|
|
SWITCH_PORTS : natural range 3 to 255 := 4;
|
75 |
|
|
DEVICE_IDENTITY : std_logic_vector(15 downto 0);
|
76 |
|
|
DEVICE_VENDOR_IDENTITY : std_logic_vector(15 downto 0);
|
77 |
|
|
DEVICE_REV : std_logic_vector(31 downto 0);
|
78 |
|
|
ASSY_IDENTITY : std_logic_vector(15 downto 0);
|
79 |
|
|
ASSY_VENDOR_IDENTITY : std_logic_vector(15 downto 0);
|
80 |
|
|
ASSY_REV : std_logic_vector(15 downto 0));
|
81 |
|
|
port(
|
82 |
|
|
clk : in std_logic;
|
83 |
|
|
areset_n : in std_logic;
|
84 |
|
|
|
85 |
|
|
writeFrameFull_i : in Array1(SWITCH_PORTS-1 downto 0);
|
86 |
|
|
writeFrame_o : out Array1(SWITCH_PORTS-1 downto 0);
|
87 |
|
|
writeFrameAbort_o : out Array1(SWITCH_PORTS-1 downto 0);
|
88 |
|
|
writeContent_o : out Array1(SWITCH_PORTS-1 downto 0);
|
89 |
|
|
writeContentData_o : out Array32(SWITCH_PORTS-1 downto 0);
|
90 |
|
|
|
91 |
|
|
readFrameEmpty_i : in Array1(SWITCH_PORTS-1 downto 0);
|
92 |
|
|
readFrame_o : out Array1(SWITCH_PORTS-1 downto 0);
|
93 |
|
|
readContent_o : out Array1(SWITCH_PORTS-1 downto 0);
|
94 |
|
|
readContentEnd_i : in Array1(SWITCH_PORTS-1 downto 0);
|
95 |
|
|
readContentData_i : in Array32(SWITCH_PORTS-1 downto 0);
|
96 |
|
|
|
97 |
|
|
portLinkTimeout_o : out std_logic_vector(23 downto 0);
|
98 |
|
|
|
99 |
|
|
linkInitialized_i : in Array1(SWITCH_PORTS-1 downto 0);
|
100 |
|
|
outputPortEnable_o : out Array1(SWITCH_PORTS-1 downto 0);
|
101 |
|
|
inputPortEnable_o : out Array1(SWITCH_PORTS-1 downto 0);
|
102 |
|
|
|
103 |
|
|
localAckIdWrite_o : out Array1(SWITCH_PORTS-1 downto 0);
|
104 |
|
|
clrOutstandingAckId_o : out Array1(SWITCH_PORTS-1 downto 0);
|
105 |
|
|
inboundAckId_o : out Array5(SWITCH_PORTS-1 downto 0);
|
106 |
|
|
outstandingAckId_o : out Array5(SWITCH_PORTS-1 downto 0);
|
107 |
|
|
outboundAckId_o : out Array5(SWITCH_PORTS-1 downto 0);
|
108 |
|
|
inboundAckId_i : in Array5(SWITCH_PORTS-1 downto 0);
|
109 |
|
|
outstandingAckId_i : in Array5(SWITCH_PORTS-1 downto 0);
|
110 |
|
|
outboundAckId_i : in Array5(SWITCH_PORTS-1 downto 0);
|
111 |
|
|
|
112 |
|
|
configStb_o : out std_logic;
|
113 |
|
|
configWe_o : out std_logic;
|
114 |
|
|
configAddr_o : out std_logic_vector(23 downto 0);
|
115 |
|
|
configData_o : out std_logic_vector(31 downto 0);
|
116 |
47 |
magro732 |
configData_i : in std_logic_vector(31 downto 0);
|
117 |
|
|
configAck_i : in std_logic);
|
118 |
2 |
magro732 |
end component;
|
119 |
|
|
|
120 |
47 |
magro732 |
constant PORTS : natural := 3;
|
121 |
2 |
magro732 |
constant SWITCH_IDENTITY : std_logic_vector(15 downto 0) := x"0123";
|
122 |
|
|
constant SWITCH_VENDOR_IDENTITY : std_logic_vector(15 downto 0) := x"4567";
|
123 |
|
|
constant SWITCH_REV : std_logic_vector(31 downto 0) := x"89abcdef";
|
124 |
|
|
constant SWITCH_ASSY_IDENTITY : std_logic_vector(15 downto 0) := x"0011";
|
125 |
|
|
constant SWITCH_ASSY_VENDOR_IDENTITY : std_logic_vector(15 downto 0) := x"2233";
|
126 |
|
|
constant SWITCH_ASSY_REV : std_logic_vector(15 downto 0) := x"4455";
|
127 |
|
|
|
128 |
|
|
signal clk : std_logic;
|
129 |
|
|
signal areset_n : std_logic;
|
130 |
|
|
|
131 |
47 |
magro732 |
signal inboundEmpty : Array1(PORTS-1 downto 0);
|
132 |
|
|
signal inboundEmpty0 : std_logic;
|
133 |
|
|
signal inboundEmpty1 : std_logic;
|
134 |
|
|
signal inboundEmpty2 : std_logic;
|
135 |
|
|
signal inboundWrite : Array1(PORTS-1 downto 0);
|
136 |
|
|
signal inboundWrite0 : std_logic;
|
137 |
|
|
signal inboundWrite1 : std_logic;
|
138 |
|
|
signal inboundWrite2 : std_logic;
|
139 |
|
|
signal inboundMessage : TestPortMessagePacketBufferArray(PORTS-1 downto 0);
|
140 |
|
|
signal inboundMessage0 : TestPortMessagePacketBuffer;
|
141 |
|
|
signal inboundMessage1 : TestPortMessagePacketBuffer;
|
142 |
|
|
signal inboundMessage2 : TestPortMessagePacketBuffer;
|
143 |
|
|
signal inboundAck : Array1(PORTS-1 downto 0);
|
144 |
|
|
signal inboundAck0 : std_logic;
|
145 |
|
|
signal inboundAck1 : std_logic;
|
146 |
|
|
signal inboundAck2 : std_logic;
|
147 |
2 |
magro732 |
|
148 |
47 |
magro732 |
signal outboundEmpty : Array1(PORTS-1 downto 0);
|
149 |
|
|
signal outboundEmpty0 : std_logic;
|
150 |
|
|
signal outboundEmpty1 : std_logic;
|
151 |
|
|
signal outboundEmpty2 : std_logic;
|
152 |
|
|
signal outboundWrite : Array1(PORTS-1 downto 0);
|
153 |
|
|
signal outboundWrite0 : std_logic;
|
154 |
|
|
signal outboundWrite1 : std_logic;
|
155 |
|
|
signal outboundWrite2 : std_logic;
|
156 |
|
|
signal outboundMessage : TestPortMessagePacketBufferArray(PORTS-1 downto 0);
|
157 |
|
|
signal outboundMessage0 : TestPortMessagePacketBuffer;
|
158 |
|
|
signal outboundMessage1 : TestPortMessagePacketBuffer;
|
159 |
|
|
signal outboundMessage2 : TestPortMessagePacketBuffer;
|
160 |
|
|
signal outboundAck : Array1(PORTS-1 downto 0);
|
161 |
|
|
signal outboundAck0 : std_logic;
|
162 |
|
|
signal outboundAck1 : std_logic;
|
163 |
|
|
signal outboundAck2 : std_logic;
|
164 |
|
|
|
165 |
2 |
magro732 |
signal writeFrameFull : Array1(PORTS-1 downto 0);
|
166 |
|
|
signal writeFrame : Array1(PORTS-1 downto 0);
|
167 |
|
|
signal writeFrameAbort : Array1(PORTS-1 downto 0);
|
168 |
|
|
signal writeContent : Array1(PORTS-1 downto 0);
|
169 |
|
|
signal writeContentData : Array32(PORTS-1 downto 0);
|
170 |
|
|
|
171 |
|
|
signal readFrameEmpty : Array1(PORTS-1 downto 0);
|
172 |
|
|
signal readFrame : Array1(PORTS-1 downto 0);
|
173 |
|
|
signal readContent : Array1(PORTS-1 downto 0);
|
174 |
|
|
signal readContentEnd : Array1(PORTS-1 downto 0);
|
175 |
|
|
signal readContentData : Array32(PORTS-1 downto 0);
|
176 |
|
|
|
177 |
|
|
signal portLinkTimeout : std_logic_vector(23 downto 0);
|
178 |
|
|
|
179 |
|
|
signal linkInitialized : Array1(PORTS-1 downto 0);
|
180 |
|
|
signal outputPortEnable : Array1(PORTS-1 downto 0);
|
181 |
|
|
signal inputPortEnable : Array1(PORTS-1 downto 0);
|
182 |
|
|
|
183 |
|
|
signal localAckIdWrite : Array1(PORTS-1 downto 0);
|
184 |
|
|
signal clrOutstandingAckId : Array1(PORTS-1 downto 0);
|
185 |
|
|
signal inboundAckIdWrite : Array5(PORTS-1 downto 0);
|
186 |
|
|
signal outstandingAckIdWrite : Array5(PORTS-1 downto 0);
|
187 |
|
|
signal outboundAckIdWrite : Array5(PORTS-1 downto 0);
|
188 |
|
|
signal inboundAckIdRead : Array5(PORTS-1 downto 0);
|
189 |
|
|
signal outstandingAckIdRead : Array5(PORTS-1 downto 0);
|
190 |
|
|
signal outboundAckIdRead : Array5(PORTS-1 downto 0);
|
191 |
|
|
|
192 |
47 |
magro732 |
signal messageEmpty : std_logic;
|
193 |
|
|
signal messageWrite : std_logic;
|
194 |
|
|
signal message : TestPortMessageWishbone;
|
195 |
|
|
signal messageAck : std_logic;
|
196 |
|
|
|
197 |
|
|
signal configStb : std_logic;
|
198 |
|
|
signal configWe : std_logic;
|
199 |
|
|
signal configAddr : std_logic_vector(23 downto 0);
|
200 |
|
|
signal configDataWrite : std_logic_vector(31 downto 0);
|
201 |
|
|
signal configDataRead : std_logic_vector(31 downto 0);
|
202 |
|
|
signal configAck : std_logic;
|
203 |
2 |
magro732 |
|
204 |
|
|
begin
|
205 |
|
|
|
206 |
|
|
-----------------------------------------------------------------------------
|
207 |
|
|
-- Clock generation.
|
208 |
|
|
-----------------------------------------------------------------------------
|
209 |
|
|
ClockGenerator: process
|
210 |
|
|
begin
|
211 |
|
|
clk <= '0';
|
212 |
|
|
wait for 20 ns;
|
213 |
|
|
clk <= '1';
|
214 |
|
|
wait for 20 ns;
|
215 |
|
|
end process;
|
216 |
|
|
|
217 |
|
|
|
218 |
|
|
-----------------------------------------------------------------------------
|
219 |
|
|
-- Serial port emulator.
|
220 |
|
|
-----------------------------------------------------------------------------
|
221 |
|
|
TestDriver: process
|
222 |
|
|
|
223 |
|
|
---------------------------------------------------------------------------
|
224 |
|
|
--
|
225 |
|
|
---------------------------------------------------------------------------
|
226 |
|
|
procedure SendFrame(constant portIndex : natural range 0 to 7;
|
227 |
|
|
constant frame : RioFrame) is
|
228 |
|
|
begin
|
229 |
47 |
magro732 |
-- Crappy Modelsim cannot handle arrays of signals...
|
230 |
|
|
case portIndex is
|
231 |
|
|
when 0 =>
|
232 |
|
|
TestPortPacketBufferWrite(inboundWrite0, inboundMessage0, inboundAck0,
|
233 |
|
|
frame, false);
|
234 |
|
|
when 1 =>
|
235 |
|
|
TestPortPacketBufferWrite(inboundWrite1, inboundMessage1, inboundAck1,
|
236 |
|
|
frame, false);
|
237 |
|
|
when others =>
|
238 |
|
|
TestPortPacketBufferWrite(inboundWrite2, inboundMessage2, inboundAck2,
|
239 |
|
|
frame, false);
|
240 |
|
|
end case;
|
241 |
2 |
magro732 |
end procedure;
|
242 |
|
|
|
243 |
|
|
---------------------------------------------------------------------------
|
244 |
|
|
--
|
245 |
|
|
---------------------------------------------------------------------------
|
246 |
|
|
procedure ReceiveFrame(constant portIndex : natural range 0 to 7;
|
247 |
|
|
constant frame : RioFrame) is
|
248 |
|
|
begin
|
249 |
47 |
magro732 |
-- Crappy Modelsim cannot handle arrays of signals...
|
250 |
|
|
case portIndex is
|
251 |
|
|
when 0 =>
|
252 |
|
|
TestPortPacketBufferWrite(outboundWrite0, outboundMessage0, outboundAck0,
|
253 |
|
|
frame, false);
|
254 |
|
|
when 1 =>
|
255 |
|
|
TestPortPacketBufferWrite(outboundWrite1, outboundMessage1, outboundAck1,
|
256 |
|
|
frame, false);
|
257 |
|
|
when others =>
|
258 |
|
|
TestPortPacketBufferWrite(outboundWrite2, outboundMessage2, outboundAck2,
|
259 |
|
|
frame, false);
|
260 |
|
|
end case;
|
261 |
2 |
magro732 |
end procedure;
|
262 |
|
|
|
263 |
|
|
---------------------------------------------------------------------------
|
264 |
|
|
--
|
265 |
|
|
---------------------------------------------------------------------------
|
266 |
47 |
magro732 |
procedure SendFrame(constant portIndex : natural range 0 to 7;
|
267 |
|
|
constant sourceId : std_logic_vector(15 downto 0);
|
268 |
|
|
constant destinationId : std_logic_vector(15 downto 0);
|
269 |
|
|
constant payload : RioPayload) is
|
270 |
|
|
variable frame : RioFrame;
|
271 |
|
|
begin
|
272 |
|
|
frame := RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
273 |
|
|
tt=>"01", ftype=>"0000",
|
274 |
|
|
sourceId=>sourceId, destId=>destinationId,
|
275 |
|
|
payload=>payload);
|
276 |
|
|
SendFrame(portIndex, frame);
|
277 |
|
|
end procedure;
|
278 |
|
|
|
279 |
|
|
---------------------------------------------------------------------------
|
280 |
|
|
--
|
281 |
|
|
---------------------------------------------------------------------------
|
282 |
|
|
procedure ReceiveFrame(constant portIndex : natural range 0 to 7;
|
283 |
|
|
constant sourceId : std_logic_vector(15 downto 0);
|
284 |
|
|
constant destinationId : std_logic_vector(15 downto 0);
|
285 |
|
|
constant payload : RioPayload) is
|
286 |
|
|
variable frame : RioFrame;
|
287 |
|
|
begin
|
288 |
|
|
frame := RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
289 |
|
|
tt=>"01", ftype=>"0000",
|
290 |
|
|
sourceId=>sourceId, destId=>destinationId,
|
291 |
|
|
payload=>payload);
|
292 |
|
|
ReceiveFrame(portIndex, frame);
|
293 |
|
|
end procedure;
|
294 |
|
|
|
295 |
|
|
---------------------------------------------------------------------------
|
296 |
|
|
--
|
297 |
|
|
---------------------------------------------------------------------------
|
298 |
2 |
magro732 |
procedure ReadConfig32(constant portIndex : natural range 0 to 7;
|
299 |
|
|
constant destinationId : std_logic_vector(15 downto 0);
|
300 |
|
|
constant sourceId : std_logic_vector(15 downto 0);
|
301 |
|
|
constant hop : std_logic_vector(7 downto 0);
|
302 |
|
|
constant tid : std_logic_vector(7 downto 0);
|
303 |
|
|
constant address : std_logic_vector(23 downto 0);
|
304 |
|
|
constant data : std_logic_vector(31 downto 0)) is
|
305 |
|
|
variable maintData : DoubleWordArray(0 to 7);
|
306 |
|
|
begin
|
307 |
|
|
SendFrame(portIndex, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
308 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
309 |
|
|
sourceId=>sourceId, destId=>destinationId,
|
310 |
|
|
payload=>RioMaintenance(transaction=>"0000",
|
311 |
|
|
size=>"1000",
|
312 |
|
|
tid=>tid,
|
313 |
|
|
hopCount=>hop,
|
314 |
|
|
configOffset=>address(23 downto 3),
|
315 |
|
|
wdptr=>address(2),
|
316 |
|
|
dataLength=>0,
|
317 |
|
|
data=>maintData)));
|
318 |
|
|
if (address(2) = '0') then
|
319 |
|
|
maintData(0) := data & x"00000000";
|
320 |
|
|
else
|
321 |
|
|
maintData(0) := x"00000000" & data ;
|
322 |
|
|
end if;
|
323 |
|
|
|
324 |
|
|
ReceiveFrame(portIndex, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
325 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
326 |
|
|
sourceId=>destinationId, destId=>sourceId,
|
327 |
|
|
payload=>RioMaintenance(transaction=>"0010",
|
328 |
|
|
size=>"0000",
|
329 |
|
|
tid=>tid,
|
330 |
|
|
hopCount=>x"ff",
|
331 |
|
|
configOffset=>"000000000000000000000",
|
332 |
|
|
wdptr=>'0',
|
333 |
|
|
dataLength=>1,
|
334 |
|
|
data=>maintData)));
|
335 |
|
|
end procedure;
|
336 |
|
|
|
337 |
|
|
---------------------------------------------------------------------------
|
338 |
|
|
--
|
339 |
|
|
---------------------------------------------------------------------------
|
340 |
|
|
procedure WriteConfig32(constant portIndex : natural range 0 to 7;
|
341 |
|
|
constant destinationId : std_logic_vector(15 downto 0);
|
342 |
|
|
constant sourceId : std_logic_vector(15 downto 0);
|
343 |
|
|
constant hop : std_logic_vector(7 downto 0);
|
344 |
|
|
constant tid : std_logic_vector(7 downto 0);
|
345 |
|
|
constant address : std_logic_vector(23 downto 0);
|
346 |
|
|
constant data : std_logic_vector(31 downto 0)) is
|
347 |
|
|
variable maintData : DoubleWordArray(0 to 7);
|
348 |
|
|
begin
|
349 |
|
|
if (address(2) = '0') then
|
350 |
|
|
maintData(0) := data & x"00000000";
|
351 |
|
|
else
|
352 |
|
|
maintData(0) := x"00000000" & data ;
|
353 |
|
|
end if;
|
354 |
|
|
|
355 |
|
|
SendFrame(portIndex, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
356 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
357 |
|
|
sourceId=>sourceId, destId=>destinationId,
|
358 |
|
|
payload=>RioMaintenance(transaction=>"0001",
|
359 |
|
|
size=>"1000",
|
360 |
|
|
tid=>tid,
|
361 |
|
|
hopCount=>hop,
|
362 |
|
|
configOffset=>address(23 downto 3),
|
363 |
|
|
wdptr=>address(2),
|
364 |
|
|
dataLength=>1,
|
365 |
|
|
data=>maintData)));
|
366 |
|
|
|
367 |
|
|
ReceiveFrame(portIndex, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
368 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
369 |
|
|
sourceId=>destinationId, destId=>sourceId,
|
370 |
|
|
payload=>RioMaintenance(transaction=>"0011",
|
371 |
|
|
size=>"0000",
|
372 |
|
|
tid=>tid,
|
373 |
|
|
hopCount=>x"ff",
|
374 |
|
|
configOffset=>"000000000000000000000",
|
375 |
|
|
wdptr=>'0',
|
376 |
|
|
dataLength=>0,
|
377 |
|
|
data=>maintData)));
|
378 |
|
|
end procedure;
|
379 |
|
|
|
380 |
|
|
---------------------------------------------------------------------------
|
381 |
51 |
magro732 |
-- Set a route table entry.
|
382 |
|
|
---------------------------------------------------------------------------
|
383 |
|
|
procedure RouteSet(constant deviceId : std_logic_vector(15 downto 0);
|
384 |
|
|
constant portIndex : std_logic_vector(7 downto 0)) is
|
385 |
|
|
variable frame : RioFrame;
|
386 |
|
|
begin
|
387 |
|
|
WriteConfig32(portIndex=>0, destinationId=>x"ffff", sourceId=>x"ffff", hop=>x"00",
|
388 |
|
|
tid=>x"de", address=>x"000070", data=>(x"0000" & deviceId));
|
389 |
|
|
WriteConfig32(portIndex=>0, destinationId=>x"ffff", sourceId=>x"ffff", hop=>x"00",
|
390 |
|
|
tid=>x"ad", address=>x"000074", data=>(x"000000" & portIndex));
|
391 |
|
|
end procedure;
|
392 |
|
|
|
393 |
|
|
---------------------------------------------------------------------------
|
394 |
|
|
-- Set the default route table entry.
|
395 |
|
|
---------------------------------------------------------------------------
|
396 |
|
|
procedure RouteSetDefault(constant portIndex : std_logic_vector(7 downto 0)) is
|
397 |
|
|
variable frame : RioFrame;
|
398 |
|
|
begin
|
399 |
|
|
WriteConfig32(portIndex=>0, destinationId=>x"ffff", sourceId=>x"ffff", hop=>x"00",
|
400 |
|
|
tid=>x"ad", address=>x"000078", data=>(x"000000" & portIndex));
|
401 |
|
|
end procedure;
|
402 |
|
|
|
403 |
|
|
---------------------------------------------------------------------------
|
404 |
2 |
magro732 |
--
|
405 |
|
|
---------------------------------------------------------------------------
|
406 |
|
|
procedure RouteFrame(constant sourcePortIndex : natural range 0 to 7;
|
407 |
|
|
constant destinationPortIndex : natural range 0 to 7;
|
408 |
|
|
constant sourceId : std_logic_vector(15 downto 0);
|
409 |
|
|
constant destinationId : std_logic_vector(15 downto 0);
|
410 |
|
|
constant payload : RioPayload) is
|
411 |
|
|
variable frame : RioFrame;
|
412 |
|
|
begin
|
413 |
|
|
frame := RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
414 |
|
|
tt=>"01", ftype=>"0000",
|
415 |
47 |
magro732 |
destId=>destinationId, sourceId=>sourceId,
|
416 |
2 |
magro732 |
payload=>payload);
|
417 |
|
|
|
418 |
47 |
magro732 |
ReceiveFrame(destinationPortIndex, frame);
|
419 |
|
|
SendFrame(sourcePortIndex, frame);
|
420 |
2 |
magro732 |
end procedure;
|
421 |
47 |
magro732 |
|
422 |
2 |
magro732 |
---------------------------------------------------------------------------
|
423 |
|
|
--
|
424 |
|
|
---------------------------------------------------------------------------
|
425 |
47 |
magro732 |
procedure ExchangeFrames is
|
426 |
2 |
magro732 |
begin
|
427 |
47 |
magro732 |
TestWait(inboundEmpty0, '1', "port0 frame sent");
|
428 |
|
|
TestWait(inboundEmpty1, '1', "port0 frame sent");
|
429 |
|
|
TestWait(inboundEmpty2, '1', "port0 frame sent");
|
430 |
|
|
TestWait(outboundEmpty0, '1', "port0 frame received");
|
431 |
|
|
TestWait(outboundEmpty1, '1', "port0 frame received");
|
432 |
|
|
TestWait(outboundEmpty2, '1', "port0 frame received");
|
433 |
2 |
magro732 |
end procedure;
|
434 |
47 |
magro732 |
|
435 |
2 |
magro732 |
---------------------------------------------------------------------------
|
436 |
|
|
--
|
437 |
|
|
---------------------------------------------------------------------------
|
438 |
47 |
magro732 |
procedure ConfigRead(constant address : std_logic_vector(23 downto 0);
|
439 |
|
|
constant data : std_logic_vector(31 downto 0)) is
|
440 |
2 |
magro732 |
begin
|
441 |
47 |
magro732 |
TestPortWishboneWrite(writeSignal=>messageWrite,
|
442 |
|
|
messageSignal=>message,
|
443 |
|
|
ackSignal=>messageAck,
|
444 |
|
|
writeAccess=>false,
|
445 |
|
|
address=>(x"00000000" & x"00" & address),
|
446 |
|
|
byteSelect=>x"00",
|
447 |
|
|
data=>(x"00000000" & data),
|
448 |
|
|
latency=>3);
|
449 |
2 |
magro732 |
end procedure;
|
450 |
47 |
magro732 |
procedure ConfigWrite(constant address : std_logic_vector(23 downto 0);
|
451 |
|
|
constant data : std_logic_vector(31 downto 0)) is
|
452 |
|
|
begin
|
453 |
|
|
TestPortWishboneWrite(writeSignal=>messageWrite,
|
454 |
|
|
messageSignal=>message,
|
455 |
|
|
ackSignal=>messageAck,
|
456 |
|
|
writeAccess=>true,
|
457 |
|
|
address=>(x"00000000" & x"00" & address),
|
458 |
|
|
byteSelect=>x"00",
|
459 |
|
|
data=>(x"00000000" & data),
|
460 |
|
|
latency=>3);
|
461 |
|
|
end procedure;
|
462 |
|
|
|
463 |
2 |
magro732 |
-- These variabels are needed for the random number generation.
|
464 |
|
|
variable seed1 : positive := 1;
|
465 |
|
|
variable seed2: positive := 1;
|
466 |
|
|
|
467 |
47 |
magro732 |
variable maintData : DoubleWordArray(0 to 7);
|
468 |
2 |
magro732 |
variable data : DoubleWordArray(0 to 31);
|
469 |
|
|
variable randomPayload : RioPayload;
|
470 |
|
|
variable randomPayload1 : RioPayload;
|
471 |
|
|
variable randomPayload2 : RioPayload;
|
472 |
47 |
magro732 |
variable frame : RioFrame;
|
473 |
2 |
magro732 |
|
474 |
|
|
begin
|
475 |
|
|
areset_n <= '0';
|
476 |
|
|
|
477 |
|
|
linkInitialized <= (others=>'0');
|
478 |
|
|
|
479 |
47 |
magro732 |
writeFrameFull <= (others=>'0');
|
480 |
2 |
magro732 |
for portIndex in 0 to PORTS-1 loop
|
481 |
47 |
magro732 |
inboundWrite0 <= '0';
|
482 |
|
|
outboundWrite0 <= '0';
|
483 |
|
|
inboundWrite1 <= '0';
|
484 |
|
|
outboundWrite1 <= '0';
|
485 |
|
|
inboundWrite2 <= '0';
|
486 |
|
|
outboundWrite2 <= '0';
|
487 |
2 |
magro732 |
localAckIdWrite(portIndex) <= '0';
|
488 |
|
|
clrOutstandingAckId(portIndex) <= '0';
|
489 |
|
|
inboundAckIdWrite(portIndex) <= (others=>'0');
|
490 |
|
|
outstandingAckIdWrite(portIndex) <= (others=>'0');
|
491 |
|
|
outboundAckIdWrite(portIndex) <= (others=>'0');
|
492 |
|
|
end loop;
|
493 |
|
|
|
494 |
|
|
wait until clk'event and clk = '1';
|
495 |
|
|
wait until clk'event and clk = '1';
|
496 |
|
|
areset_n <= '1';
|
497 |
|
|
wait until clk'event and clk = '1';
|
498 |
|
|
wait until clk'event and clk = '1';
|
499 |
|
|
|
500 |
|
|
---------------------------------------------------------------------------
|
501 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
502 |
|
|
TestSpec("TG_RioSwitch");
|
503 |
|
|
TestSpec("-----------------------------------------------------------------");
|
504 |
|
|
TestSpec("TG_RioSwitch-TC1");
|
505 |
|
|
TestSpec("Description: Test switch maintenance accesses on different ports.");
|
506 |
|
|
TestSpec("Requirement: XXXXX");
|
507 |
|
|
TestSpec("-----------------------------------------------------------------");
|
508 |
|
|
TestSpec("Step 1:");
|
509 |
|
|
TestSpec("Action: Send maintenance read request packets to read switch identity.");
|
510 |
|
|
TestSpec("Result: The switch should answer with its configured identitiy.");
|
511 |
2 |
magro732 |
---------------------------------------------------------------------------
|
512 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC1-Step1");
|
513 |
2 |
magro732 |
---------------------------------------------------------------------------
|
514 |
|
|
|
515 |
|
|
ReadConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
516 |
|
|
tid=>x"00", address=>x"000000", data=>(SWITCH_IDENTITY & SWITCH_VENDOR_IDENTITY));
|
517 |
|
|
ReadConfig32(portIndex=>1, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
518 |
|
|
tid=>x"01", address=>x"000004", data=>SWITCH_REV);
|
519 |
|
|
ReadConfig32(portIndex=>2, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
520 |
|
|
tid=>x"02", address=>x"000008", data=>(SWITCH_ASSY_IDENTITY & SWITCH_ASSY_VENDOR_IDENTITY));
|
521 |
|
|
ReadConfig32(portIndex=>3, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
522 |
|
|
tid=>x"03", address=>x"00000c", data=>(SWITCH_ASSY_REV & x"0100"));
|
523 |
|
|
|
524 |
47 |
magro732 |
ExchangeFrames;
|
525 |
|
|
|
526 |
2 |
magro732 |
---------------------------------------------------------------------------
|
527 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
528 |
|
|
TestSpec("Step 2:");
|
529 |
|
|
TestSpec("Action: Check the switch Processing Element Features.");
|
530 |
|
|
TestSpec("Result: The expected switch features should be returned. ");
|
531 |
|
|
TestSpec(" Switch with extended features pointer valid. Common ");
|
532 |
|
|
TestSpec(" transport large system support and standard route table ");
|
533 |
|
|
TestSpec(" configuration support.");
|
534 |
2 |
magro732 |
---------------------------------------------------------------------------
|
535 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC1-Step2");
|
536 |
2 |
magro732 |
---------------------------------------------------------------------------
|
537 |
|
|
|
538 |
|
|
ReadConfig32(portIndex=>4, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
539 |
|
|
tid=>x"04", address=>x"000010", data=>x"10000118");
|
540 |
|
|
|
541 |
47 |
magro732 |
ExchangeFrames;
|
542 |
|
|
|
543 |
2 |
magro732 |
---------------------------------------------------------------------------
|
544 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
545 |
|
|
TestSpec("Step 3:");
|
546 |
|
|
TestSpec("Action: Check the switch port information.");
|
547 |
|
|
TestSpec("Result: The expected port and number of ports should be returned.");
|
548 |
2 |
magro732 |
---------------------------------------------------------------------------
|
549 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC1-Step3");
|
550 |
2 |
magro732 |
---------------------------------------------------------------------------
|
551 |
|
|
|
552 |
47 |
magro732 |
ReadConfig32(portIndex=>2, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
553 |
|
|
tid=>x"05", address=>x"000014", data=>x"00000302");
|
554 |
2 |
magro732 |
|
555 |
47 |
magro732 |
ExchangeFrames;
|
556 |
|
|
|
557 |
2 |
magro732 |
---------------------------------------------------------------------------
|
558 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
559 |
|
|
TestSpec("Step 4:");
|
560 |
|
|
TestSpec("Action: Check the switch number of supported routes.");
|
561 |
|
|
TestSpec("Result: The expected number of supported routes should be returned.");
|
562 |
2 |
magro732 |
---------------------------------------------------------------------------
|
563 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC1-Step4");
|
564 |
2 |
magro732 |
---------------------------------------------------------------------------
|
565 |
|
|
|
566 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
567 |
|
|
tid=>x"06", address=>x"000034", data=>x"00000800");
|
568 |
|
|
|
569 |
47 |
magro732 |
ExchangeFrames;
|
570 |
|
|
|
571 |
2 |
magro732 |
---------------------------------------------------------------------------
|
572 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
573 |
|
|
TestSpec("Step 5:");
|
574 |
|
|
TestSpec("Action: Test host base device id lock by reading it, then hold it ");
|
575 |
|
|
TestSpec(" and try to grab it from another address.");
|
576 |
|
|
TestSpec("Result: The value should follow the specification.");
|
577 |
2 |
magro732 |
---------------------------------------------------------------------------
|
578 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC1-Step5");
|
579 |
2 |
magro732 |
---------------------------------------------------------------------------
|
580 |
|
|
|
581 |
|
|
-- Check that the lock is released.
|
582 |
|
|
ReadConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
583 |
|
|
tid=>x"00", address=>x"000068", data=>x"0000ffff");
|
584 |
|
|
|
585 |
|
|
-- Try to accuire the lock.
|
586 |
|
|
WriteConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
587 |
48 |
magro732 |
tid=>x"01", address=>x"000068", data=>x"00000002");
|
588 |
2 |
magro732 |
|
589 |
|
|
-- Check that the lock has been accuired.
|
590 |
|
|
ReadConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
591 |
48 |
magro732 |
tid=>x"02", address=>x"000068", data=>x"00000002");
|
592 |
2 |
magro732 |
|
593 |
|
|
-- Try to accuire the lock from another source.
|
594 |
|
|
WriteConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
595 |
48 |
magro732 |
tid=>x"03", address=>x"000068", data=>x"00000003");
|
596 |
2 |
magro732 |
|
597 |
|
|
-- Check that the lock refuses the new access.
|
598 |
|
|
ReadConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
599 |
48 |
magro732 |
tid=>x"04", address=>x"000068", data=>x"00000002");
|
600 |
2 |
magro732 |
|
601 |
|
|
-- Release the lock.
|
602 |
|
|
WriteConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
603 |
48 |
magro732 |
tid=>x"05", address=>x"000068", data=>x"00000002");
|
604 |
2 |
magro732 |
|
605 |
|
|
-- Check that the lock is released.
|
606 |
|
|
ReadConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
607 |
48 |
magro732 |
tid=>x"06", address=>x"000068", data=>x"0000ffff");
|
608 |
2 |
magro732 |
|
609 |
|
|
-- Check that the lock can be accuired from another source once unlocked.
|
610 |
|
|
WriteConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
611 |
48 |
magro732 |
tid=>x"07", address=>x"000068", data=>x"00000003");
|
612 |
2 |
magro732 |
|
613 |
|
|
-- Check that the lock is released.
|
614 |
|
|
ReadConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
615 |
48 |
magro732 |
tid=>x"08", address=>x"000068", data=>x"00000003");
|
616 |
2 |
magro732 |
|
617 |
|
|
-- Release the lock again.
|
618 |
|
|
WriteConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
619 |
48 |
magro732 |
tid=>x"09", address=>x"000068", data=>x"00000003");
|
620 |
2 |
magro732 |
|
621 |
|
|
-- Check that the lock is released.
|
622 |
|
|
ReadConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
623 |
48 |
magro732 |
tid=>x"0a", address=>x"000068", data=>x"0000ffff");
|
624 |
2 |
magro732 |
|
625 |
47 |
magro732 |
ExchangeFrames;
|
626 |
|
|
|
627 |
2 |
magro732 |
---------------------------------------------------------------------------
|
628 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
629 |
|
|
TestSpec("Step 6");
|
630 |
|
|
TestSpec("Action: Check the component tag register.");
|
631 |
|
|
TestSpec("Result: The written value in the component tag should be saved.");
|
632 |
2 |
magro732 |
---------------------------------------------------------------------------
|
633 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC1-Step6");
|
634 |
2 |
magro732 |
---------------------------------------------------------------------------
|
635 |
|
|
|
636 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
637 |
|
|
tid=>x"06", address=>x"00006c", data=>x"00000000");
|
638 |
|
|
|
639 |
|
|
WriteConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
640 |
|
|
tid=>x"06", address=>x"00006c", data=>x"ffffffff");
|
641 |
|
|
|
642 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
643 |
|
|
tid=>x"06", address=>x"00006c", data=>x"ffffffff");
|
644 |
|
|
|
645 |
47 |
magro732 |
ExchangeFrames;
|
646 |
|
|
|
647 |
2 |
magro732 |
---------------------------------------------------------------------------
|
648 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
649 |
|
|
TestSpec("Step 7");
|
650 |
|
|
TestSpec("Action: Read and write to the port link timeout.");
|
651 |
|
|
TestSpec("Result: Check that the portLinkTimeout output from the switch changes.");
|
652 |
2 |
magro732 |
---------------------------------------------------------------------------
|
653 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC1-Step7");
|
654 |
2 |
magro732 |
---------------------------------------------------------------------------
|
655 |
|
|
|
656 |
|
|
assert portLinkTimeout = x"ffffff" report "Unexpected portLinkTimeout." severity error;
|
657 |
|
|
|
658 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
659 |
|
|
tid=>x"06", address=>x"000120", data=>x"ffffff00");
|
660 |
|
|
|
661 |
|
|
WriteConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
662 |
|
|
tid=>x"06", address=>x"000120", data=>x"00000100");
|
663 |
|
|
|
664 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
665 |
|
|
tid=>x"06", address=>x"000120", data=>x"00000100");
|
666 |
|
|
|
667 |
47 |
magro732 |
ExchangeFrames;
|
668 |
|
|
|
669 |
2 |
magro732 |
assert portLinkTimeout = x"000001" report "Unexpected portLinkTimeout." severity error;
|
670 |
|
|
|
671 |
|
|
---------------------------------------------------------------------------
|
672 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
673 |
|
|
TestSpec("Step 8");
|
674 |
|
|
TestSpec("Action: Read from the port general control.");
|
675 |
|
|
TestSpec("Result: Check the discovered bit.");
|
676 |
2 |
magro732 |
---------------------------------------------------------------------------
|
677 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC1-Step8");
|
678 |
2 |
magro732 |
---------------------------------------------------------------------------
|
679 |
|
|
|
680 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
681 |
|
|
tid=>x"06", address=>x"00013c", data=>x"00000000");
|
682 |
|
|
|
683 |
|
|
WriteConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
684 |
|
|
tid=>x"06", address=>x"00013c", data=>x"20000000");
|
685 |
|
|
|
686 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
687 |
|
|
tid=>x"06", address=>x"00013c", data=>x"20000000");
|
688 |
|
|
|
689 |
|
|
WriteConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
690 |
|
|
tid=>x"06", address=>x"00013c", data=>x"00000000");
|
691 |
|
|
|
692 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
693 |
|
|
tid=>x"06", address=>x"00013c", data=>x"00000000");
|
694 |
|
|
|
695 |
47 |
magro732 |
ExchangeFrames;
|
696 |
|
|
|
697 |
2 |
magro732 |
---------------------------------------------------------------------------
|
698 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
699 |
|
|
TestSpec("Step 9");
|
700 |
|
|
TestSpec("Action: Read from the port N error and status.");
|
701 |
|
|
TestSpec("Result: Check the port ok and port uninitialized bits.");
|
702 |
2 |
magro732 |
---------------------------------------------------------------------------
|
703 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC1-Step9");
|
704 |
2 |
magro732 |
---------------------------------------------------------------------------
|
705 |
|
|
|
706 |
|
|
linkInitialized(0) <= '0';
|
707 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
708 |
|
|
tid=>x"06", address=>x"000158", data=>x"00000001");
|
709 |
47 |
magro732 |
ExchangeFrames;
|
710 |
2 |
magro732 |
linkInitialized(0) <= '1';
|
711 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
712 |
|
|
tid=>x"06", address=>x"000158", data=>x"00000002");
|
713 |
47 |
magro732 |
ExchangeFrames;
|
714 |
2 |
magro732 |
|
715 |
|
|
linkInitialized(1) <= '0';
|
716 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
717 |
|
|
tid=>x"06", address=>x"000178", data=>x"00000001");
|
718 |
47 |
magro732 |
ExchangeFrames;
|
719 |
2 |
magro732 |
linkInitialized(1) <= '1';
|
720 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
721 |
|
|
tid=>x"06", address=>x"000178", data=>x"00000002");
|
722 |
47 |
magro732 |
ExchangeFrames;
|
723 |
2 |
magro732 |
|
724 |
|
|
linkInitialized(2) <= '0';
|
725 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
726 |
|
|
tid=>x"06", address=>x"000198", data=>x"00000001");
|
727 |
47 |
magro732 |
ExchangeFrames;
|
728 |
2 |
magro732 |
linkInitialized(2) <= '1';
|
729 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
730 |
|
|
tid=>x"06", address=>x"000198", data=>x"00000002");
|
731 |
47 |
magro732 |
ExchangeFrames;
|
732 |
2 |
magro732 |
|
733 |
|
|
---------------------------------------------------------------------------
|
734 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
735 |
|
|
TestSpec("Step 10");
|
736 |
|
|
TestSpec("Action: Read and write to/from the port N control.");
|
737 |
|
|
TestSpec("Result: Check the output/input port enable.");
|
738 |
2 |
magro732 |
---------------------------------------------------------------------------
|
739 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC1-Step10");
|
740 |
2 |
magro732 |
---------------------------------------------------------------------------
|
741 |
|
|
|
742 |
|
|
assert outputPortEnable(0) = '0' report "Unexpected outputPortEnable." severity error;
|
743 |
|
|
assert inputPortEnable(0) = '0' report "Unexpected inputPortEnable." severity error;
|
744 |
|
|
|
745 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
746 |
|
|
tid=>x"06", address=>x"00015c", data=>x"00000001");
|
747 |
|
|
|
748 |
|
|
WriteConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
749 |
|
|
tid=>x"06", address=>x"00015c", data=>x"00600001");
|
750 |
|
|
|
751 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
752 |
|
|
tid=>x"06", address=>x"00015c", data=>x"00600001");
|
753 |
|
|
|
754 |
47 |
magro732 |
ExchangeFrames;
|
755 |
|
|
|
756 |
2 |
magro732 |
assert outputPortEnable(0) = '1' report "Unexpected outputPortEnable." severity error;
|
757 |
|
|
assert inputPortEnable(0) = '1' report "Unexpected inputPortEnable." severity error;
|
758 |
|
|
|
759 |
|
|
---------------------------------------------------------------------------
|
760 |
|
|
|
761 |
|
|
assert outputPortEnable(1) = '0' report "Unexpected outputPortEnable." severity error;
|
762 |
|
|
assert inputPortEnable(1) = '0' report "Unexpected inputPortEnable." severity error;
|
763 |
|
|
|
764 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
765 |
|
|
tid=>x"06", address=>x"00017c", data=>x"00000001");
|
766 |
|
|
|
767 |
|
|
WriteConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
768 |
|
|
tid=>x"06", address=>x"00017c", data=>x"00600001");
|
769 |
|
|
|
770 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
771 |
|
|
tid=>x"06", address=>x"00017c", data=>x"00600001");
|
772 |
|
|
|
773 |
47 |
magro732 |
ExchangeFrames;
|
774 |
|
|
|
775 |
2 |
magro732 |
assert outputPortEnable(1) = '1' report "Unexpected outputPortEnable." severity error;
|
776 |
|
|
assert inputPortEnable(1) = '1' report "Unexpected inputPortEnable." severity error;
|
777 |
|
|
|
778 |
|
|
---------------------------------------------------------------------------
|
779 |
|
|
|
780 |
|
|
assert outputPortEnable(2) = '0' report "Unexpected outputPortEnable." severity error;
|
781 |
|
|
assert inputPortEnable(2) = '0' report "Unexpected inputPortEnable." severity error;
|
782 |
|
|
|
783 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
784 |
|
|
tid=>x"06", address=>x"00019c", data=>x"00000001");
|
785 |
|
|
|
786 |
|
|
WriteConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
787 |
|
|
tid=>x"06", address=>x"00019c", data=>x"00600001");
|
788 |
|
|
|
789 |
|
|
ReadConfig32(portIndex=>6, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
790 |
|
|
tid=>x"06", address=>x"00019c", data=>x"00600001");
|
791 |
|
|
|
792 |
47 |
magro732 |
ExchangeFrames;
|
793 |
|
|
|
794 |
2 |
magro732 |
assert outputPortEnable(2) = '1' report "Unexpected outputPortEnable." severity error;
|
795 |
|
|
assert inputPortEnable(2) = '1' report "Unexpected inputPortEnable." severity error;
|
796 |
|
|
|
797 |
|
|
---------------------------------------------------------------------------
|
798 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
799 |
|
|
TestSpec("Step 11");
|
800 |
|
|
TestSpec("Action: Read and write to/from the implementation defined space.");
|
801 |
|
|
TestSpec("Result: Check the accesses on the external configuration port.");
|
802 |
2 |
magro732 |
---------------------------------------------------------------------------
|
803 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC1-Step11");
|
804 |
2 |
magro732 |
---------------------------------------------------------------------------
|
805 |
|
|
|
806 |
47 |
magro732 |
CreateRandomPayload(maintData, seed1, seed2);
|
807 |
|
|
ConfigRead(x"010000", maintData(0)(63 downto 32));
|
808 |
|
|
ConfigRead(x"010004", maintData(0)(31 downto 0));
|
809 |
|
|
ConfigRead(x"010008", maintData(1)(63 downto 32));
|
810 |
|
|
ConfigRead(x"01000c", maintData(1)(31 downto 0));
|
811 |
|
|
ConfigRead(x"010010", maintData(2)(63 downto 32));
|
812 |
|
|
ConfigRead(x"010014", maintData(2)(31 downto 0));
|
813 |
|
|
ConfigRead(x"010018", maintData(3)(63 downto 32));
|
814 |
|
|
ConfigRead(x"01001c", maintData(3)(31 downto 0));
|
815 |
|
|
ConfigRead(x"010020", maintData(4)(63 downto 32));
|
816 |
|
|
ConfigRead(x"010024", maintData(4)(31 downto 0));
|
817 |
|
|
ConfigRead(x"010028", maintData(5)(63 downto 32));
|
818 |
|
|
ConfigRead(x"01002c", maintData(5)(31 downto 0));
|
819 |
|
|
ConfigRead(x"010030", maintData(6)(63 downto 32));
|
820 |
|
|
ConfigRead(x"010034", maintData(6)(31 downto 0));
|
821 |
|
|
ConfigRead(x"010038", maintData(7)(63 downto 32));
|
822 |
|
|
ConfigRead(x"01003c", maintData(7)(31 downto 0));
|
823 |
|
|
|
824 |
|
|
SendFrame(2, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
825 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
826 |
|
|
destId=>x"0000", sourceId=>x"dead",
|
827 |
|
|
payload=>RioMaintenance(transaction=>"0000",
|
828 |
|
|
size=>"1100",
|
829 |
|
|
tid=>x"ef",
|
830 |
|
|
hopCount=>x"00",
|
831 |
|
|
configOffset=>"000000010000000000000",
|
832 |
|
|
wdptr=>'1',
|
833 |
|
|
dataLength=>0,
|
834 |
|
|
data=>maintData)));
|
835 |
|
|
|
836 |
|
|
ReceiveFrame(2, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
837 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
838 |
|
|
destId=>x"dead", sourceId=>x"0000",
|
839 |
|
|
payload=>RioMaintenance(transaction=>"0010",
|
840 |
|
|
size=>"0000",
|
841 |
|
|
tid=>x"ef",
|
842 |
|
|
hopCount=>x"ff",
|
843 |
|
|
configOffset=>"000000000000000000000",
|
844 |
|
|
wdptr=>'0',
|
845 |
|
|
dataLength=>8,
|
846 |
|
|
data=>maintData)));
|
847 |
|
|
|
848 |
|
|
ExchangeFrames;
|
849 |
|
|
TestWait(messageEmpty, '1', "config read");
|
850 |
2 |
magro732 |
|
851 |
47 |
magro732 |
CreateRandomPayload(maintData, seed1, seed2);
|
852 |
|
|
ConfigWrite(x"010000", maintData(0)(63 downto 32));
|
853 |
|
|
ConfigWrite(x"010004", maintData(0)(31 downto 0));
|
854 |
|
|
ConfigWrite(x"010008", maintData(1)(63 downto 32));
|
855 |
|
|
ConfigWrite(x"01000c", maintData(1)(31 downto 0));
|
856 |
|
|
ConfigWrite(x"010010", maintData(2)(63 downto 32));
|
857 |
|
|
ConfigWrite(x"010014", maintData(2)(31 downto 0));
|
858 |
|
|
ConfigWrite(x"010018", maintData(3)(63 downto 32));
|
859 |
|
|
ConfigWrite(x"01001c", maintData(3)(31 downto 0));
|
860 |
|
|
ConfigWrite(x"010020", maintData(4)(63 downto 32));
|
861 |
|
|
ConfigWrite(x"010024", maintData(4)(31 downto 0));
|
862 |
|
|
ConfigWrite(x"010028", maintData(5)(63 downto 32));
|
863 |
|
|
ConfigWrite(x"01002c", maintData(5)(31 downto 0));
|
864 |
|
|
ConfigWrite(x"010030", maintData(6)(63 downto 32));
|
865 |
|
|
ConfigWrite(x"010034", maintData(6)(31 downto 0));
|
866 |
|
|
ConfigWrite(x"010038", maintData(7)(63 downto 32));
|
867 |
|
|
ConfigWrite(x"01003c", maintData(7)(31 downto 0));
|
868 |
2 |
magro732 |
|
869 |
47 |
magro732 |
SendFrame(2, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
870 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
871 |
|
|
destId=>x"0000", sourceId=>x"dead",
|
872 |
|
|
payload=>RioMaintenance(transaction=>"0001",
|
873 |
|
|
size=>"1100",
|
874 |
|
|
tid=>x"ef",
|
875 |
|
|
hopCount=>x"00",
|
876 |
|
|
configOffset=>"000000010000000000000",
|
877 |
|
|
wdptr=>'1',
|
878 |
|
|
dataLength=>8,
|
879 |
|
|
data=>maintData)));
|
880 |
|
|
|
881 |
|
|
ReceiveFrame(2, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
882 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
883 |
|
|
destId=>x"dead", sourceId=>x"0000",
|
884 |
|
|
payload=>RioMaintenance(transaction=>"0011",
|
885 |
|
|
size=>"0000",
|
886 |
|
|
tid=>x"ef",
|
887 |
|
|
hopCount=>x"ff",
|
888 |
|
|
configOffset=>"000000000000000000000",
|
889 |
|
|
wdptr=>'0',
|
890 |
|
|
dataLength=>0,
|
891 |
|
|
data=>maintData)));
|
892 |
|
|
|
893 |
|
|
ExchangeFrames;
|
894 |
48 |
magro732 |
TestWait(messageEmpty, '1', "config write");
|
895 |
2 |
magro732 |
|
896 |
|
|
---------------------------------------------------------------------------
|
897 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
898 |
|
|
TestSpec("TG_RioSwitch-TC2");
|
899 |
|
|
TestSpec("Description: Test the configuration of the routing table and the ");
|
900 |
|
|
TestSpec(" routing of packets.");
|
901 |
|
|
TestSpec("Requirement: XXXXX");
|
902 |
|
|
TestSpec("-----------------------------------------------------------------");
|
903 |
|
|
TestSpec("Step 1:");
|
904 |
|
|
TestSpec("Action: Configure the routing table for address 0->port 1.");
|
905 |
|
|
TestSpec("Result: A packet to address 0 should be forwarded to port 1.");
|
906 |
2 |
magro732 |
---------------------------------------------------------------------------
|
907 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC2-Step1");
|
908 |
2 |
magro732 |
---------------------------------------------------------------------------
|
909 |
|
|
|
910 |
|
|
ReadConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
911 |
|
|
tid=>x"07", address=>x"000070", data=>x"00000000");
|
912 |
|
|
WriteConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
913 |
|
|
tid=>x"08", address=>x"000074", data=>x"00000001");
|
914 |
|
|
ReadConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
915 |
|
|
tid=>x"09", address=>x"000074", data=>x"00000001");
|
916 |
|
|
|
917 |
|
|
-- Send a frame from a port and check if it is correctly routed.
|
918 |
|
|
randomPayload.length := 3;
|
919 |
|
|
CreateRandomPayload(randomPayload.data, seed1, seed2);
|
920 |
|
|
RouteFrame(sourcePortIndex=>0, destinationPortIndex=>1,
|
921 |
|
|
sourceId=>x"ffff", destinationId=>x"0000", payload=>randomPayload);
|
922 |
47 |
magro732 |
|
923 |
|
|
ExchangeFrames;
|
924 |
2 |
magro732 |
|
925 |
|
|
---------------------------------------------------------------------------
|
926 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
927 |
|
|
TestSpec("Step 2:");
|
928 |
|
|
TestSpec("Action: Test the configuration of the default route->port 2.");
|
929 |
|
|
TestSpec("Result: An unknown address should be routed to port 2.");
|
930 |
2 |
magro732 |
---------------------------------------------------------------------------
|
931 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC2-Step2");
|
932 |
2 |
magro732 |
---------------------------------------------------------------------------
|
933 |
|
|
|
934 |
|
|
ReadConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
935 |
|
|
tid=>x"0a", address=>x"000078", data=>x"00000000");
|
936 |
|
|
WriteConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
937 |
47 |
magro732 |
tid=>x"0b", address=>x"000078", data=>x"00000002");
|
938 |
2 |
magro732 |
ReadConfig32(portIndex=>0, destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
|
939 |
47 |
magro732 |
tid=>x"0c", address=>x"000078", data=>x"00000002");
|
940 |
|
|
ExchangeFrames;
|
941 |
2 |
magro732 |
|
942 |
|
|
-- Send a frame from a port and check if it is correctly routed.
|
943 |
|
|
randomPayload.length := 4;
|
944 |
|
|
CreateRandomPayload(randomPayload.data, seed1, seed2);
|
945 |
47 |
magro732 |
RouteFrame(sourcePortIndex=>1, destinationPortIndex=>2,
|
946 |
2 |
magro732 |
sourceId=>x"0000", destinationId=>x"ffff", payload=>randomPayload);
|
947 |
47 |
magro732 |
ExchangeFrames;
|
948 |
|
|
|
949 |
|
|
---------------------------------------------------------------------------
|
950 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
951 |
|
|
TestSpec("Step 3:");
|
952 |
|
|
TestSpec("Action: Test to route a maintenance read request from port 2, ");
|
953 |
|
|
TestSpec(" address 0.");
|
954 |
|
|
TestSpec("Result: The packet should be routed to port 1 and hop decremented.");
|
955 |
47 |
magro732 |
---------------------------------------------------------------------------
|
956 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC2-Step3");
|
957 |
47 |
magro732 |
---------------------------------------------------------------------------
|
958 |
|
|
|
959 |
|
|
SendFrame(2, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
960 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
961 |
|
|
destId=>x"0000", sourceId=>x"dead",
|
962 |
|
|
payload=>RioMaintenance(transaction=>"0000",
|
963 |
|
|
size=>"1000",
|
964 |
|
|
tid=>x"be",
|
965 |
|
|
hopCount=>x"01",
|
966 |
|
|
configOffset=>"000000000000000000000",
|
967 |
|
|
wdptr=>'0',
|
968 |
|
|
dataLength=>0,
|
969 |
|
|
data=>maintData)));
|
970 |
2 |
magro732 |
|
971 |
47 |
magro732 |
ReceiveFrame(1, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
972 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
973 |
|
|
destId=>x"0000", sourceId=>x"dead",
|
974 |
|
|
payload=>RioMaintenance(transaction=>"0000",
|
975 |
|
|
size=>"1000",
|
976 |
|
|
tid=>x"be",
|
977 |
|
|
hopCount=>x"00",
|
978 |
|
|
configOffset=>"000000000000000000000",
|
979 |
|
|
wdptr=>'0',
|
980 |
|
|
dataLength=>0,
|
981 |
|
|
data=>maintData)));
|
982 |
|
|
|
983 |
|
|
ExchangeFrames;
|
984 |
|
|
|
985 |
2 |
magro732 |
---------------------------------------------------------------------------
|
986 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
987 |
|
|
TestSpec("Step 4:");
|
988 |
|
|
TestSpec("Action: Test to route a maintenance write request from port 2, ");
|
989 |
|
|
TestSpec(" address 0.");
|
990 |
|
|
TestSpec("Result: The packet should be routed to port 1 and hop decremented.");
|
991 |
47 |
magro732 |
---------------------------------------------------------------------------
|
992 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC2-Step4");
|
993 |
47 |
magro732 |
---------------------------------------------------------------------------
|
994 |
|
|
|
995 |
|
|
CreateRandomPayload(maintData, seed1, seed2);
|
996 |
|
|
SendFrame(2, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
997 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
998 |
|
|
destId=>x"0000", sourceId=>x"dead",
|
999 |
|
|
payload=>RioMaintenance(transaction=>"0001",
|
1000 |
|
|
size=>"1100",
|
1001 |
|
|
tid=>x"ef",
|
1002 |
|
|
hopCount=>x"01",
|
1003 |
|
|
configOffset=>"000000000000000000000",
|
1004 |
|
|
wdptr=>'1',
|
1005 |
|
|
dataLength=>8,
|
1006 |
|
|
data=>maintData)));
|
1007 |
|
|
|
1008 |
|
|
ReceiveFrame(1, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
1009 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
1010 |
|
|
destId=>x"0000", sourceId=>x"dead",
|
1011 |
|
|
payload=>RioMaintenance(transaction=>"0001",
|
1012 |
|
|
size=>"1100",
|
1013 |
|
|
tid=>x"ef",
|
1014 |
|
|
hopCount=>x"00",
|
1015 |
|
|
configOffset=>"000000000000000000000",
|
1016 |
|
|
wdptr=>'1',
|
1017 |
|
|
dataLength=>8,
|
1018 |
|
|
data=>maintData)));
|
1019 |
|
|
ExchangeFrames;
|
1020 |
|
|
|
1021 |
|
|
---------------------------------------------------------------------------
|
1022 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
1023 |
|
|
TestSpec("Step 5:");
|
1024 |
|
|
TestSpec("Action: Test to route a maintenance read response from port 2, ");
|
1025 |
|
|
TestSpec(" address 0.");
|
1026 |
|
|
TestSpec("Result: The packet should be routed to port 1 and hop decremented.");
|
1027 |
47 |
magro732 |
---------------------------------------------------------------------------
|
1028 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC2-Step5");
|
1029 |
47 |
magro732 |
---------------------------------------------------------------------------
|
1030 |
|
|
|
1031 |
|
|
CreateRandomPayload(maintData, seed1, seed2);
|
1032 |
|
|
SendFrame(2, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
1033 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
1034 |
|
|
destId=>x"0000", sourceId=>x"dead",
|
1035 |
|
|
payload=>RioMaintenance(transaction=>"0010",
|
1036 |
|
|
size=>"1100",
|
1037 |
|
|
tid=>x"ef",
|
1038 |
|
|
hopCount=>x"01",
|
1039 |
|
|
configOffset=>"000000000000000000000",
|
1040 |
|
|
wdptr=>'0',
|
1041 |
|
|
dataLength=>8,
|
1042 |
|
|
data=>maintData)));
|
1043 |
|
|
|
1044 |
|
|
ReceiveFrame(1, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
1045 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
1046 |
|
|
destId=>x"0000",sourceId=>x"dead",
|
1047 |
|
|
payload=>RioMaintenance(transaction=>"0010",
|
1048 |
|
|
size=>"1100",
|
1049 |
|
|
tid=>x"ef",
|
1050 |
|
|
hopCount=>x"00",
|
1051 |
|
|
configOffset=>"000000000000000000000",
|
1052 |
|
|
wdptr=>'0',
|
1053 |
|
|
dataLength=>8,
|
1054 |
|
|
data=>maintData)));
|
1055 |
|
|
ExchangeFrames;
|
1056 |
|
|
|
1057 |
|
|
---------------------------------------------------------------------------
|
1058 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
1059 |
|
|
TestSpec("Step 6:");
|
1060 |
|
|
TestSpec("Action: Test to route a maintenance write response from port 2, ");
|
1061 |
|
|
TestSpec(" address 0.");
|
1062 |
|
|
TestSpec("Result: The packet should be routed to port 1 and hop decremented.");
|
1063 |
47 |
magro732 |
---------------------------------------------------------------------------
|
1064 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC2-Step6");
|
1065 |
47 |
magro732 |
---------------------------------------------------------------------------
|
1066 |
|
|
|
1067 |
|
|
SendFrame(2, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
1068 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
1069 |
|
|
destId=>x"0000", sourceId=>x"dead",
|
1070 |
|
|
payload=>RioMaintenance(transaction=>"0011",
|
1071 |
|
|
size=>"1000",
|
1072 |
|
|
tid=>x"ef",
|
1073 |
|
|
hopCount=>x"01",
|
1074 |
|
|
configOffset=>"000000000000000000000",
|
1075 |
|
|
wdptr=>'0',
|
1076 |
|
|
dataLength=>0,
|
1077 |
|
|
data=>maintData)));
|
1078 |
|
|
|
1079 |
|
|
ReceiveFrame(1, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
1080 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
1081 |
|
|
destId=>x"0000", sourceId=>x"dead",
|
1082 |
|
|
payload=>RioMaintenance(transaction=>"0011",
|
1083 |
|
|
size=>"1000",
|
1084 |
|
|
tid=>x"ef",
|
1085 |
|
|
hopCount=>x"00",
|
1086 |
|
|
configOffset=>"000000000000000000000",
|
1087 |
|
|
wdptr=>'0',
|
1088 |
|
|
dataLength=>0,
|
1089 |
|
|
data=>maintData)));
|
1090 |
|
|
ExchangeFrames;
|
1091 |
|
|
|
1092 |
|
|
---------------------------------------------------------------------------
|
1093 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
1094 |
|
|
TestSpec("Step 7:");
|
1095 |
|
|
TestSpec("Action: ");
|
1096 |
|
|
TestSpec("Result: ");
|
1097 |
47 |
magro732 |
---------------------------------------------------------------------------
|
1098 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC2-Step7");
|
1099 |
47 |
magro732 |
---------------------------------------------------------------------------
|
1100 |
|
|
|
1101 |
|
|
maintData(0) := x"0123456789abcdef";
|
1102 |
|
|
maintData(1) := x"0011223344550100";
|
1103 |
|
|
maintData(2) := x"1000011800000302";
|
1104 |
|
|
maintData(3) := x"0000000000000000";
|
1105 |
|
|
maintData(4) := x"0000000000000000";
|
1106 |
|
|
maintData(5) := x"0000000000000000";
|
1107 |
|
|
maintData(6) := x"0000000000000800";
|
1108 |
|
|
maintData(7) := x"0000000000000000";
|
1109 |
|
|
|
1110 |
|
|
SendFrame(2, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
1111 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
1112 |
|
|
destId=>x"0000", sourceId=>x"dead",
|
1113 |
|
|
payload=>RioMaintenance(transaction=>"0001",
|
1114 |
|
|
size=>"1100",
|
1115 |
|
|
tid=>x"ef",
|
1116 |
|
|
hopCount=>x"00",
|
1117 |
|
|
configOffset=>"000000000000000000000",
|
1118 |
|
|
wdptr=>'1',
|
1119 |
|
|
dataLength=>8,
|
1120 |
|
|
data=>maintData)));
|
1121 |
|
|
|
1122 |
|
|
ReceiveFrame(2, RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
|
1123 |
|
|
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
|
1124 |
|
|
destId=>x"dead", sourceId=>x"0000",
|
1125 |
|
|
payload=>RioMaintenance(transaction=>"0011",
|
1126 |
|
|
size=>"0000",
|
1127 |
|
|
tid=>x"ef",
|
1128 |
|
|
hopCount=>x"ff",
|
1129 |
|
|
configOffset=>"000000000000000000000",
|
1130 |
|
|
wdptr=>'0',
|
1131 |
|
|
dataLength=>0,
|
1132 |
|
|
data=>maintData)));
|
1133 |
|
|
|
1134 |
|
|
ExchangeFrames;
|
1135 |
|
|
|
1136 |
|
|
---------------------------------------------------------------------------
|
1137 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
1138 |
|
|
TestSpec("TG_RioSwitch-TC3");
|
1139 |
|
|
TestSpec("Description: Test the routing of normal packets.");
|
1140 |
|
|
TestSpec("Requirement: XXXXX");
|
1141 |
|
|
TestSpec("-----------------------------------------------------------------");
|
1142 |
|
|
TestSpec("Step 1:");
|
1143 |
|
|
TestSpec("Action: Send two packets but not the same time.");
|
1144 |
|
|
TestSpec("Result: Both packets should be received at the expected ports.");
|
1145 |
2 |
magro732 |
---------------------------------------------------------------------------
|
1146 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC3-Step1");
|
1147 |
2 |
magro732 |
---------------------------------------------------------------------------
|
1148 |
|
|
|
1149 |
51 |
magro732 |
-- Setup the routing table for the following steps.
|
1150 |
|
|
RouteSet(x"0000", x"00");
|
1151 |
|
|
RouteSet(x"0001", x"00");
|
1152 |
|
|
RouteSet(x"0002", x"00");
|
1153 |
|
|
RouteSet(x"0003", x"00");
|
1154 |
|
|
RouteSet(x"0004", x"01");
|
1155 |
|
|
RouteSet(x"0005", x"02");
|
1156 |
|
|
RouteSet(x"0006", x"02");
|
1157 |
|
|
RouteSetDefault(x"02");
|
1158 |
|
|
|
1159 |
2 |
magro732 |
-- Frame on port 0 to port 1.
|
1160 |
|
|
randomPayload.length := 3;
|
1161 |
|
|
CreateRandomPayload(randomPayload.data, seed1, seed2);
|
1162 |
|
|
SendFrame(portIndex=>0,
|
1163 |
51 |
magro732 |
destinationId=>x"0004", sourceId=>x"ffff", payload=>randomPayload);
|
1164 |
2 |
magro732 |
ReceiveFrame(portIndex=>1,
|
1165 |
51 |
magro732 |
destinationId=>x"0004", sourceId=>x"ffff", payload=>randomPayload);
|
1166 |
2 |
magro732 |
|
1167 |
|
|
-- Frame on port 1 to port 6.
|
1168 |
|
|
randomPayload.length := 4;
|
1169 |
|
|
CreateRandomPayload(randomPayload.data, seed1, seed2);
|
1170 |
|
|
SendFrame(portIndex=>1,
|
1171 |
47 |
magro732 |
destinationId=>x"ffff", sourceId=>x"0000", payload=>randomPayload);
|
1172 |
2 |
magro732 |
ReceiveFrame(portIndex=>6,
|
1173 |
47 |
magro732 |
destinationId=>x"ffff", sourceId=>x"0000", payload=>randomPayload);
|
1174 |
2 |
magro732 |
|
1175 |
47 |
magro732 |
ExchangeFrames;
|
1176 |
2 |
magro732 |
|
1177 |
|
|
---------------------------------------------------------------------------
|
1178 |
51 |
magro732 |
TestSpec("-----------------------------------------------------------------");
|
1179 |
|
|
TestSpec("Step 2:");
|
1180 |
|
|
TestSpec("Action: Send two packets to the same port with is full and one to");
|
1181 |
|
|
TestSpec(" another that is also full. Then receive the packets one at");
|
1182 |
|
|
TestSpec(" a time.");
|
1183 |
|
|
TestSpec("Result: The packet to the port that is ready should go though.");
|
1184 |
2 |
magro732 |
---------------------------------------------------------------------------
|
1185 |
51 |
magro732 |
TestCaseStart("TG_RioSwitch-TC3-Step2");
|
1186 |
2 |
magro732 |
---------------------------------------------------------------------------
|
1187 |
|
|
|
1188 |
|
|
-- Frame on port 0 to port 1.
|
1189 |
|
|
randomPayload.length := 5;
|
1190 |
|
|
CreateRandomPayload(randomPayload.data, seed1, seed2);
|
1191 |
47 |
magro732 |
RouteFrame(sourcePortIndex=>0, destinationPortIndex=>1,
|
1192 |
|
|
destinationId=>x"0000", sourceId=>x"ffff", payload=>randomPayload);
|
1193 |
2 |
magro732 |
|
1194 |
47 |
magro732 |
-- Frame on port 1 to port 2.
|
1195 |
2 |
magro732 |
randomPayload1.length := 6;
|
1196 |
|
|
CreateRandomPayload(randomPayload1.data, seed1, seed2);
|
1197 |
47 |
magro732 |
RouteFrame(sourcePortIndex=>2, destinationPortIndex=>2,
|
1198 |
|
|
destinationId=>x"ffff", sourceId=>x"0000", payload=>randomPayload1);
|
1199 |
2 |
magro732 |
|
1200 |
47 |
magro732 |
-- Frame on port 2 to port 2.
|
1201 |
2 |
magro732 |
randomPayload2.length := 7;
|
1202 |
|
|
CreateRandomPayload(randomPayload2.data, seed1, seed2);
|
1203 |
47 |
magro732 |
RouteFrame(sourcePortIndex=>2, destinationPortIndex=>2,
|
1204 |
|
|
destinationId=>x"ffff", sourceId=>x"0000", payload=>randomPayload2);
|
1205 |
2 |
magro732 |
|
1206 |
47 |
magro732 |
writeFrameFull <= (others=>'1');
|
1207 |
2 |
magro732 |
wait for 10 us;
|
1208 |
|
|
|
1209 |
47 |
magro732 |
writeFrameFull(1) <= '0';
|
1210 |
2 |
magro732 |
wait for 10 us;
|
1211 |
|
|
|
1212 |
47 |
magro732 |
writeFrameFull(2) <= '0';
|
1213 |
2 |
magro732 |
wait for 10 us;
|
1214 |
|
|
|
1215 |
47 |
magro732 |
ExchangeFrames;
|
1216 |
2 |
magro732 |
|
1217 |
|
|
---------------------------------------------------------------------------
|
1218 |
|
|
-- Test completed.
|
1219 |
|
|
---------------------------------------------------------------------------
|
1220 |
|
|
|
1221 |
|
|
TestEnd;
|
1222 |
|
|
end process;
|
1223 |
|
|
|
1224 |
|
|
-----------------------------------------------------------------------------
|
1225 |
|
|
-- Instantiate a process receiving the configuration accesses to the
|
1226 |
|
|
-- implementation defined space.
|
1227 |
|
|
-----------------------------------------------------------------------------
|
1228 |
|
|
|
1229 |
47 |
magro732 |
TestWishbone: TestPortWishbone
|
1230 |
|
|
generic map(ADDRESS_WIDTH=>24, SEL_WIDTH=>1, DATA_WIDTH=>32)
|
1231 |
|
|
port map(
|
1232 |
|
|
clk=>clk, areset_n=>areset_n,
|
1233 |
|
|
messageEmpty_o=>messageEmpty,
|
1234 |
|
|
messageWrite_i=>messageWrite,
|
1235 |
|
|
message_i=>message,
|
1236 |
|
|
messageAck_o=>messageAck,
|
1237 |
|
|
cyc_i=>configStb,
|
1238 |
|
|
stb_i=>configStb,
|
1239 |
|
|
we_i=>configWe,
|
1240 |
|
|
adr_i=>configAddr,
|
1241 |
|
|
sel_i=>"0",
|
1242 |
|
|
dat_i=>configDataWrite,
|
1243 |
|
|
dat_o=>configDataRead,
|
1244 |
|
|
err_o=>open,
|
1245 |
|
|
ack_o=>configAck);
|
1246 |
|
|
|
1247 |
2 |
magro732 |
-----------------------------------------------------------------------------
|
1248 |
|
|
-- Instantiate the test port array.
|
1249 |
|
|
-----------------------------------------------------------------------------
|
1250 |
47 |
magro732 |
inboundEmpty2 <= inboundEmpty(2);
|
1251 |
|
|
inboundEmpty1 <= inboundEmpty(1);
|
1252 |
|
|
inboundEmpty0 <= inboundEmpty(0);
|
1253 |
|
|
inboundWrite <= inboundWrite2 & inboundWrite1 & inboundWrite0;
|
1254 |
|
|
inboundMessage <= inboundMessage2 & inboundMessage1 & inboundMessage0;
|
1255 |
|
|
inboundAck2 <= inboundAck(2);
|
1256 |
|
|
inboundAck1 <= inboundAck(1);
|
1257 |
|
|
inboundAck0 <= inboundAck(0);
|
1258 |
|
|
outboundEmpty2 <= outboundEmpty(2);
|
1259 |
|
|
outboundEmpty1 <= outboundEmpty(1);
|
1260 |
|
|
outboundEmpty0 <= outboundEmpty(0);
|
1261 |
|
|
outboundWrite <= outboundWrite2 & outboundWrite1 & outboundWrite0;
|
1262 |
|
|
outboundMessage <= outboundMessage2 & outboundMessage1 & outboundMessage0;
|
1263 |
|
|
outboundAck2 <= outboundAck(2);
|
1264 |
|
|
outboundAck1 <= outboundAck(1);
|
1265 |
|
|
outboundAck0 <= outboundAck(0);
|
1266 |
2 |
magro732 |
TestPortGeneration: for portIndex in 0 to PORTS-1 generate
|
1267 |
47 |
magro732 |
TestPortPacketBufferInst: TestPortPacketBuffer
|
1268 |
|
|
generic map(READ_CONTENT_END_DATA_VALID=>false)
|
1269 |
2 |
magro732 |
port map(
|
1270 |
|
|
clk=>clk, areset_n=>areset_n,
|
1271 |
47 |
magro732 |
readEmpty_o=>inboundEmpty(portIndex),
|
1272 |
|
|
readWrite_i=>inboundWrite(portIndex),
|
1273 |
|
|
readMessage_i=>inboundMessage(portIndex),
|
1274 |
|
|
readAck_o=>inboundAck(portIndex),
|
1275 |
|
|
writeEmpty_o=>outboundEmpty(portIndex),
|
1276 |
|
|
writeWrite_i=>outboundWrite(portIndex),
|
1277 |
|
|
writeMessage_i=>outboundMessage(portIndex),
|
1278 |
|
|
writeAck_o=>outboundAck(portIndex),
|
1279 |
2 |
magro732 |
readFrameEmpty_o=>readFrameEmpty(portIndex),
|
1280 |
|
|
readFrame_i=>readFrame(portIndex),
|
1281 |
47 |
magro732 |
readFrameRestart_i=>'0',
|
1282 |
51 |
magro732 |
readFrameAborted_o=>open,
|
1283 |
47 |
magro732 |
readWindowEmpty_o=>open,
|
1284 |
|
|
readWindowReset_i=>'0',
|
1285 |
|
|
readWindowNext_i=>readFrame(portIndex),
|
1286 |
51 |
magro732 |
readContentEmpty_o=>open,
|
1287 |
2 |
magro732 |
readContent_i=>readContent(portIndex),
|
1288 |
|
|
readContentEnd_o=>readContentEnd(portIndex),
|
1289 |
|
|
readContentData_o=>readContentData(portIndex),
|
1290 |
|
|
writeFrame_i=>writeFrame(portIndex),
|
1291 |
|
|
writeFrameAbort_i=>writeFrameAbort(portIndex),
|
1292 |
|
|
writeContent_i=>writeContent(portIndex),
|
1293 |
|
|
writeContentData_i=>writeContentData(portIndex));
|
1294 |
|
|
end generate;
|
1295 |
|
|
|
1296 |
|
|
-----------------------------------------------------------------------------
|
1297 |
|
|
-- Instantiate the switch.
|
1298 |
|
|
-----------------------------------------------------------------------------
|
1299 |
|
|
|
1300 |
|
|
TestSwitch: RioSwitch
|
1301 |
|
|
generic map(
|
1302 |
47 |
magro732 |
SWITCH_PORTS=>PORTS,
|
1303 |
2 |
magro732 |
DEVICE_IDENTITY=>SWITCH_IDENTITY,
|
1304 |
|
|
DEVICE_VENDOR_IDENTITY=>SWITCH_VENDOR_IDENTITY,
|
1305 |
|
|
DEVICE_REV=>SWITCH_REV,
|
1306 |
|
|
ASSY_IDENTITY=>SWITCH_ASSY_IDENTITY,
|
1307 |
|
|
ASSY_VENDOR_IDENTITY=>SWITCH_ASSY_VENDOR_IDENTITY,
|
1308 |
|
|
ASSY_REV=>SWITCH_ASSY_REV)
|
1309 |
|
|
port map(
|
1310 |
|
|
clk=>clk, areset_n=>areset_n,
|
1311 |
|
|
writeFrameFull_i=>writeFrameFull,
|
1312 |
|
|
writeFrame_o=>writeFrame, writeFrameAbort_o=>writeFrameAbort,
|
1313 |
|
|
writeContent_o=>writeContent, writeContentData_o=>writeContentData,
|
1314 |
|
|
readFrameEmpty_i=>readFrameEmpty,
|
1315 |
51 |
magro732 |
readFrame_o=>readFrame,
|
1316 |
2 |
magro732 |
readContent_o=>readContent, readContentEnd_i=>readContentEnd,
|
1317 |
|
|
readContentData_i=>readContentData,
|
1318 |
|
|
portLinkTimeout_o=>portLinkTimeout,
|
1319 |
|
|
linkInitialized_i=>linkInitialized,
|
1320 |
|
|
outputPortEnable_o=>outputPortEnable, inputPortEnable_o=>inputPortEnable,
|
1321 |
|
|
localAckIdWrite_o=>localAckIdWrite,
|
1322 |
|
|
clrOutstandingAckId_o=>clrOutstandingAckId,
|
1323 |
|
|
inboundAckId_o=>inboundAckIdWrite,
|
1324 |
|
|
outstandingAckId_o=>outstandingAckIdWrite,
|
1325 |
|
|
outboundAckId_o=>outboundAckIdWrite,
|
1326 |
|
|
inboundAckId_i=>inboundAckIdRead,
|
1327 |
|
|
outstandingAckId_i=>outstandingAckIdRead,
|
1328 |
|
|
outboundAckId_i=>outboundAckIdRead,
|
1329 |
|
|
configStb_o=>configStb, configWe_o=>configWe, configAddr_o=>configAddr,
|
1330 |
47 |
magro732 |
configData_o=>configDataWrite, configData_i=>configDataRead, configAck_i=>configAck);
|
1331 |
2 |
magro732 |
|
1332 |
|
|
|
1333 |
|
|
end architecture;
|