OpenCores
URL https://opencores.org/ocsvn/riscv_vhdl/riscv_vhdl/trunk

Subversion Repositories riscv_vhdl

[/] [riscv_vhdl/] [trunk/] [debugger/] [src/] [common/] [debug/] [greth.h] - Blame information for rev 5

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 5 sergeykhbr
/**
2
 * @file
3
 * @copyright  Copyright 2016 GNSS Sensor Ltd. All right reserved.
4
 * @author     Sergey Khabarov - sergeykhbr@gmail.com
5
 * @brief      Ethernet MAC device functional model.
6
 */
7
 
8
#ifndef __DEBUGGER_COMMON_DEBUG_GRETH_H__
9
#define __DEBUGGER_COMMON_DEBUG_GRETH_H__
10
 
11
#include <iclass.h>
12
#include <iservice.h>
13
#include "coreservices/ithread.h"
14
#include "coreservices/iclock.h"
15
#include "coreservices/imemop.h"
16
#include "coreservices/ilink.h"
17
#include "coreservices/irawlistener.h"
18
 
19
namespace debugger {
20
 
21
struct greth_map {
22
    uint32_t rsrv1;
23
    uint64_t rsrv[2];
24
};
25
 
26
struct EdclControlRequestType {
27
    // 32 bits fields:
28
    uint32_t unused : 7;
29
    uint32_t len    : 10;
30
    uint32_t write  : 1;    // read = 0; write = 1
31
    uint32_t seqidx : 14;   // sequence id
32
    /* uint32 data; */      // 0 to 242 words
33
};
34
 
35
 
36
struct EdclControlResponseType {
37
    // 32 bits fields:
38
    uint32_t unused : 7;
39
    uint32_t len    : 10;
40
    uint32_t nak    : 1;    // ACK = 0; NAK = 1
41
    uint32_t seqidx : 14;   // sequence id
42
    /* uint32 data; */      // 0 to 242 words
43
};
44
 
45
#pragma pack(1)
46
struct UdpEdclCommonType {
47
    uint16_t offset;
48
    union ControlType {
49
        uint32_t word;
50
        EdclControlRequestType request;
51
        EdclControlResponseType response;
52
    } control;
53
    uint32_t address;
54
    /* uint32 data; */      // 0 to 242 words
55
};
56
#pragma pack()
57
 
58
class Greth : public IService,
59
              public IThread,
60
              public IMemoryOperation,
61
              public IAxi4NbResponse {
62
 public:
63
    explicit Greth(const char *name);
64
    virtual ~Greth();
65
 
66
    /** IService interface */
67
    virtual void postinitService();
68
 
69
    /** IMemoryOperation */
70
    virtual ETransStatus b_transport(Axi4TransactionType *trans);
71
 
72
    /** IAxi4NbResponse */
73
    virtual void nb_response(Axi4TransactionType *trans);
74
 
75
 protected:
76
    /** IThread interface */
77
    virtual void busyLoop();
78
 
79
 private:
80
    void write32(uint8_t *buf, uint32_t v);
81
    uint32_t read32(uint8_t *buf);
82
    void sendNAK(UdpEdclCommonType *req);
83
 
84
 private:
85
    AttributeType ip_;
86
    AttributeType mac_;
87
    AttributeType bus_;
88
    AttributeType transport_;
89
    AttributeType sysBusMasterID_;
90
 
91
    IMemoryOperation *ibus_;
92
    IClock *iclk0_;
93
    ILink *itransport_;
94
 
95
    uint8_t rxbuf_[1<<12];
96
    uint8_t txbuf_[1<<12];
97
    uint32_t seq_cnt_ : 14;
98
 
99
    Axi4TransactionType trans_;
100
    event_def event_tap_;
101
 
102
    greth_map regs_;
103
};
104
 
105
DECLARE_CLASS(Greth)
106
 
107
}  // namespace debugger
108
 
109
#endif  // __DEBUGGER_COMMON_DEBUG_GRETH_H__

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.