OpenCores
URL https://opencores.org/ocsvn/riscv_vhdl/riscv_vhdl/trunk

Subversion Repositories riscv_vhdl

[/] [riscv_vhdl/] [trunk/] [debugger/] [src/] [libdbg64g/] [services/] [debug/] [edcl_types.h] - Blame information for rev 5

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 5 sergeykhbr
/**
2
 * @file
3
 * @copyright  Copyright 2016 GNSS Sensor Ltd. All right reserved.
4
 * @author     Sergey Khabarov - sergeykhbr@gmail.com
5
 * @brief      EDCL user defined transport structure.
6
 */
7
 
8
 #ifndef __DEBUGGER_EDCL_TYPES_H__
9
 #define __DEBUGGER_EDCL_TYPES_H__
10
 
11
 #include <inttypes.h>
12
 
13
 namespace debugger {
14
 
15
struct EdclControlRequestType {
16
    // 32 bits fields:
17
    uint32_t unused : 7;
18
    uint32_t len    : 10;
19
    uint32_t write  : 1;    // read = 0; write = 1
20
    uint32_t seqidx : 14;   // sequence id
21
    //uint32 data; // 0 to 242 words
22
};
23
 
24
 
25
struct EdclControlResponseType {
26
    // 32 bits fields:
27
    uint32_t unused : 7;
28
    uint32_t len    : 10;
29
    uint32_t nak    : 1;    // ACK = 0; NAK = 1
30
    uint32_t seqidx : 14;   // sequence id
31
    //uint32 data; // 0 to 242 words
32
};
33
 
34
#pragma pack(1)
35
struct UdpEdclCommonType {
36
    uint16_t offset;
37
    union ControlType {
38
        uint32_t word;
39
        EdclControlRequestType request;
40
        EdclControlResponseType response;
41
    } control;
42
    uint32_t address;
43
    //uint32 data; // 0 to 242 words
44
};
45
#pragma pack()
46
 
47
}  // namespace debugger
48
 
49
#endif  // __DEBUGGER_EDCL_TYPES_H__

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.