1 |
5 |
sergeykhbr |
/******************************************************************************
|
2 |
|
|
* @file
|
3 |
|
|
* @copyright Copyright 2015 GNSS Sensor Ltd. All right reserved.
|
4 |
|
|
* @author Sergey Khabarov - sergeykhbr@gmail.com
|
5 |
|
|
* @brief AXI4 system bus constants definition
|
6 |
|
|
******************************************************************************/
|
7 |
|
|
|
8 |
|
|
#ifndef __AXI_CONST_H__
|
9 |
|
|
#define __AXI_CONST_H__
|
10 |
|
|
|
11 |
|
|
#include <inttypes.h>
|
12 |
|
|
|
13 |
|
|
typedef uint64_t adr_type;
|
14 |
|
|
|
15 |
|
|
static const int AXI4_SYSTEM_CLOCK = 40000000; /// 40 MHz
|
16 |
|
|
|
17 |
|
|
#define VENDOR_GNSSSENSOR 0x00F1
|
18 |
|
|
|
19 |
|
|
#define GNSSSENSOR_EMPTY 0x5577 /// Dummy device
|
20 |
|
|
#define GNSSSENSOR_ENGINE_STUB 0x0068 /// GNSS Engine stub
|
21 |
|
|
#define GNSSSENSOR_FSE_V2_GPS 0x0069 /// Fast Search Engines Device ID provided by gnsslib
|
22 |
|
|
#define GNSSSENSOR_FSE_V2_GLO 0x006A ///
|
23 |
|
|
#define GNSSSENSOR_FSE_V2_GAL 0x006C ///
|
24 |
|
|
#define GNSSSENSOR_BOOTROM 0x0071 /// Boot ROM Device ID
|
25 |
|
|
#define GNSSSENSOR_FWIMAGE 0x0072 /// FW ROM image Device ID
|
26 |
|
|
#define GNSSSENSOR_SRAM 0x0073 /// Internal SRAM block Device ID
|
27 |
|
|
#define GNSSSENSOR_PNP 0x0074 /// Configuration Registers Module Device ID provided by gnsslib
|
28 |
|
|
#define GNSSSENSOR_SPI_FLASH 0x0075 /// SD-card controller Device ID provided by gnsslib
|
29 |
|
|
#define GNSSSENSOR_GPIO 0x0076 /// General purpose IOs Device ID provided by gnsslib
|
30 |
|
|
#define GNSSSENSOR_RF_CONTROL 0x0077 /// RF front-end controller Device ID provided by gnsslib
|
31 |
|
|
#define GNSSSENSOR_ENGINE 0x0078 /// GNSS Engine Device ID provided by gnsslib
|
32 |
|
|
#define GNSSSENSOR_UART 0x007a /// rs-232 UART Device ID
|
33 |
|
|
#define GNSSSENSOR_ACCELEROMETER 0x007b /// Accelerometer Device ID provided by gnsslib
|
34 |
|
|
#define GNSSSENSOR_GYROSCOPE 0x007c /// Gyroscope Device ID provided by gnsslib
|
35 |
|
|
#define GNSSSENSOR_IRQCTRL 0x007d /// Interrupt controller
|
36 |
|
|
#define GNSSSENSOR_ETHMAC 0x007f
|
37 |
|
|
#define GNSSSENSOR_DSU 0x0080
|
38 |
|
|
#define GNSSSENSOR_GPTIMERS 0x0081
|
39 |
|
|
#define GNSSSENSOR_RECORDER 0x0082
|
40 |
|
|
|
41 |
|
|
#define CFG_NASTI_MASTER_CACHED 0
|
42 |
|
|
#define CFG_NASTI_MASTER_UNCACHED 1
|
43 |
|
|
#define CFG_NASTI_MASTER_ETHMAC 2
|
44 |
|
|
#define CFG_NASTI_MASTER_TOTAL 3
|
45 |
|
|
|
46 |
|
|
#define MST_DID_EMPTY 0x7755
|
47 |
|
|
#define SLV_DID_EMPTY 0x5577
|
48 |
|
|
|
49 |
|
|
// Masters IDs
|
50 |
|
|
#define RISCV_CACHED_TILELINK 0x0500
|
51 |
|
|
#define RISCV_UNCACHED_TILELINK 0x0501
|
52 |
|
|
#define GAISLER_ETH_MAC_MASTER 0x0502
|
53 |
|
|
#define GAISLER_ETH_EDCL_MASTER 0x0503
|
54 |
|
|
#define RISCV_RIVER_CPU 0x0505
|
55 |
|
|
|
56 |
|
|
#define PNP_CFG_TYPE_INVALID 0
|
57 |
|
|
#define PNP_CFG_TYPE_MASTER 1
|
58 |
|
|
#define PNP_CFG_TYPE_SLAVE 2
|
59 |
|
|
|
60 |
|
|
|
61 |
|
|
#define TECH_INFERRED 0
|
62 |
|
|
#define TECH_VIRTEX6 36
|
63 |
|
|
#define TECH_KINTEX7 49
|
64 |
|
|
|
65 |
|
|
#ifdef WIN32
|
66 |
|
|
#ifdef __cplusplus
|
67 |
|
|
extern "C" {
|
68 |
|
|
#endif
|
69 |
|
|
void WRITE32(const volatile uint32_t *adr, uint32_t val);
|
70 |
|
|
void WRITE64(const volatile uint64_t *adr, uint64_t val);
|
71 |
|
|
uint8_t READ8(const volatile uint8_t *adr);
|
72 |
|
|
uint16_t READ16(const volatile uint16_t *adr);
|
73 |
|
|
uint32_t READ32(const volatile uint32_t *adr);
|
74 |
|
|
uint64_t READ64(const volatile uint64_t *adr);
|
75 |
|
|
#ifdef __cplusplus
|
76 |
|
|
}
|
77 |
|
|
#endif
|
78 |
|
|
|
79 |
|
|
#else
|
80 |
|
|
|
81 |
|
|
static inline void WRITE32(const volatile uint32_t *adr, uint32_t val) {
|
82 |
|
|
*((volatile uint32_t *)adr) = val;
|
83 |
|
|
}
|
84 |
|
|
|
85 |
|
|
static inline void WRITE64(const volatile uint64_t *adr, uint64_t val) {
|
86 |
|
|
*((volatile uint64_t *)adr) = val;
|
87 |
|
|
}
|
88 |
|
|
|
89 |
|
|
static inline uint8_t READ8(const volatile uint8_t *adr) {
|
90 |
|
|
return adr[0];
|
91 |
|
|
}
|
92 |
|
|
|
93 |
|
|
static inline uint16_t READ16(const volatile uint16_t *adr) {
|
94 |
|
|
return adr[0];
|
95 |
|
|
}
|
96 |
|
|
|
97 |
|
|
static inline uint32_t READ32(const volatile uint32_t *adr) {
|
98 |
|
|
return adr[0];
|
99 |
|
|
}
|
100 |
|
|
|
101 |
|
|
static inline uint64_t READ64(const volatile uint64_t *adr) {
|
102 |
|
|
return adr[0];
|
103 |
|
|
}
|
104 |
|
|
|
105 |
|
|
#endif
|
106 |
|
|
|
107 |
|
|
#endif // __AXI_CONST_H__
|