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[/] [riscv_vhdl/] [trunk/] [examples/] [common/] [maps/] [map_pnp.h] - Blame information for rev 5

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/******************************************************************************
 * @file
 * @copyright Copyright 2015 GNSS Sensor Ltd. All right reserved.
 * @author    Sergey Khabarov - sergeykhbr@gmail.com
 * @brief     Plug-and-Play module register mapping definition.
******************************************************************************/
 
#ifndef __MAP_PNP_H__
#define __MAP_PNP_H__
 
#include <inttypes.h>
 
 
typedef struct MasterConfigType {
    /*union DescrType {
        struct bits_type {
            uint32_t descrsize : 8;
            uint32_t descrtype : 2;
            uint32_t rsrv : 14;
            uint32_t xindex : 8;
        } bits;
        uint32_t val;
    } descr;*/
    uint32_t descr;
    uint16_t did;
    uint16_t vid;
} MasterConfigType;
 
typedef struct SlaveConfigType {
    /*union DescrType {
        struct bits_type {
            uint32_t descrsize : 8;
            uint32_t descrtype : 2;
            uint32_t bar_total : 2;
            uint32_t rsrv1 : 4;
            uint32_t irq_idx : 8;
            uint32_t xindex : 8;
        } bits;
        uint32_t val;
    } descr;*/
    uint32_t descr;
    uint16_t did;
    uint16_t vid;
    uint32_t xmask;
    uint32_t xaddr;
} SlaveConfigType;
 
typedef struct pnp_map {
    uint32_t hwid;              /// 0xfffff000: RO: HW ID
    uint32_t fwid;              /// 0xfffff004: RW: FW ID
    /*union TechType {
        struct bits_type {
            uint8_t tech;
            uint8_t slv_total;
            uint8_t mst_total;
            uint8_t adc_detect;
        } bits;
        uint32_t val;
    } tech;                     /// 0xfffff008: RO: technology index
    */
    uint32_t tech;
    uint32_t rsrv1;             /// 0xfffff00c: 
    uint64_t idt;               /// 0xfffff010: 
    uint64_t malloc_addr;       /// 0xfffff018: RW: debuggind memalloc pointer 0x18
    uint64_t malloc_size;       /// 0xfffff020: RW: debugging memalloc size 0x20
    uint64_t fwdbg1;            /// 0xfffff028: RW: FW debug register
    uint64_t rsrv[2];           /// 0xfffff030, 0xfffff038
    uint8_t cfg_table[(1 << 12) - 0x40];/// 0xfffff040: RO: PNP configuration
} pnp_map;
 
 
#endif  // __MAP_PNP_H__

Line No.	Rev	Author	Line
1	5	sergeykhbr	`/******************************************************************************`
2			`* @file`
3			`* @copyright Copyright 2015 GNSS Sensor Ltd. All right reserved.`
4			`* @author Sergey Khabarov - sergeykhbr@gmail.com`
5			`* @brief Plug-and-Play module register mapping definition.`
6			`******************************************************************************/`
7
8			`#ifndef __MAP_PNP_H__`
9			`#define __MAP_PNP_H__`
10
11			`#include <inttypes.h>`
12
13
14			`typedef struct MasterConfigType {`
15			`/*union DescrType {`
16			`struct bits_type {`
17			`uint32_t descrsize : 8;`
18			`uint32_t descrtype : 2;`
19			`uint32_t rsrv : 14;`
20			`uint32_t xindex : 8;`
21			`} bits;`
22			`uint32_t val;`
23			`} descr;*/`
24			`uint32_t descr;`
25			`uint16_t did;`
26			`uint16_t vid;`
27			`} MasterConfigType;`
28
29			`typedef struct SlaveConfigType {`
30			`/*union DescrType {`
31			`struct bits_type {`
32			`uint32_t descrsize : 8;`
33			`uint32_t descrtype : 2;`
34			`uint32_t bar_total : 2;`
35			`uint32_t rsrv1 : 4;`
36			`uint32_t irq_idx : 8;`
37			`uint32_t xindex : 8;`
38			`} bits;`
39			`uint32_t val;`
40			`} descr;*/`
41			`uint32_t descr;`
42			`uint16_t did;`
43			`uint16_t vid;`
44			`uint32_t xmask;`
45			`uint32_t xaddr;`
46			`} SlaveConfigType;`
47
48			`typedef struct pnp_map {`
49			`uint32_t hwid; /// 0xfffff000: RO: HW ID`
50			`uint32_t fwid; /// 0xfffff004: RW: FW ID`
51			`/*union TechType {`
52			`struct bits_type {`
53			`uint8_t tech;`
54			`uint8_t slv_total;`
55			`uint8_t mst_total;`
56			`uint8_t adc_detect;`
57			`} bits;`
58			`uint32_t val;`
59			`} tech; /// 0xfffff008: RO: technology index`
60			`*/`
61			`uint32_t tech;`
62			`uint32_t rsrv1; /// 0xfffff00c:`
63			`uint64_t idt; /// 0xfffff010:`
64			`uint64_t malloc_addr; /// 0xfffff018: RW: debuggind memalloc pointer 0x18`
65			`uint64_t malloc_size; /// 0xfffff020: RW: debugging memalloc size 0x20`
66			`uint64_t fwdbg1; /// 0xfffff028: RW: FW debug register`
67			`uint64_t rsrv[2]; /// 0xfffff030, 0xfffff038`
68			`uint8_t cfg_table[(1 << 12) - 0x40];/// 0xfffff040: RO: PNP configuration`
69			`} pnp_map;`
70
71
72			`#endif // __MAP_PNP_H__`

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[/] [riscv_vhdl/] [trunk/] [examples/] [common/] [maps/] [map_pnp.h] - Blame information for rev 5