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[/] [riscv_vhdl/] [trunk/] [rtl/] [techmap/] [mem/] [sram8_inferred.vhd] - Blame information for rev 5

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1 5 sergeykhbr
----------------------------------------------------------------------------
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--! @file
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--! @copyright  Copyright 2015 GNSS Sensor Ltd. All right reserved.
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--! @author     Sergey Khabarov
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--! @brief      8-bits memory block with the generic data size parameter.
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------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.ALL;
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use IEEE.STD_LOGIC_TEXTIO.ALL;
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use std.textio.all;
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library commonlib;
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use commonlib.types_common.all;
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entity sram8_inferred is
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  generic (
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    abits : integer := 12;
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    byte_idx : integer := 0
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  );
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  port (
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    clk     : in  std_ulogic;
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    address : in  std_logic_vector(abits-1 downto 0);
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    rdata   : out std_logic_vector(7 downto 0);
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    we      : in  std_logic;
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    wdata   : in  std_logic_vector(7 downto 0)
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  );
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end;
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architecture arch_sram8_inferred of sram8_inferred is
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constant SRAM_LENGTH : integer := 2**abits;
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type ram_type is array (0 to SRAM_LENGTH-1) of std_logic_vector(7 downto 0);
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signal ram : ram_type;
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signal adr : std_logic_vector(abits-1 downto 0);
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begin
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  reg : process (clk, address, wdata) begin
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    if rising_edge(clk) then
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      if we = '1' then
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        ram(conv_integer(address)) <= wdata;
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      end if;
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      adr <= address;
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    end if;
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  end process;
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  rdata <= ram(conv_integer(adr));
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end;

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