OpenCores
URL https://opencores.org/ocsvn/robust_axi2apb/robust_axi2apb/trunk

Subversion Repositories robust_axi2apb

[/] [robust_axi2apb/] [trunk/] [src/] [base/] [axi2apb_ctrl.v] - Blame information for rev 8

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 4 eyalhoc
<##//////////////////////////////////////////////////////////////////
2
////                                                             ////
3
////  Author: Eyal Hochberg                                      ////
4
////          eyal@provartec.com                                 ////
5
////                                                             ////
6
////  Downloaded from: http://www.opencores.org                  ////
7
/////////////////////////////////////////////////////////////////////
8
////                                                             ////
9
//// Copyright (C) 2010 Provartec LTD                            ////
10
//// www.provartec.com                                           ////
11
//// info@provartec.com                                          ////
12
////                                                             ////
13
//// This source file may be used and distributed without        ////
14
//// restriction provided that this copyright statement is not   ////
15
//// removed from the file and that any derivative work contains ////
16
//// the original copyright notice and the associated disclaimer.////
17
////                                                             ////
18
//// This source file is free software; you can redistribute it  ////
19
//// and/or modify it under the terms of the GNU Lesser General  ////
20
//// Public License as published by the Free Software Foundation.////
21
////                                                             ////
22
//// This source is distributed in the hope that it will be      ////
23
//// useful, but WITHOUT ANY WARRANTY; without even the implied  ////
24
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR     ////
25
//// PURPOSE.  See the GNU Lesser General Public License for more////
26
//// details. http://www.gnu.org/licenses/lgpl.html              ////
27
////                                                             ////
28
//////////////////////////////////////////////////////////////////##>
29 2 eyalhoc
 
30
INCLUDE def_axi2apb.txt
31 8 eyalhoc
OUTFILE PREFIX_ctrl.v
32 2 eyalhoc
 
33 8 eyalhoc
module  PREFIX_ctrl (PORTS);
34 2 eyalhoc
 
35
 
36
   input              clk;
37
   input              reset;
38
 
39
   input              finish_wr;
40
   input              finish_rd;
41
 
42
   input              cmd_empty;
43
   input              cmd_read;
44
   input              WVALID;
45
 
46
   output                     psel;
47
   output                     penable;
48
   output                     pwrite;
49
   input                      pready;
50
 
51
 
52
   wire                       wstart;
53
   wire                       rstart;
54
 
55
   reg                        busy;
56
   reg                        psel;
57
   reg                        penable;
58
   reg                        pwrite;
59
   wire                       pack;
60
   wire                       cmd_ready;
61
 
62
 
63
   assign                     cmd_ready = (~busy) & (~cmd_empty);
64
   assign                     wstart = cmd_ready & (~cmd_read) & (~psel) & WVALID;
65
   assign                     rstart = cmd_ready & cmd_read & (~psel);
66
 
67
   assign             pack = psel & penable & pready;
68
 
69
   always @(posedge clk or posedge reset)
70
     if (reset)
71
       busy <= #FFD 1'b0;
72
     else if (psel)
73
       busy <= #FFD 1'b1;
74
     else if (finish_rd | finish_wr)
75
       busy <= #FFD 1'b0;
76
 
77
   always @(posedge clk or posedge reset)
78
     if (reset)
79
       psel <= #FFD 1'b0;
80
     else if (pack)
81
       psel <= #FFD 1'b0;
82
     else if (wstart | rstart)
83
       psel <= #FFD 1'b1;
84
 
85
   always @(posedge clk or posedge reset)
86
     if (reset)
87
       penable <= #FFD 1'b0;
88
     else if (pack)
89
       penable <= #FFD 1'b0;
90
     else if (psel)
91
       penable <= #FFD 1'b1;
92
 
93
   always @(posedge clk or posedge reset)
94
     if (reset)
95
       pwrite  <= #FFD 1'b0;
96
     else if (pack)
97
       pwrite  <= #FFD 1'b0;
98
     else if (wstart)
99
       pwrite  <= #FFD 1'b1;
100
 
101
 
102
endmodule
103
 
104
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.