OpenCores
URL https://opencores.org/ocsvn/robust_axi2apb/robust_axi2apb/trunk

Subversion Repositories robust_axi2apb

[/] [robust_axi2apb/] [trunk/] [src/] [base/] [def_axi2apb.txt] - Blame information for rev 2

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 eyalhoc
 
2
INCLUDE   def_axi2apb_static.txt
3
 
4
SWAP      #FFD        #1              ## flip-flop delay
5
 
6
SWAP      PREFIX      soc             ## prefix for all modules and file names
7
 
8
SWAP      SLAVE_NUM   8               ## number of APB slaves
9
 
10
SWAP      CMD_DEPTH   2               ## number of AXI command FIFO
11
 
12
SWAP      ADDR_BITS   24              ## AXI and APB address bits
13
SWAP      ID_BITS     4               ## AXI ID bits
14
SWAP      DEC_BITS    8               ## Address MSBits for slave decoding
15
 
16
SWAP      DEC_ADDR0   DEC_BITS'h00    ## Slave 0 address deciding
17
SWAP      DEC_ADDR1   DEC_BITS'h01    ## Slave 1 address deciding
18
SWAP      DEC_ADDR2   DEC_BITS'h02    ## Slave 2 address deciding
19
SWAP      DEC_ADDR3   DEC_BITS'h03    ## Slave 3 address deciding
20
SWAP      DEC_ADDR4   DEC_BITS'h10    ## Slave 4 address deciding
21
SWAP      DEC_ADDR5   DEC_BITS'h11    ## Slave 5 address deciding
22
SWAP      DEC_ADDR6   DEC_BITS'h12    ## Slave 6 address deciding
23
SWAP      DEC_ADDR7   DEC_BITS'h13    ## Slave 7 address deciding

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.