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INCLUDE def_ic_static.txt
 
SWAP #FFD       #1                              ##flip-flop delay
 
SWAP PREFIX     fabric_MASTER_NUM_SLAVE_NUM     ##prefix for all module and file names
 
SWAP MASTER_NUM 3                               ##number of masters
SWAP SLAVE_NUM  6                               ##number of slaves
 
DEFINE DEF_DECERR_SLV                           ##use interanl decode slave error
 
SWAP ID_BITS    3                               ##AXI ID bits
LOOP M0_IDX     2                               ##number of IDs for master 0
SWAP ID_M0_ID0  ID_BITS'b000                    ##master 0 ID0
SWAP ID_M0_ID1  ID_BITS'b001                    ##master 0 ID1
LOOP M1_IDX     1                               ##number of IDs for master 1
SWAP ID_M1_ID0  ID_BITS'b011                    ##master 1 ID0
LOOP M2_IDX     1                               ##number of IDs for master 2
SWAP ID_M2_ID0  ID_BITS'b101                    ##master 2 ID0
 
SWAP CMD_DEPTH  8                               ##AXI command depth for read and write
 
SWAP DATA_BITS 64                               ##AXI data bits
SWAP ADDR_BITS 32                               ##AXI address bits
 
SWAP USER_BITS  4                               ##AXI user bits

Line No.	Rev	Author	Line
1	2	eyalhoc	`INCLUDE def_ic_static.txt`
2
3	3	eyalhoc	`SWAP #FFD #1 ##flip-flop delay`
4	2	eyalhoc
5			`SWAP PREFIX fabric_MASTER_NUM_SLAVE_NUM ##prefix for all module and file names`
6
7			`SWAP MASTER_NUM 3 ##number of masters`
8	3	eyalhoc	`SWAP SLAVE_NUM 6 ##number of slaves`
9	2	eyalhoc
10	3	eyalhoc	`DEFINE DEF_DECERR_SLV ##use interanl decode slave error`
11	2	eyalhoc
12	3	eyalhoc	`SWAP ID_BITS 3 ##AXI ID bits`
13			`LOOP M0_IDX 2 ##number of IDs for master 0`
14			`SWAP ID_M0_ID0 ID_BITS'b000 ##master 0 ID0`
15			`SWAP ID_M0_ID1 ID_BITS'b001 ##master 0 ID1`
16	2	eyalhoc	`LOOP M1_IDX 1 ##number of IDs for master 1`
17	3	eyalhoc	`SWAP ID_M1_ID0 ID_BITS'b011 ##master 1 ID0`
18	2	eyalhoc	`LOOP M2_IDX 1 ##number of IDs for master 2`
19	3	eyalhoc	`SWAP ID_M2_ID0 ID_BITS'b101 ##master 2 ID0`
20	2	eyalhoc
21			`SWAP CMD_DEPTH 8 ##AXI command depth for read and write`
22
23			`SWAP DATA_BITS 64 ##AXI data bits`
24			`SWAP ADDR_BITS 32 ##AXI address bits`
25
26			`SWAP USER_BITS 4 ##AXI user bits`

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[/] [robust_axi_fabric/] [trunk/] [src/] [base/] [def_ic.txt] - Blame information for rev 3