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[/] [robust_axi_fabric/] [trunk/] [src/] [base/] [ic.v] - Blame information for rev 23

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1 23 eyalhoc
/*///////////////////////////////////////////////////////////////////
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////                                                             ////
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////  Author: Eyal Hochberg                                      ////
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////          eyal@provartec.com                                 ////
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////                                                             ////
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////  Downloaded from: http://www.opencores.org                  ////
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/////////////////////////////////////////////////////////////////////
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////                                                             ////
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//// Copyright (C) 2010 Provartec LTD                            ////
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//// www.provartec.com                                           ////
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//// info@provartec.com                                          ////
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////                                                             ////
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//// This source file may be used and distributed without        ////
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//// restriction provided that this copyright statement is not   ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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////                                                             ////
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//// This source file is free software; you can redistribute it  ////
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//// and/or modify it under the terms of the GNU Lesser General  ////
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//// Public License as published by the Free Software Foundation.////
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////                                                             ////
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//// This source is distributed in the hope that it will be      ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied  ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR     ////
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//// PURPOSE.  See the GNU Lesser General Public License for more////
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//// details. http://www.gnu.org/licenses/lgpl.html              ////
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////                                                             ////
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///////////////////////////////////////////////////////////////////*/
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OUTFILE PREFIX_ic.v
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INCLUDE def_ic.txt
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ITER MX
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ITER SX SLAVE_NUM ##external slave ports don't include decerr slave
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VERIFY (GROUP_MMX_ID.NUM > 0) Master MX does not have any AXI IDs
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VERIFY(UNIQUE(GONCAT(GROUP_MMX_ID ,))) Master MX IDs are not unique
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IF UNIQUE_ID VERIFY (UNIQUE(CONCAT(GONCAT(GROUP_MMX_ID ,) ,))) ##Masters IDs are not unique (Undefinig UNIQUE_ID will make IDs unique internally)
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module  PREFIX_ic (PORTS);
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   input                                      clk;
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   input                                      reset;
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   port                                       MMX_GROUP_IC_AXI.PARAM(EXTRA_BITS 0);
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   revport                                    SSX_GROUP_IC_AXI.PARAM(EXTRA_BITS MSTR_BITS);
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ENDITER SX
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ITER SX ##use global iterator
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   wire [EXPR(SLV_BITS-1):0]                   MMX_AWSLV;
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   wire [EXPR(SLV_BITS-1):0]                   MMX_ARSLV;
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   wire [EXPR(MSTR_BITS-1):0]                  SSX_AWMSTR;
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   wire [EXPR(MSTR_BITS-1):0]                  SSX_ARMSTR;
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   wire                                       SSX_AWIDOK;
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   wire                                       SSX_ARIDOK;
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IFDEF UNIQUE_ID
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   wire [EXPR(MSTR_ID_BITS-1):0]              MMX_AWID_FULL;
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   wire [EXPR(MSTR_ID_BITS-1):0]              MMX_ARID_FULL;
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   wire [EXPR(MSTR_ID_BITS-1):0]              MMX_WID_FULL;
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   wire [EXPR(MSTR_ID_BITS-1):0]              MMX_BID_FULL;
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   wire [EXPR(MSTR_ID_BITS-1):0]              MMX_RID_FULL;
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   assign                                     MMX_AWID_FULL = MMX_AWID;
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   assign                                     MMX_WID_FULL  = MMX_WID;
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   assign                                     MMX_ARID_FULL = MMX_ARID;
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   assign                                     MMX_RID       = MMX_RID_FULL;
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   assign                                     MMX_BID       = MMX_BID_FULL;
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ELSE UNIQUE_ID
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   wire [EXPR(MSTR_ID_BITS+MSTR_BITS-1):0]    MMX_AWID_FULL;
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   wire [EXPR(MSTR_ID_BITS+MSTR_BITS-1):0]    MMX_WID_FULL;
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   wire [EXPR(MSTR_ID_BITS+MSTR_BITS-1):0]    MMX_BID_FULL;
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   wire [EXPR(MSTR_ID_BITS+MSTR_BITS-1):0]    MMX_ARID_FULL;
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   wire [EXPR(MSTR_ID_BITS+MSTR_BITS-1):0]    MMX_RID_FULL;
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   assign                                     MMX_AWID_FULL = {BIN(MX MSTR_BITS), MMX_AWID};
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   assign                                     MMX_WID_FULL  = {BIN(MX MSTR_BITS), MMX_WID};
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   assign                                     MMX_ARID_FULL = {BIN(MX MSTR_BITS), MMX_ARID};
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   assign                                     MMX_RID[MSTR_ID_BITS-1:0] = MMX_RID_FULL;
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   assign                                     MMX_BID[MSTR_ID_BITS-1:0] = MMX_BID_FULL;
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ENDIF UNIQUE_ID
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   CREATE ic_addr.v def_ic.txt DEFCMD(SWAP.GLOBAL EXTRA_BITS MSTR_BITS)
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   PREFIX_ic_addr
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   PREFIX_ic_addr_rd (.clk(clk),
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                      .reset(reset),
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                      .MMX_ASLV(MMX_ARSLV),
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                      .MMX_AID(MMX_ARID_FULL),
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                      .MMX_AGROUP_IC_AXI_A.SON(CHANGE!=1)(MMX_ARGROUP_IC_AXI_A),
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                      .SSX_AMSTR(SSX_ARMSTR),
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                      .SSX_AIDOK(SSX_ARIDOK),
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                      .SSX_AGROUP_IC_AXI_A(SSX_ARGROUP_IC_AXI_A),
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                      STOMP ,
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                      );
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   PREFIX_ic_addr
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   PREFIX_ic_addr_wr (
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                      .clk(clk),
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                      .reset(reset),
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                      .MMX_ASLV(MMX_AWSLV),
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                      .MMX_AID(MMX_AWID_FULL),
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                      .MMX_AGROUP_IC_AXI_A.SON(CHANGE!=1)(MMX_AWGROUP_IC_AXI_A),
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                      .SSX_AMSTR(SSX_AWMSTR),
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                      .SSX_AIDOK(SSX_AWIDOK),
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                      .SSX_AGROUP_IC_AXI_A(SSX_AWGROUP_IC_AXI_A),
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                      STOMP ,
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                      );
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   CREATE ic_resp.v def_ic.txt DEFCMD(SWAP CONST(RW) R) DEFCMD(SWAP.GLOBAL EXTRA_BITS MSTR_BITS)
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   PREFIX_ic_resp
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   PREFIX_ic_rresp (
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                    .clk(clk),
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                    .reset(reset),
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                    .MMX_AID(MMX_ARID_FULL),
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                    .MMX_ID(MMX_RID_FULL),
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                    .MMX_AGROUP_IC_AXI_CMD.SON(CHANGE!=1)(MMX_ARGROUP_IC_AXI_CMD),
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                    .MMX_GROUP_IC_AXI_R.SON(CHANGE!=1)(MMX_RGROUP_IC_AXI_R),
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                    .SSX_GROUP_IC_AXI_R(SSX_RGROUP_IC_AXI_R),
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                    STOMP ,
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                    );
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   CREATE ic_wdata.v def_ic.txt DEFCMD(SWAP.GLOBAL EXTRA_BITS MSTR_BITS)
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   PREFIX_ic_wdata
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   PREFIX_ic_wdata (
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                    .clk(clk),
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                    .reset(reset),
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                    .MMX_AWID(MMX_AWID_FULL),
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                    .MMX_WID(MMX_WID_FULL),
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                    .MMX_AWGROUP_IC_AXI_CMD.SON(CHANGE!=1)(MMX_AWGROUP_IC_AXI_CMD),
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                    .MMX_WGROUP_IC_AXI_W.SON(CHANGE!=1)(MMX_WGROUP_IC_AXI_W),
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                    .SSX_WGROUP_IC_AXI_W(SSX_WGROUP_IC_AXI_W),
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                    .SSX_AWVALID(SSX_AWVALID),
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                    .SSX_AWREADY(SSX_AWREADY),
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                    .SSX_AWMSTR(SSX_AWMSTR),
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                    STOMP ,
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                    );
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   CREATE ic_resp.v def_ic.txt DEFCMD(SWAP CONST(RW) W) DEFCMD(SWAP.GLOBAL EXTRA_BITS MSTR_BITS)
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   PREFIX_ic_resp
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   PREFIX_ic_bresp (
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                    .clk(clk),
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                    .reset(reset),
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                    .MMX_AID(MMX_AWID_FULL),
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                    .MMX_ID(MMX_BID_FULL),
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                    .MMX_AGROUP_IC_AXI_CMD.SON(CHANGE!=1)(MMX_AWGROUP_IC_AXI_CMD),
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                    .MMX_GROUP_IC_AXI_B.SON(CHANGE!=1)(MMX_BGROUP_IC_AXI_B),
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                    .MMX_DATA(),
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                    .MMX_LAST(),
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                    .SSX_GROUP_IC_AXI_B(SSX_BGROUP_IC_AXI_B),
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                    .SSX_DATA({DATA_BITS{1'b0}}),
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                    .SSX_LAST(1'b1),
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                    STOMP ,
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                    );
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   IFDEF DEF_DECERR_SLV
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     wire            SSERR_GROUP_IC_AXI;
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   CREATE ic_decerr.v def_ic.txt DEFCMD(SWAP.GLOBAL EXTRA_BITS MSTR_BITS)
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   PREFIX_ic_decerr
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     PREFIX_ic_decerr (
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                       .clk(clk),
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                       .reset(reset),
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                       .AWIDOK(SSERR_AWIDOK),
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                       .ARIDOK(SSERR_ARIDOK),
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                       .GROUP_IC_AXI(SSERR_GROUP_IC_AXI),
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                       STOMP ,
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                       );
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   ENDIF DEF_DECERR_SLV
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     endmodule
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