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[/] [robust_axi_fabric/] [trunk/] [src/] [base/] [ic_registry_resp.v] - Blame information for rev 23

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1 23 eyalhoc
<##//////////////////////////////////////////////////////////////////
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////                                                             ////
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////  Author: Eyal Hochberg                                      ////
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////          eyal@provartec.com                                 ////
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////                                                             ////
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////  Downloaded from: http://www.opencores.org                  ////
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/////////////////////////////////////////////////////////////////////
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////                                                             ////
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//// Copyright (C) 2010 Provartec LTD                            ////
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//// www.provartec.com                                           ////
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//// info@provartec.com                                          ////
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////                                                             ////
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//// This source file may be used and distributed without        ////
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//// restriction provided that this copyright statement is not   ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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////                                                             ////
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//// This source file is free software; you can redistribute it  ////
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//// and/or modify it under the terms of the GNU Lesser General  ////
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//// Public License as published by the Free Software Foundation.////
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////                                                             ////
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//// This source is distributed in the hope that it will be      ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied  ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR     ////
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//// PURPOSE.  See the GNU Lesser General Public License for more////
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//// details. http://www.gnu.org/licenses/lgpl.html              ////
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////                                                             ////
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//////////////////////////////////////////////////////////////////##>
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OUTFILE PREFIX_ic_registry_resp.v
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ITER MX
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ITER SX
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module PREFIX_ic_registry_resp(PORTS);
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   input                            clk;
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   input                            reset;
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   port                             MMX_AGROUP_IC_AXI_CMD;
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   input [ID_BITS-1:0]              SSX_ID;
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   input                            SSX_VALID;
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   input                            SSX_READY;
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   input                            SSX_LAST;
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   output [MSTR_BITS-1:0]           SSX_MSTR;
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   output                           SSX_OK;
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   wire                             Amatch_MMX_IDGROUP_MMX_ID.IDX;
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   wire                             match_SSX_MMX_IDGROUP_MMX_ID.IDX;
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   wire                             no_Amatch_MMX;
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   wire                             cmd_push_MMX;
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   wire                             cmd_push_MMX_IDGROUP_MMX_ID.IDX;
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   wire                             cmd_pop_SSX;
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   wire                             cmd_pop_MMX_IDGROUP_MMX_ID.IDX;
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   wire [SLV_BITS-1:0]              slave_in_MMX_IDGROUP_MMX_ID.IDX;
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   wire [SLV_BITS-1:0]              slave_out_MMX_IDGROUP_MMX_ID.IDX;
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   wire                             slave_empty_MMX_IDGROUP_MMX_ID.IDX;
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   wire                             slave_full_MMX_IDGROUP_MMX_ID.IDX;
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   reg [MSTR_BITS-1:0]              ERR_MSTR_reg;
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   wire [MSTR_BITS-1:0]             ERR_MSTR;
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   reg [MSTR_BITS-1:0]              SSX_MSTR;
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   reg                              SSX_OK;
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   assign                           Amatch_MMX_IDGROUP_MMX_ID.IDX = MMX_AID == ID_BITS'bADD_IDGROUP_MMX_ID;
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   assign                           match_SSX_MMX_IDGROUP_MMX_ID.IDX = SSX_ID == ID_BITS'bADD_IDGROUP_MMX_ID;
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   assign                           cmd_push_MMX           = MMX_AVALID & MMX_AREADY;
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   assign                           cmd_push_MMX_IDGROUP_MMX_ID.IDX = cmd_push_MMX & Amatch_MMX_IDGROUP_MMX_ID.IDX;
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   assign                           cmd_pop_SSX            = SSX_VALID & SSX_READY & SSX_LAST;
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LOOP MX
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  assign                            cmd_pop_MMX_IDGROUP_MMX_ID.IDX = CONCAT((cmd_pop_SSX & match_SSX_MMX_IDGROUP_MMX_ID.IDX) |);
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ENDLOOP MX
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  assign                           slave_in_MMX_IDGROUP_MMX_ID.IDX = MMX_ASLV;
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IFDEF DEF_DECERR_SLV
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     assign                         no_Amatch_MMX         = GONCAT.REV((~Amatch_MMX_IDGROUP_MMX_ID.IDX) &);
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   always @(posedge clk or posedge reset)
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     if (reset)
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       ERR_MSTR_reg <= #FFD {MSTR_BITS{1'b0}};
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     else if (cmd_push_MMX & no_Amatch_MMX) ERR_MSTR_reg <= #FFD MSTR_BITS'dMX;
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   assign                           ERR_MSTR = ERR_MSTR_reg;
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ELSE DEF_DECERR_SLV
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   assign                           ERR_MSTR = 'd0;
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ENDIF DEF_DECERR_SLV
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LOOP SX
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   always @(*)
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     begin
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        case (SSX_ID)
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          ID_BITS'bADD_IDGROUP_MMX_ID : SSX_MSTR = MSTR_BITS'dMX;
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          default : SSX_MSTR = ERR_MSTR;
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        endcase
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     end
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   always @(*)
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     begin
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        case (SSX_ID)
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          ID_BITS'bADD_IDGROUP_MMX_ID : SSX_OK = slave_out_MMX_IDGROUP_MMX_ID.IDX == SLV_BITS'dSX;
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          default : SSX_OK = 1'b1; //SLVERR                                   
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        endcase
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     end
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ENDLOOP SX
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CREATE prgen_fifo.v DEFCMD(SWAP CONST(#FFD) #FFD)
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LOOP MX
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 LOOP IX GROUP_MMX_ID.NUM
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   prgen_fifo #(SLV_BITS, CMD_DEPTH)
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   slave_fifo_MMX_IDIX(
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                       .clk(clk),
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                       .reset(reset),
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                       .push(cmd_push_MMX_IDIX),
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                       .pop(cmd_pop_MMX_IDIX),
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                       .din(slave_in_MMX_IDIX),
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                       .dout(slave_out_MMX_IDIX),
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                       .empty(slave_empty_MMX_IDIX),
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                       .full(slave_full_MMX_IDIX)
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                       );
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   ENDLOOP IX
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ENDLOOP MX
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endmodule
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