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https://opencores.org/ocsvn/rsencoder/rsencoder/trunk
[/] [rsencoder/] [web_uploads/] [readme.txt] - Blame information for rev 6
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root |
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I/O inputs -
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Inputs :
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datain (8 bits) = serial input where message data is fed. If the message polynomial of form,
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d_nX^n + d_(n-1)X^(n-1) + ......etc., then d_n followed by d_(n-1) in the next
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clock cyle, .....etc. datain should contain a new message byte at every clock cycle
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as long as the valid is high.
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gin0.....gin15 (8 bits each ) = Generator polynomial co-effcients. The generator polynomial
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is form X^16+gin15X^15+gin14X^14+ ......gin1X+gin0.
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valid = Pull high when data becomes available. Pull low when all message bytes (total of 239
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bytes) has been entered. By pulling valid low the contents of the registers are freezed.
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Pull high when the next block (239 bytes) of message data is available.
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clkin = input clock.
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rst = reset signal to initialize registers (to all zeros).
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Outputs :
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q0....q15 (8 bits each) : Parity bytes in the polynomial form,
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q15X^15+q14X^14+ ......q0. Latch externally if required. Valid as long
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as valid signal is low.
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