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https://opencores.org/ocsvn/rtf68ksys/rtf68ksys/trunk
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robfinch |
// ============================================================================
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// 2007 Robert Finch
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// robfinch@<remove>sympatico.ca
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//
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// 74LS151 mux
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// 8-to-1 mux with enable
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//
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//
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// This source file is free software: you can redistribute it and/or modify
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// it under the terms of the GNU Lesser General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This source file is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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// ============================================================================
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//
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module VT151(e_n, s, i0, i1, i2, i3, i4, i5, i6, i7, z, z_n);
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parameter WID=1;
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input e_n;
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input [2:0] s;
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input [WID:1] i0;
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input [WID:1] i1;
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input [WID:1] i2;
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input [WID:1] i3;
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input [WID:1] i4;
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input [WID:1] i5;
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input [WID:1] i6;
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input [WID:1] i7;
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output [WID:1] z;
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output [WID:1] z_n;
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reg [WID:1] z;
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always @(e_n or s or i0 or i1 or i2 or i3 or i4 or i5 or i6 or i7)
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case({e_n,s})
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4'b0000: z <= i0;
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4'b0001: z <= i1;
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4'b0010: z <= i2;
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4'b0011: z <= i3;
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4'b0100: z <= i4;
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4'b0101: z <= i5;
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4'b0110: z <= i6;
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4'b0111: z <= i7;
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default: z <= {WID{1'b0}};
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endcase
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assign z_n = ~z;
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endmodule
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