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[/] [rv01_riscv_core/] [trunk/] [Release_Notes.txt] - Blame information for rev 5

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1 5 madsilicon
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December 2017
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This is first release of RV01 RISC-V core version 1.0.
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Release directory structure:
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RV01_RISCV_V1_0
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|
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+--> DOCS (core datasheet and reference RISC-V specifications)
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|
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+--> SIM
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|    |
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|    +--> MODELSIM (self-test simulation script)
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|    +--> ISIM (self-test simulation notes)
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|
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+--> SYN
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|    |
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|    +--> XILINX (self-test module synthesis script)
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|
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+--> VHDL (core source files)
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|    |
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|    +--> SELF_TEST (self-test module source files)
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|
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+--> Release_Notes.txt (this file)
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Additional info about files included in the current release can
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be found in README.txt files located in the sub-directories.

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