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[/] [s1_core/] [trunk/] [tools/] [bin/] [update_sparccore] - Blame information for rev 113

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Line No. Rev Author Line
1 7 fafa1971
#!/bin/bash
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3 49 fafa1971
# Check command line parameter
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if ( (test $# != 1) || ((test $1 != "-me") && (test $1 != "-se") && (test $1 != "-ee")) ) then
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  echo "update_sparccore - Script to update SPARC Core sources from a fresh OpenSPARC installation";
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  echo "(C) 2007 by Simply RISC";
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  echo "Usage:";
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  echo "      update_sparccore {-me|-se|-ee}";
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  echo "where parameter refers to the S1 Core version you want to obtain in your environment:";
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  echo "      -me : S1 Core Memory-less Edition (single-thread, no L1 caches)";
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  echo "      -se : S1 Core Single-thread Edition (single-thread, normal 16K+8K caches)";
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  echo "      -ee : S1 Core Elite Edition (four threads support, normal 16K+8K caches)";
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  echo "NOTE: To run this script you MUST have the OpenSPARC T1 environment unpacked";
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  echo "      and the T1_ROOT variable properly set in your S1_ROOT/sourceme file.";
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  exit 1;
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fi
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18 7 fafa1971
# Set source and destination directories
19 109 albert.wat
test_var S1_ROOT
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test_var T1_ROOT
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SRC_DIR=$T1_ROOT/design/sys/iop
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DST_DIR=$S1_ROOT/hdl/rtl/sparc_core
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# Clean destination directory
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rm -f $DST_DIR/*.*
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rm -f $DST_DIR/include/*.*
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# Copy all the Verilog files of the SPARC Core into destination directory
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cp $SRC_DIR/include/*.h $DST_DIR/include
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cp $SRC_DIR/srams/rtl/*.v $DST_DIR
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cp $SRC_DIR/analog/bw_clk/rtl/*.v $DST_DIR
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cp $SRC_DIR/analog/bw_rng/rtl/*.v $DST_DIR
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find $SRC_DIR/common -name "*.v" -exec cp {} $DST_DIR \;
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find $SRC_DIR/pr_macro -name "*.v" -exec cp {} $DST_DIR \;
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find $SRC_DIR/sparc -name "*.v" -exec cp {} $DST_DIR \;
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# Remove synthetized files -- if any
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find $DST_DIR -name "*_flat.v" -exec rm -f {} \;
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find $DST_DIR -name "*_flat_nc.v" -exec rm -f {} \;
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find $DST_DIR -name "*_hier.v" -exec rm -f {} \;
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42 93 fafa1971
# Also remove SPU files
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rm -f $DST_DIR/*spu*.v
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# Remove other unused files (according to liuyadong)
46 47 fafa1971
cd $DST_DIR
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rm bw_r_l2t.v bw_r_cm16x40.v bw_r_cm16x40b.v bw_r_dcm.v bw_r_efa.v bw_r_l2d.v bw_r_l2d_32k.v \
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    bw_r_l2d_rep_bot.v bw_r_l2d_rep_top.v bw_r_rf16x128d.v bw_r_rf32x108.v bw_rf_16x65.v bw_rf_16x81.v \
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    bw_clk_cclk_hdr_48x.v bw_clk_cclk_hdr_64x.v bw_clk_cclk_inv_128x.v bw_clk_cclk_inv_48x.v \
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    bw_clk_cclk_inv_64x.v bw_clk_cclk_inv_96x.v bw_clk_cclk_scanlasr_2x.v bw_clk_cclk_sync.v \
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    bw_clk_gclk_center_3inv.v bw_clk_gclk_inv_192x.v bw_clk_gclk_inv_224x.v bw_clk_gclk_inv_288x.v \
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    bw_clk_gclk_inv_r90_192x.v bw_clk_gclk_inv_r90_224x.v bw_clk_gclk_inv_r90_256x.v bw_clk_gclk_sctag_3inv.v \
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    bw_clk_gl.v bw_clk_gl_fdbk.v bw_clk_gl_hz.v bw_clk_gl_rstce_rtl.v bw_clk_gl_vrt_all.v flop_rptrs_xa0.v \
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    flop_rptrs_xa1.v flop_rptrs_xb0.v flop_rptrs_xb1.v flop_rptrs_xb2.v flop_rptrs_xb3.v flop_rptrs_xc0.v \
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    flop_rptrs_xc1.v flop_rptrs_xc2.v flop_rptrs_xc3.v flop_rptrs_xc4.v flop_rptrs_xc5.v flop_rptrs_xc6.v \
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    flop_rptrs_xc7.v bw_rng.v cluster_header_ctu.v cluster_header_dup.v cluster_header_sync.v dbl_buf.v \
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    sync_pulse_synchronizer.v synchronizer_asr_dup.v ucb_bus_in.v ucb_bus_out.v ucb_flow_2buf.v \
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    ucb_flow_jbi.v ucb_flow_spi.v ucb_noflow.v spc_pcx_buf.v
59
 
60 113 albert.wat
## Clean the files by substituting the $error System Task and applying defines with Icarus preprocessor
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#for file in $DST_DIR/*.v ; do
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#  sed -e 's/\$error/\$display/g' $file | sed -e 's/negedge rclk or rst_l/negedge rclk/g' > $DST_DIR/temp.v
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#  if(test $1 == "-me" || test $1 == "-se") then
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#    iverilog -E -D CMP_CLK_PERIOD=1 -D FPGA_SYN -D FPGA_SYN_1THREAD -D FPGA_SYN_NO_SPU -I $DST_DIR/include -o$file $DST_DIR/temp.v
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#  else
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#    iverilog -E -D CMP_CLK_PERIOD=1 -D FPGA_SYN -D FPGA_SYN_NO_SPU -I $DST_DIR/include -o$file $DST_DIR/temp.v
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#  fi
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#  # These steps are required because Icarus does not allow this kind of comments
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#  sed -e 's/\* ========== Copyright Header Begin/\/\* ========== Copyright Header Begin/g' $file > $DST_DIR/temp.v
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#  mv -f $DST_DIR/temp.v $file
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#done
72 7 fafa1971
 
73 113 albert.wat
## Correct some strange strings
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#sed -e 's/sparc_exu_alulogic logic/sparc_exu_alulogic logic_MAYBEARESERVEDWORD/g' $DST_DIR/sparc_exu_alu.v > $DST_DIR/temp.v
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#mv $DST_DIR/temp.v $DST_DIR/sparc_exu_alu.v
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#sed -e 's/logic/logic_MAYBEARESERVEDWORD/g' $DST_DIR/sparc_ffu_ctl_visctl.v > $DST_DIR/temp.v
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#mv $DST_DIR/temp.v $DST_DIR/sparc_ffu_ctl_visctl.v
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#sed -e 's/$display(\"ILLEGAL_THR_STATE\"/\/\/$display(\"ILLEGAL_THR_STATE\"/g' sparc_ifu_thrfsm.v > $DST_DIR/temp.v
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#mv $DST_DIR/temp.v $DST_DIR/sparc_ifu_thrfsm.v
80
#sed -e 's/(\* keep = "yes" \*)//g' $DST_DIR/bw_r_frf.v > $DST_DIR/temp.v
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#mv $DST_DIR/temp.v $DST_DIR/bw_r_frf.v
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#sed -e 's/synthesis translate_/synopsys translate_/g' $DST_DIR/bw_r_irf.v > $DST_DIR/temp.v
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#mv $DST_DIR/temp.v $DST_DIR/bw_r_irf.v
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#sed -e 's/initial onereg/\/\/initial onereg/g' $DST_DIR/bw_r_irf_register.v > $DST_DIR/temp.v
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#mv $DST_DIR/temp.v $DST_DIR/bw_r_irf_register.v
86 61 fafa1971
 
87 113 albert.wat
## After preprocessing we can safely delete the include directory
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#rm -f $DST_DIR/include/*.*
89 61 fafa1971
 
90 113 albert.wat
## Disable L1 Instruction and Data Caches if required
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#if(test $1 == "-me") then
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#  cp -f $S1_ROOT/tools/src/bw_r_dcd.v $DST_DIR
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#  cp -f $S1_ROOT/tools/src/bw_r_icd.v $DST_DIR
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#  cp -f $S1_ROOT/tools/src/bw_r_idct.v $DST_DIR
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#fi
96 41 fafa1971
 
97 113 albert.wat
## Hack the SPARC Core to add the external stall input from the bridge
98
## Cookbook from book "OpenSPARC Internals", paragraph 6.8
99 97 fafa1971
 
100 113 albert.wat
## Top-level of SPARC Core (s1_top.sparc)
101
#sed -e 's/pcx_spc_grant_px,/pcx_spc_grant_px,wbm_spc_stall,wbm_spc_resume,/g' $DST_DIR/sparc.v |
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#  sed -e 's/pcx_spc_grant_px;/pcx_spc_grant_px;input wbm_spc_stall;input wbm_spc_resume;/g' |
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#  sed -e 's/sparc_ifu ifu(/sparc_ifu ifu(.wbm_spc_stall(wbm_spc_stall),.wbm_spc_resume(wbm_spc_resume),/g' > $DST_DIR/sparc_TMP.v
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#mv -f $DST_DIR/sparc_TMP.v $DST_DIR/sparc.v
105 97 fafa1971
 
106 113 albert.wat
## Fetch unit (s1_top.sparc.ifu)
107
#sed -e 's/ffu_ifu_stallreq,/ffu_ifu_stallreq,wbm_spc_stall,wbm_spc_resume,/g' $DST_DIR/sparc_ifu.v |
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#  sed -e 's/ffu_ifu_stallreq;/ffu_ifu_stallreq;input wbm_spc_stall;input wbm_spc_resume;/g' |
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#  sed -e 's/sparc_ifu_swl swl(/sparc_ifu_swl swl(.wbm_spc_stall(wbm_spc_stall),.wbm_spc_resume(wbm_spc_resume),/g' > $DST_DIR/sparc_ifu_TMP.v
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#mv -f $DST_DIR/sparc_ifu_TMP.v $DST_DIR/sparc_ifu.v
111 7 fafa1971
 
112 113 albert.wat
## Switch logic unit (s1_top.sparc.ifu.swl)
113
#sed -e 's/thr_config_in_m,/thr_config_in_m,wbm_spc_stall,wbm_spc_resume,/g' $DST_DIR/sparc_ifu_swl.v |
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#  sed -e 's/thr_config_in_m;/thr_config_in_m;input wbm_spc_stall;input wbm_spc_resume;wire wait_state;/g' |
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#  sed -e 's/sparc_ifu_thrcmpl compl(/sparc_ifu_thrcmpl compl(.wbm_spc_stall(wbm_spc_stall),.wbm_spc_resume(wbm_spc_resume),.wait_state(wait_state),/g' |
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#  sed -e 's/(~wm_stbwait | stb_retry);/(~wm_stbwait|stb_retry)\&(~wait_state|wbm_spc_resume);/g' |
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#  sed -e 's/wm_stbwait & ~stb_retry);/wm_stbwait \& ~stb_retry|wait_state \& ~wbm_spc_resume);/g' > $DST_DIR/sparc_ifu_swl_TMP.v
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#mv -f $DST_DIR/sparc_ifu_swl_TMP.v $DST_DIR/sparc_ifu_swl.v
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120 113 albert.wat
## Stall completion logic (s1_top.sparc.ifu.swl.compl)
121
#sed -e 's/clear_wmo_e,/clear_wmo_e,wbm_spc_stall,wbm_spc_resume,wait_state,/g' $DST_DIR/sparc_ifu_thrcmpl.v |
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#  sed -e 's/clear_wmo_e;/clear_wmo_e;input wbm_spc_stall;input wbm_spc_resume;output wait_state;wire wait_next;/g' |
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#  sed -e 's/endmodule/assign wait_next=wbm_spc_stall|(wait_state \& ~wbm_spc_resume);\nendmodule/g' |
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#  sed -e 's/endmodule/dffr wait_ff(.din(wait_next),.q(wait_state),.clk(clk),.rst(reset),.se(se),.si(),.so());\nendmodule/g' |
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#  sed -e 's/assign completion/assign completion[0]/g' |
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#  sed -e 's/endmodule/assign completion[1]=completion[0];\nendmodule/g' |
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#  sed -e 's/endmodule/assign completion[2]=completion[0];\nendmodule/g' |
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#  sed -e 's/endmodule/assign completion[3]=completion[0];\nendmodule/g' |
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#  sed -e 's/wm_stbwait));/wm_stbwait|wait_state));/g' > $DST_DIR/sparc_ifu_thrcmpl_TMP.v
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#mv -f $DST_DIR/sparc_ifu_thrcmpl_TMP.v $DST_DIR/sparc_ifu_thrcmpl.v
131 97 fafa1971
 
132 113 albert.wat
## This is a temporary hack to take a top-level SPARC Core with the SPU instance removed by-hand (ifdef is wrong)
133
#cp -f $S1_ROOT/tools/src/sparc.v $DST_DIR
134 93 fafa1971
 
135 7 fafa1971
# Copy also behavioral libraries used for RTL simulations
136
DST_DIR=$S1_ROOT/hdl/behav/sparc_libs
137 15 fafa1971
rm -f $DST_DIR/*.*
138 7 fafa1971
cp $SRC_DIR/../../../lib/m1/m1.behV $DST_DIR/m1_lib.v
139
cp $SRC_DIR/../../../lib/u1/u1.behV $DST_DIR/u1_lib.v
140
 
141 109 albert.wat
 

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