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[/] [s6soc/] [trunk/] [cmodtop.ucf] - Blame information for rev 12

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1 11 dgisselq
################################################################################
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##
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## Filename:    cmod.ucf
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##
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## Project:     CMod S6 System on a Chip, ZipCPU demonstration project
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##
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## Purpose:     This file is really from Digilent, and so the copyright
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##              statement below applies only to those changes that have been
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##      made to modify it to support the CMod S6 SoC project.  That said ...
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##
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##      This file specifies the pin connections for all of the peripherals
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##      connected to the Cmod S6 SoC.
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##
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##      Further, this file is *specific* to the main ZipCPU build.  Apparently,
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##      two top level files require two ucf files, so this file applies to the
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##      main ZipCPU build, and the other file to the alternate, auxiliary build.
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##
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##
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## Creator:     Dan Gisselquist, Ph.D.
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##              Gisselquist Technology, LLC
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##
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################################################################################
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##
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## Copyright (C) 2015-2016, Gisselquist Technology, LLC
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##
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## This program is free software (firmware): you can redistribute it and/or
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## modify it under the terms of  the GNU General Public License as published
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## by the Free Software Foundation, either version 3 of the License, or (at
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## your option) any later version.
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##
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## This program is distributed in the hope that it will be useful, but WITHOUT
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## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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## for more details.
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##
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## You should have received a copy of the GNU General Public License along
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## with this program.  (It's in the $(ROOT)/doc directory, run make with no
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## target there if the PDF file isn't present.)  If not, see
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##  for a copy.
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##
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## License:     GPL, v3, as defined and found on www.gnu.org,
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##              http://www.gnu.org/licenses/gpl.html
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##
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##
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################################################################################
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##
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##
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#FPGA_GCLK
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NET "i_clk_8mhz" LOC = "N8" | IOSTANDARD = LVCMOS33;
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NET "i_clk_8mhz" TNM_NET = "i_clk_8mhz";
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TIMESPEC "TSi_clk_8mhz" = PERIOD "i_clk_8mhz" 125.0 ns HIGH 50%;
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#CLK_LFC
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# NET "i_clk_pps" LOC = "N7" | IOSTANDARD = LVCMOS33;
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#BTNs
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NET "i_btn<0>" LOC = "P8" | IOSTANDARD = LVCMOS33;
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NET "i_btn<1>" LOC = "P9" | IOSTANDARD = LVCMOS33;
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#LEDs
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NET "o_led<0>" LOC = "N3" | IOSTANDARD = LVCMOS33;
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NET "o_led<1>" LOC = "P3" | IOSTANDARD = LVCMOS33;
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NET "o_led<2>" LOC = "N4" | IOSTANDARD = LVCMOS33;
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NET "o_led<3>" LOC = "P4" | IOSTANDARD = LVCMOS33;
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# Flash
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NET "o_qspi_sck"     LOC="N13"  | IOSTANDARD = LVCMOS33;
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NET "o_qspi_cs_n"    LOC="P2"   | IOSTANDARD = LVCMOS33;
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NET "io_qspi_dat<0>" LOC="P11"     | IOSTANDARD = LVCMOS33;
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NET "io_qspi_dat<1>" LOC="N11"     | IOSTANDARD = LVCMOS33;
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NET "io_qspi_dat<2>" LOC="N10"     | IOSTANDARD = LVCMOS33;
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NET "io_qspi_dat<3>" LOC="P10"     | IOSTANDARD = LVCMOS33;
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#DEPP Signals
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# NET "o_depp_wait"     LOC = "B6"  | IOSTANDARD = LVCMOS33;
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# NET "i_depp_astb_n"   LOC = "A6"  | IOSTANDARD = LVCMOS33;
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# NET "i_depp_dstb_n"   LOC = "B7"  | IOSTANDARD = LVCMOS33;
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# NET "i_depp_write_n"  LOC = "A7"  | IOSTANDARD = LVCMOS33;
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# NET "io_depp_data<0>" LOC = "B9"  | IOSTANDARD = LVCMOS33;
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# NET "io_depp_data<1>" LOC = "A9"  | IOSTANDARD = LVCMOS33;
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# NET "io_depp_data<2>" LOC = "B10" | IOSTANDARD = LVCMOS33;
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# NET "io_depp_data<3>" LOC = "A10" | IOSTANDARD = LVCMOS33;
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# NET "io_depp_data<4>" LOC = "B11" | IOSTANDARD = LVCMOS33;
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# NET "io_depp_data<5>" LOC = "A11" | IOSTANDARD = LVCMOS33;
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# NET "io_depp_data<6>" LOC = "B12" | IOSTANDARD = LVCMOS33;
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# NET "io_depp_data<7>" LOC = "A12" | IOSTANDARD = LVCMOS33;
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#IO PORTs
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# UART: PIO26 (CTS), PIO27 (TXD), PIO28(RXD), PIO29(RTS)
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NET "i_uart"  LOC = "B3"  | IOSTANDARD = LVCMOS33;
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NET "o_uart"  LOC = "A2"  | IOSTANDARD = LVCMOS33;
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NET "i_uart_rts" LOC = "B1"  | IOSTANDARD = LVCMOS33;
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NET "o_uart_cts" LOC = "A3"  | IOSTANDARD = LVCMOS33;
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# PWM-Audio: Shutdown (PIO46), Gain (PIO47), PWM-Audio (PIO48)
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NET "o_pwm"   LOC = "M2" | IOSTANDARD = LVCMOS33;
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NET "o_pwm_shutdown_n" LOC = "L2" | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "o_pwm_gain"       LOC = "M1" | IOSTANDARD = LVCMOS33 | PULLUP;
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# I2C
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NET "io_scl"  LOC = "E14" | IOSTANDARD = LVCMOS33 | PULLUP;     # io_scl, PIO44
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NET "io_sda"  LOC = "G13" | IOSTANDARD = LVCMOS33 | PULLUP;     # io_sda, PIO45
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#
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# o_gpio<0> and o_gpio<1> have been borrowed for io_scl and io_sda, hence we
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# start our count here at 2
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#
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# NET "o_gpio<0>"  LOC = "G13" | IOSTANDARD = LVCMOS33;    # io_sda
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# NET "o_gpio<1>"  LOC = "E14" | IOSTANDARD = LVCMOS33;    # io_scl
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NET "o_gpio<2>"  LOC = "D13" | IOSTANDARD = LVCMOS33;      # display o_mosi
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NET "o_gpio<3>"  LOC = "E13" | IOSTANDARD = LVCMOS33;      # display o_sck
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NET "o_gpio<4>"  LOC = "C13" | IOSTANDARD = LVCMOS33;      # display o_ss
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NET "o_gpio<5>"  LOC = "G14" | IOSTANDARD = LVCMOS33;
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NET "o_gpio<6>"  LOC = "F13" | IOSTANDARD = LVCMOS33;
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NET "o_gpio<7>"  LOC = "F14" | IOSTANDARD = LVCMOS33;
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NET "o_gpio<8>"  LOC = "H13" | IOSTANDARD = LVCMOS33;
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NET "o_gpio<9>"  LOC = "H14" | IOSTANDARD = LVCMOS33;
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NET "o_gpio<10>" LOC = "J13" | IOSTANDARD = LVCMOS33;
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NET "o_gpio<11>" LOC = "J14" | IOSTANDARD = LVCMOS33;
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NET "o_gpio<12>" LOC = "C1" | IOSTANDARD = LVCMOS33;
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NET "o_gpio<13>" LOC = "D1" | IOSTANDARD = LVCMOS33;
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NET "o_gpio<14>" LOC = "D2" | IOSTANDARD = LVCMOS33;
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NET "o_gpio<15>" LOC = "E1" | IOSTANDARD = LVCMOS33;
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#
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# As with the o_gpio wires, i_gpio<0> and i_gpio<1> have been borrowed for
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# io_scl and io_sda, hence we start our count here at 2
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#
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# NET "i_gpio<0>"  LOC = "G13" | IOSTANDARD = LVCMOS33;    # io_sda
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# NET "i_gpio<1>"  LOC = "E14" | IOSTANDARD = LVCMOS33;    # io_scl
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NET "i_gpio<2>"  LOC = "D14" | IOSTANDARD = LVCMOS33;      # display miso
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NET "i_gpio<3>"  LOC = "E2" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<4>"  LOC = "F1" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<5>"  LOC = "F2" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<6>"  LOC = "H1" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<7>"  LOC = "H2" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<8>"  LOC = "G1" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<9>"  LOC = "G2" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<10>" LOC = "J1" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<11>" LOC = "J2" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<12>" LOC = "K1" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<13>" LOC = "K2" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<14>" LOC = "L1" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<15>" LOC = "N12" | IOSTANDARD = LVCMOS33;
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NET "o_kp_col<0>" LOC = "P5" | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "o_kp_col<1>" LOC = "N5" | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "o_kp_col<2>" LOC = "N6" | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "o_kp_col<3>" LOC = "P7" | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "i_kp_row<0>" LOC = "L14" | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "i_kp_row<1>" LOC = "L13"  | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "i_kp_row<2>" LOC = "K14" | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "i_kp_row<3>" LOC = "K13" | IOSTANDARD = LVCMOS33 | PULLUP;
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