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[/] [s6soc/] [trunk/] [sw/] [host/] [readflash.cpp] - Blame information for rev 22

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1 11 dgisselq
////////////////////////////////////////////////////////////////////////////////
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//
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// Filename:    readflash.cpp
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//
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// Project:     CMod S6 System on a Chip, ZipCPU demonstration project
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//
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// Purpose:     Read/Empty the entire contents of the flash memory to a file.
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//              The flash is unchanged by this process.
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//
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// Creator:     Dan Gisselquist, Ph.D.
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//              Gisselquist Technology, LLC
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2015-2016, Gisselquist Technology, LLC
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//
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of  the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with this program.  (It's in the $(ROOT)/doc directory, run make with no
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// target there if the PDF file isn't present.)  If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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//
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// License:     GPL, v3, as defined and found on www.gnu.org,
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//              http://www.gnu.org/licenses/gpl.html
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <strings.h>
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#include <ctype.h>
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#include <string.h>
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#include <signal.h>
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#include <assert.h>
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#include "devbus.h"
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#include "llcomms.h"
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#include "deppi.h"
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#include "ttybus.h"
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#include "regdefs.h"
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#define FPGAOPEN(SN)    new FPGA(new DEPPI(SN))
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FPGA    *m_fpga;
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void    closeup(int v) {
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        m_fpga->kill();
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        exit(0);
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}
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// #define      DUMPMEM         RAMBASE
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// #define      DUMPWORDS       MEMWORDS
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#define DUMPMEM         SPIFLASH
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#define DUMPWORDS       FLASHWORDS      // 1MB Flash
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int main(int argc, char **argv) {
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        FILE    *fp;
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        const int       BUFLN = DUMPWORDS;
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        FPGA::BUSW      *buf = new FPGA::BUSW[BUFLN];
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        char    szSel[64];
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        strcpy(szSel, "SN:210282768825");
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        m_fpga = FPGAOPEN(szSel);
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        fprintf(stderr, "Before starting, nread = %ld\n",
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                m_fpga->m_total_nread);
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        // Start with testing the version:
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        printf("VERSION: %08x\n", m_fpga->readio(R_VERSION));
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        // SPI flash testing
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        // Enable the faster (vector) reads
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        bool    vector_read = true;
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        unsigned        sz;
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        if (vector_read) {
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                try {
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                for(int i=0; i<BUFLN; i+= 2048) {
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                        printf("i = %02x / %04x, addr = i + %04x = %08x\n", i, BUFLN, DUMPMEM, i+DUMPMEM);
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                        m_fpga->readi(DUMPMEM+i, 2048, &buf[i]);
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                }} catch(BUSERR a) {
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                        printf("%08x : BUS-ERR\n", a.addr);
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                }
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        } else {
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                for(int i=0; i<BUFLN; i++) {
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                        buf[i] = m_fpga->readio(DUMPMEM+i);
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                        // if (0 == (i&0x0ff))
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                                printf("i = %02x / %04x, addr = i + %04x = %08x\n", i, BUFLN, DUMPMEM, i+DUMPMEM);
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                }
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        }
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        printf("\nREAD-COMPLETE\n");
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        // Now, let's find the end
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        sz = BUFLN-1;
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        while((sz>0)&&(buf[sz] == 0xffffffff))
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                sz--;
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        sz+=1;
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        printf("The size of the buffer is 0x%06x or %d words\n", sz, sz);
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        fp = fopen("qspiflash.bin","w");
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        fwrite(buf, sizeof(buf[0]), sz, fp);
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        fclose(fp);
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        printf("The read was accomplished in %ld bytes over the UART\n",
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                m_fpga->m_total_nread);
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        if (m_fpga->poll())
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                printf("FPGA was interrupted\n");
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        delete  m_fpga;
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}
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