OpenCores
URL https://opencores.org/ocsvn/s80186/s80186/trunk

Subversion Repositories s80186

[/] [s80186/] [trunk/] [sim/] [cppmodel/] [instructions/] [and.cpp] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 jamieiles
// Copyright Jamie Iles, 2017
2
//
3
// This file is part of s80x86.
4
//
5
// s80x86 is free software: you can redistribute it and/or modify
6
// it under the terms of the GNU General Public License as published by
7
// the Free Software Foundation, either version 3 of the License, or
8
// (at your option) any later version.
9
//
10
// s80x86 is distributed in the hope that it will be useful,
11
// but WITHOUT ANY WARRANTY; without even the implied warranty of
12
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
// GNU General Public License for more details.
14
//
15
// You should have received a copy of the GNU General Public License
16
// along with s80x86.  If not, see <http://www.gnu.org/licenses/>.
17
 
18
// and r, r/m, 8-bit
19
void EmulatorPimpl::and20()
20
{
21
    modrm_decoder->set_width(OP_WIDTH_8);
22
    modrm_decoder->decode();
23
 
24
    uint8_t v1 = read_data<uint8_t>();
25
    uint8_t v2 = registers->get(modrm_decoder->reg());
26
 
27
    uint8_t result;
28
    uint16_t flags;
29
    std::tie(flags, result) = do_and<uint8_t>(v1, v2);
30
    flags &= ~(CF | OF);
31
 
32
    registers->set_flags(flags, OF | SF | ZF | CF | PF);
33
    write_data<uint8_t>(result & 0xff);
34
}
35
 
36
// and r, r/m, 16-bit
37
void EmulatorPimpl::and21()
38
{
39
    modrm_decoder->set_width(OP_WIDTH_16);
40
    modrm_decoder->decode();
41
 
42
    uint16_t v1 = read_data<uint16_t>();
43
    uint16_t v2 = registers->get(modrm_decoder->reg());
44
 
45
    uint16_t result, flags;
46
    std::tie(flags, result) = do_and<uint16_t>(v1, v2);
47
    flags &= ~(CF | OF);
48
 
49
    registers->set_flags(flags, OF | SF | ZF | CF | PF);
50
    write_data<uint16_t>(result & 0xffff);
51
}
52
 
53
// and r/m, r, 8-bit
54
void EmulatorPimpl::and22()
55
{
56
    modrm_decoder->set_width(OP_WIDTH_8);
57
    modrm_decoder->decode();
58
 
59
    uint8_t v1 = read_data<uint8_t>();
60
    uint8_t v2 = registers->get(modrm_decoder->reg());
61
 
62
    uint8_t result;
63
    uint16_t flags;
64
    std::tie(flags, result) = do_and<uint8_t>(v1, v2);
65
    flags &= ~(CF | OF);
66
 
67
    registers->set_flags(flags, OF | SF | ZF | CF | PF);
68
    registers->set(modrm_decoder->reg(), result & 0xff);
69
}
70
 
71
// and r/m, r, 16-bit
72
void EmulatorPimpl::and23()
73
{
74
    modrm_decoder->set_width(OP_WIDTH_16);
75
    modrm_decoder->decode();
76
 
77
    uint16_t v1 = read_data<uint16_t>();
78
    uint16_t v2 = registers->get(modrm_decoder->reg());
79
 
80
    uint16_t result;
81
    uint16_t flags;
82
    std::tie(flags, result) = do_and<uint16_t>(v1, v2);
83
    flags &= ~(CF | OF);
84
 
85
    registers->set_flags(flags, OF | SF | ZF | CF | PF);
86
    registers->set(modrm_decoder->reg(), result & 0xffff);
87
}
88
 
89
void EmulatorPimpl::and24()
90
{
91
    auto v1 = registers->get(AL);
92
    auto v2 = fetch_byte();
93
    uint8_t result;
94
    uint16_t flags;
95
    std::tie(flags, result) = do_and<uint8_t>(v1, v2);
96
    flags &= ~(CF | OF);
97
 
98
    registers->set_flags(flags, OF | SF | ZF | CF | PF);
99
    registers->set(AL, result);
100
}
101
 
102
void EmulatorPimpl::and25()
103
{
104
    auto v1 = registers->get(AX);
105
    auto v2 = fetch_16bit();
106
    uint16_t result;
107
    uint16_t flags;
108
    std::tie(flags, result) = do_and<uint16_t>(v1, v2);
109
    flags &= ~(CF | OF);
110
 
111
    registers->set_flags(flags, OF | SF | ZF | CF | PF);
112
    registers->set(AX, result);
113
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.