OpenCores
URL https://opencores.org/ocsvn/s80186/s80186/trunk

Subversion Repositories s80186

[/] [s80186/] [trunk/] [tests/] [instructions/] [TestExtend.cpp] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 jamieiles
// Copyright Jamie Iles, 2017
2
//
3
// This file is part of s80x86.
4
//
5
// s80x86 is free software: you can redistribute it and/or modify
6
// it under the terms of the GNU General Public License as published by
7
// the Free Software Foundation, either version 3 of the License, or
8
// (at your option) any later version.
9
//
10
// s80x86 is distributed in the hope that it will be useful,
11
// but WITHOUT ANY WARRANTY; without even the implied warranty of
12
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
// GNU General Public License for more details.
14
//
15
// You should have received a copy of the GNU General Public License
16
// along with s80x86.  If not, see <http://www.gnu.org/licenses/>.
17
 
18
#include <sstream>
19
#include <vector>
20
#include <gtest/gtest.h>
21
 
22
#include "EmulateFixture.h"
23
#include "Flags.h"
24
 
25
TEST_F(EmulateFixture, CbwPositive)
26
{
27
    write_reg(AL, 0x40);
28
    set_instruction({0x98});
29
 
30
    emulate();
31
 
32
    ASSERT_EQ(read_reg(AX), 0x0040);
33
    ASSERT_PRED_FORMAT2(AssertFlagsEqual, read_flags(), FLAGS_STUCK_BITS);
34
}
35
 
36
TEST_F(EmulateFixture, CbwNegative)
37
{
38
    write_reg(AL, 0x80);
39
    set_instruction({0x98});
40
 
41
    emulate();
42
 
43
    ASSERT_EQ(read_reg(AX), 0xff80);
44
    ASSERT_PRED_FORMAT2(AssertFlagsEqual, read_flags(), FLAGS_STUCK_BITS);
45
}
46
 
47
TEST_F(EmulateFixture, CwdPositive)
48
{
49
    write_reg(AX, 0x4000);
50
    set_instruction({0x99});
51
 
52
    emulate();
53
 
54
    ASSERT_EQ(read_reg(AX), 0x4000);
55
    ASSERT_EQ(read_reg(DX), 0x0000);
56
    ASSERT_PRED_FORMAT2(AssertFlagsEqual, read_flags(), FLAGS_STUCK_BITS);
57
}
58
 
59
TEST_F(EmulateFixture, CwdNegative)
60
{
61
    write_reg(AX, 0x8000);
62
    set_instruction({0x99});
63
 
64
    emulate();
65
 
66
    ASSERT_EQ(read_reg(AX), 0x8000);
67
    ASSERT_EQ(read_reg(DX), 0xffff);
68
    ASSERT_PRED_FORMAT2(AssertFlagsEqual, read_flags(), FLAGS_STUCK_BITS);
69
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.