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[/] [s80186/] [trunk/] [tests/] [instructions/] [TestInvalid.cpp] - Blame information for rev 2

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1 2 jamieiles
// Copyright Jamie Iles, 2017
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//
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// This file is part of s80x86.
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//
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// s80x86 is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// s80x86 is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with s80x86.  If not, see <http://www.gnu.org/licenses/>.
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#include <vector>
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#include <gtest/gtest.h>
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#include "EmulateFixture.h"
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#include "Flags.h"
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class InvalidOpcodeFixture
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    : public EmulateFixture,
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      public ::testing::WithParamInterface<std::vector<uint8_t>>
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{
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};
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TEST_P(InvalidOpcodeFixture, InvalidOpcode)
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{
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    write_mem16(VEC_INVALID_OPCODE + 2, 0x8000, CS); // CS
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    write_mem16(VEC_INVALID_OPCODE + 0, 0x0100, CS); // IP
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    write_reg(SP, 0x100);
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    write_reg(CS, 0x7c00);
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    write_reg(IP, 0x0001);
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    write_flags(IF);
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    set_instruction(GetParam());
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    emulate();
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    EXPECT_PRED_FORMAT2(AssertFlagsEqual, read_flags(), FLAGS_STUCK_BITS);
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    EXPECT_EQ(read_reg(CS), 0x8000);
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    EXPECT_EQ(read_reg(IP), 0x0100);
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    EXPECT_EQ(read_reg(SP), 0x0100 - 6);
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    EXPECT_EQ(read_mem16(0x100 - 2, SS), FLAGS_STUCK_BITS | IF);
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    EXPECT_EQ(read_mem16(0x100 - 4, SS), 0x7c00);
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    // Return to the following instruction
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    EXPECT_EQ(read_mem16(0x100 - 6, SS), 0x0001 + GetParam().size());
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}
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INSTANTIATE_TEST_CASE_P(InvalidOpcode,
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                        InvalidOpcodeFixture,
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                        ::testing::Values(std::vector<uint8_t>{0x0f},
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                                          std::vector<uint8_t>{0x63},
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                                          std::vector<uint8_t>{0x64},
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                                          std::vector<uint8_t>{0x65},
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                                          std::vector<uint8_t>{0x66},
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                                          std::vector<uint8_t>{0x67},
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                                          std::vector<uint8_t>{0xf1},
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                                          std::vector<uint8_t>{0xfe, 0xff},
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                                          std::vector<uint8_t>{0xff, 0xff}));
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class UnimplementedOpcodeFixture
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    : public EmulateFixture,
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      public ::testing::WithParamInterface<std::vector<uint8_t>>
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{
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};
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TEST_P(UnimplementedOpcodeFixture, UnimplementedOpcode)
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{
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    set_instruction(GetParam());
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    emulate();
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    ASSERT_FALSE(instruction_had_side_effects());
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}
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INSTANTIATE_TEST_CASE_P(UnimplementedOpcode,
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                        UnimplementedOpcodeFixture,
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                        ::testing::Values(
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                            // inc
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                            std::vector<uint8_t>{0xfe, 2 << 3},
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                            std::vector<uint8_t>{0xfe, 3 << 3},
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                            std::vector<uint8_t>{0xfe, 4 << 3},
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                            std::vector<uint8_t>{0xfe, 5 << 3},
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                            std::vector<uint8_t>{0xfe, 6 << 3},
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                            // pop
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                            std::vector<uint8_t>{0x8f, 1 << 3},
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                            std::vector<uint8_t>{0x8f, 2 << 3},
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                            std::vector<uint8_t>{0x8f, 3 << 3},
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                            std::vector<uint8_t>{0x8f, 4 << 3},
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                            std::vector<uint8_t>{0x8f, 5 << 3},
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                            std::vector<uint8_t>{0x8f, 6 << 3},
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                            std::vector<uint8_t>{0x8f, 7 << 3},
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                            // mov
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                            std::vector<uint8_t>{0xc6, 1 << 3},
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                            std::vector<uint8_t>{0xc6, 2 << 3},
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                            std::vector<uint8_t>{0xc6, 3 << 3},
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                            std::vector<uint8_t>{0xc6, 4 << 3},
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                            std::vector<uint8_t>{0xc6, 5 << 3},
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                            std::vector<uint8_t>{0xc6, 6 << 3},
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                            std::vector<uint8_t>{0xc6, 7 << 3},
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                            std::vector<uint8_t>{0xc7, 1 << 3},
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                            std::vector<uint8_t>{0xc7, 2 << 3},
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                            std::vector<uint8_t>{0xc7, 3 << 3},
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                            std::vector<uint8_t>{0xc7, 4 << 3},
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                            std::vector<uint8_t>{0xc7, 5 << 3},
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                            std::vector<uint8_t>{0xc7, 6 << 3},
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                            std::vector<uint8_t>{0xc7, 7 << 3},
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                            // lds
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                            std::vector<uint8_t>{0xc5, 0xc0},
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                            // les
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                            std::vector<uint8_t>{0xc4, 0xc0},
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                            // lea
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                            std::vector<uint8_t>{0x8d, 0xc0},
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                            // call indirect inter reg
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                            std::vector<uint8_t>{0xff, 3 << 6 | 3 << 3}));

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