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Subversion Repositories sata_controller_core

[/] [sata_controller_core/] [trunk/] [sata2_bus_v1_00_a/] [base_system/] [pcores/] [npi_core_v1_00_a/] [devl/] [create.cip] - Blame information for rev 11

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Line No. Rev Author Line
1 11 ashwin_men
CipWiz::SetVersion "12.2";
2
CipWiz::SetFlow "CREATE";
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CipWiz::SetParameter "ProjectDir" "/home/ashwin/work/SATA/ml605/12.2/SATA_PCIE/base_SATA_PCIE_NPI_2";
4
CipWiz::SetParameter "IpName" "npi_core";
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CipWiz::SetParameter "IpVersion" "1.00.a";
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CipWiz::SetParameter "HdlLanguage" "1";
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CipWiz::SetParameter "BusType" "64";
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CipWiz::SetParameter "IncludeIseFile" "FALSE";
9
CipWiz::SetParameter "IncludeXpsFile" "TRUE";
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CipWiz::SetParameter "IncludeSoftwareDriverFile" "FALSE";
11
CipWiz::SetParameter "IncludeBFMSimulationFile" "FALSE";
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CipWiz::SetParameter "IncludeSlaveAttachmentSupport" "TRUE";
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CipWiz::SetParameter "IncludeMasterAttachmentSupport" "FALSE";
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CipWiz::SetParameter "IncludeMirResetRegister" "FALSE";
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CipWiz::SetParameter "IncludeFifoSupport" "FALSE";
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CipWiz::SetParameter "IncludeInterruptSupport" "FALSE";
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CipWiz::SetParameter "IncludeDMASupport" "FALSE";
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CipWiz::SetParameter "IncludeBurstSupport" "FALSE";
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CipWiz::SetParameter "IncludeUserRegisterSupport" "TRUE";
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CipWiz::SetParameter "IncludeUserMasterSupport" "FALSE";
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CipWiz::SetParameter "IncludeUserMemorySupport" "FALSE";
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CipWiz::SetParameter "UseSlaveBurst" "FALSE";
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CipWiz::SetParameter "UseMasterBurst" "FALSE";
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CipWiz::SetParameter "UseReadFifo" "FALSE";
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CipWiz::SetParameter "UseWriteFifo" "FALSE";
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CipWiz::SetParameter "UseReadFifoPacketMode" "FALSE";
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CipWiz::SetParameter "UseWriteFifoPacketMode" "FALSE";
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CipWiz::SetParameter "UseReadFifoVacancyCalculation" "FALSE";
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CipWiz::SetParameter "UseWriteFifoVacancyCalculation" "FALSE";
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CipWiz::SetParameter "WriteFifoDataWidth" "0";
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CipWiz::SetParameter "WriteFifoDepth" "4";
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CipWiz::SetParameter "ReadFifoDataWidth" "0";
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CipWiz::SetParameter "ReadFifoDepth" "4";
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CipWiz::SetParameter "UseDeviceISC" "FALSE";
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CipWiz::SetParameter "UseDevicePriorityEncoder" "FALSE";
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CipWiz::SetParameter "NumberOfInterrupt" "0";
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CipWiz::SetParameter "TypeOfInterrupt" "0";
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CipWiz::SetParameter "TypeOfDMA" "0";
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CipWiz::SetParameter "UseFastTransferProtocol" "FALSE";
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CipWiz::SetParameter "BurstMaxSize" "0";
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CipWiz::SetParameter "BurstPageSize" "0";
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CipWiz::SetParameter "IncludeDPhaseTimer" "TRUE";
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CipWiz::SetParameter "SlaveSideNativeDataWidth" "32";
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CipWiz::SetParameter "SlaveBurstWriteBufferDepth" "0";
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CipWiz::SetParameter "MasterSideNativeDataWidth" "0";
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CipWiz::SetParameter "NumberOfUserRegister" "4";
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CipWiz::SetParameter "UserRegisterDataWidth" "32";
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CipWiz::SetParameter "WriteMode" "0";
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CipWiz::SetParameter "HasInputFSL" "0";
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CipWiz::SetParameter "HasOutputFSL" "0";
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CipWiz::SetParameter "TotalInputData" "0";
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CipWiz::SetParameter "TotalOutputData" "0";
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CipWiz::SetParameter "NumOfInputArgs" "0";
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CipWiz::SetParameter "NumOfOutputArgs" "0";
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CipWiz::SetParameter "NumberOfUserMemoryBank" "0";
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CipWiz::SetParameter "UserMemoryBankDataWidth" "0";
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CipWiz::SetParameter "IpicSelectedPortNames" "Bus2IP_Clk|Bus2IP_Reset|Bus2IP_Data|Bus2IP_BE|Bus2IP_RdCE|Bus2IP_WrCE|IP2Bus_Data|IP2Bus_RdAck|IP2Bus_WrAck|IP2Bus_Error|";
58
CipWiz::SetParameter "UserLogicModuleName" "0";
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CipWiz::SetParameter "TypeOfUserLogicSource" "user_logic";

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