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tac2 |
versatile_fifo_dptam_dwversatile_fifo_dptam_dw_syn.vverilogSourceversatile_fifo_dptam_dw_syn.vverilogSourceversatile_fifo_dptam_dw_syn.vverilogSourceversatile_fifo_dptam_dw_sim.vverilogSourceversatile_fifo_dptam_dw.cdbCDBheader_report.logLOGcompile_report.logLOGglobal_report.logLOGinterface_report.logLOGdatasheet_report.logLOGversatile_fifo_dptam_dw_usedLocations.pdcBLOCK_PDCANY_SYNTHESIS_FILESETSYNTHESISSYNPLIFY_SYNTHESIS_FILESETPRECISION_SYNTHESIS_FILESETDESIGNER_FILESETOTHER_FILESETOTHERANY_HDL_SIMULATION_FILESETSIMULATIONVERILOGBlockd_ain70falsefalsetrueq_aout70falsefalsetrueadr_ain100falsefalsetruewe_ainfalsefalsetrueclk_ainfalsefalsetrueq_bout70falsefalsetrueadr_bin100falsefalsetrued_bin70falsefalsetruewe_binfalsefalsetrueclk_binfalsefalsetrue
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