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========================== SD IP Core Testbench results ===========================
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***************************************************************************************
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***************************************************************************************
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Heading: access_to_reg
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***************************************************************************************
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***************************************************************************************
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*************************************************************************************
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At time: 2903
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Test: TEST 0: 32-BIT READ-WRITE REGISTERS ( VARIOUS BUS DELAYS )
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*FAILED* because
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Register %h defaultvalue is not RSP ; 72
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*************************************************************************************
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*************************************************************************************
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At time: 3215
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Test: TEST 0: 32-BIT READ-WRITE REGISTERS ( VARIOUS BUS DELAYS )
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*FAILED* because
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Register %h defaultvalue is not RSP ; 28
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*************************************************************************************
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*************************************************************************************
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At time: 3423
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Test: TEST 0: 32-BIT READ-WRITE REGISTERS ( VARIOUS BUS DELAYS )
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*FAILED* because
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Register %h defaultvalue is not RSP ; 36
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*************************************************************************************
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***************************************************************************************
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***************************************************************************************
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Heading: Send CMD
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***************************************************************************************
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***************************************************************************************
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*************************************************************************************
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At time: 8077
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Test: 0: Send CMD, No Response
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reported *SUCCESSFULL*!
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*************************************************************************************
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***************************************************************************************
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***************************************************************************************
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Heading: access_to_reg
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***************************************************************************************
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***************************************************************************************
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*************************************************************************************
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At time: 61507
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Test: 3.0: Init Seq, No Response
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reported *SUCCESSFULL*!
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*************************************************************************************
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***************************************************************************************
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***************************************************************************************
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Heading: access_to_reg
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***************************************************************************************
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***************************************************************************************
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*************************************************************************************
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At time: 208147
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Test: 4.0: Send data
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reported *SUCCESSFULL*!
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*************************************************************************************
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*************************************************************************************
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At time: 415419
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Test: 4.0: Send data
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reported *SUCCESSFULL*!
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*************************************************************************************
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***************************************************************************************
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***************************************************************************************
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Heading: Send CMD, with simulated bus error on SD_CMD line
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***************************************************************************************
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***************************************************************************************
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