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tac2 |
========================== SD IP Core Testbench results ===========================
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***************************************************************************************
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***************************************************************************************
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Heading: access_to_reg
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***************************************************************************************
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***************************************************************************************
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*************************************************************************************
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At time: 4359
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Test: TEST 0: 32-BIT READ-WRITE REGISTERS ( VARIOUS BUS DELAYS )
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reported *SUCCESSFULL*!
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*************************************************************************************
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***************************************************************************************
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***************************************************************************************
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Heading: Send CMD
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***************************************************************************************
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***************************************************************************************
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*************************************************************************************
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At time: 8077
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Test: 0: Send CMD, No Response
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reported *SUCCESSFULL*!
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*************************************************************************************
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***************************************************************************************
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***************************************************************************************
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Heading: access_to_reg
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***************************************************************************************
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***************************************************************************************
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*************************************************************************************
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At time: 61507
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Test: 3.0: Init Seq, No Response
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reported *SUCCESSFULL*!
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*************************************************************************************
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***************************************************************************************
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***************************************************************************************
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Heading: access_to_reg
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***************************************************************************************
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***************************************************************************************
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*************************************************************************************
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At time: 208563
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Test: 4.0: Send data
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reported *SUCCESSFULL*!
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*************************************************************************************
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*************************************************************************************
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At time: 416251
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Test: 4.0: Send data
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reported *SUCCESSFULL*!
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*************************************************************************************
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***************************************************************************************
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***************************************************************************************
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Heading: Send CMD, With simulated bus error on SD_CMD line
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***************************************************************************************
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***************************************************************************************
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*************************************************************************************
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At time: 444201
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Test: Test 5 part 4: Send CMD2, 136-Bit
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reported *SUCCESSFULL*!
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*************************************************************************************
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***************************************************************************************
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***************************************************************************************
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Heading: access_to_reg
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***************************************************************************************
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***************************************************************************************
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*************************************************************************************
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At time: 651889
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Test: 4.0: Send data
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reported *SUCCESSFULL*!
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*************************************************************************************
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