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[/] [sha256core/] [trunk/] [rtl/] [sha_fun.vhd] - Blame information for rev 2

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1 2 entactogen
 
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-- Copyright (c) 2013 Antonio de la Piedra
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-- This program is free software: you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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-- GNU General Public License for more details.
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-- You should have received a copy of the GNU General Public License
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-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
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library IEEE;
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use IEEE.STD_LOGIC_1164.all;
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package sha_fun is
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  function sigma_0  (signal x : in std_logic_vector) return std_logic_vector;
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  function sigma_1  (signal x : in std_logic_vector) return std_logic_vector;
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  function sum_0  (signal x : in std_logic_vector) return std_logic_vector;
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  function sum_1  (signal x : in std_logic_vector) return std_logic_vector;
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  function chi  (signal x : in std_logic_vector;
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                                          signal y : in std_logic_vector;
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                                          signal z : in std_logic_vector) return std_logic_vector;
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  function maj  (signal x : in std_logic_vector;
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                                          signal y : in std_logic_vector;
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                                          signal z : in std_logic_vector) return std_logic_vector;
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end sha_fun;
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package body sha_fun is
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  function sigma_0  (signal x : in std_logic_vector) return std_logic_vector is
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        variable tmp_0 : std_logic_vector(31 downto 0);
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        variable tmp_1 : std_logic_vector(31 downto 0);
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        variable tmp_2 : std_logic_vector(31 downto 0);
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        variable r : std_logic_vector(31 downto 0);
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  begin
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        tmp_0 := x(6 downto 0) & x(31 downto 7);
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        tmp_1 := x(17 downto 0) & x(31 downto 18);
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        tmp_2 := "000" & x(31 downto 3);
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        r := tmp_0 xor tmp_1 xor tmp_2;
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        return r;
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  end sigma_0;
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  function sigma_1  (signal x : in std_logic_vector) return std_logic_vector is
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        variable tmp_0 : std_logic_vector(31 downto 0);
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        variable tmp_1 : std_logic_vector(31 downto 0);
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        variable tmp_2 : std_logic_vector(31 downto 0);
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        variable r : std_logic_vector(31 downto 0);
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  begin
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        tmp_0 := x(16 downto 0) & x(31 downto 17);
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        tmp_1 := x(18 downto 0) & x(31 downto 19);
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        tmp_2 := "0000000000" & x(31 downto 10);
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        r := tmp_0 xor tmp_1 xor tmp_2;
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        return r;
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  end sigma_1;
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  function chi  (signal x : in std_logic_vector;
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                                          signal y : in std_logic_vector;
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                                          signal z : in std_logic_vector) return std_logic_vector is
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    variable r : std_logic_vector(31 downto 0);
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  begin
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                        r := (x and y) xor (not(x) and z);
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                        return r;
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  end chi;
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  function maj  (signal x : in std_logic_vector;
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                                          signal y : in std_logic_vector;
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                                          signal z : in std_logic_vector) return std_logic_vector is
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          variable r : std_logic_vector(31 downto 0);
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  begin
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                   r := (x and y) xor (x and z) xor (y and z);
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                        return r;
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  end maj;
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  function sum_0  (signal x : in std_logic_vector) return std_logic_vector is
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        variable tmp_0 : std_logic_vector(31 downto 0);
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        variable tmp_1 : std_logic_vector(31 downto 0);
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        variable tmp_2 : std_logic_vector(31 downto 0);
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        variable r : std_logic_vector(31 downto 0);
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  begin
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        tmp_0 := x(1 downto 0) & x(31 downto 2);
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        tmp_1 := x(12 downto 0) & x(31 downto 13);
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        tmp_2 := x(21 downto 0) & x(31 downto 22);
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        r := tmp_0 xor tmp_1 xor tmp_2;
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        return r;
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  end sum_0;
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  function sum_1  (signal x : in std_logic_vector) return std_logic_vector is
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        variable tmp_0 : std_logic_vector(31 downto 0);
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        variable tmp_1 : std_logic_vector(31 downto 0);
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        variable tmp_2 : std_logic_vector(31 downto 0);
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        variable r : std_logic_vector(31 downto 0);
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  begin
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        tmp_0 := x(5 downto 0) & x(31 downto 6);
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        tmp_1 := x(10 downto 0) & x(31 downto 11);
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        tmp_2 := x(24 downto 0) & x(31 downto 25);
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        r := tmp_0 xor tmp_1 xor tmp_2;
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        return r;
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  end sum_1;
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 end sha_fun;

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