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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [adv_debug_sys/] [Hardware/] [adv_dbg_if/] [rtl/] [xml/] [adv_dbg_if_cpu1_i.xml] - Blame information for rev 135

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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
 
opencores.org
adv_debug_sys
adv_dbg_if
cpu1_i
 
 
 
 
 

 
 cpu1_clk
  
  
      
  
    
      
        clk
        cpu1_clk_i
      
    
                
      
  
 
 
 
 
 
 
 cpu1_reset
  
  
      
  
    
      
        reset
        cpu1_rst_o
      
    
        
      
  
 
 
 
 
 
cpu1_debug
  
  
      

    
 
        
         addr
         
         cpu1_addr_o
           310
         
       
 
 
        
         wdata
         
         cpu1_data_o
           310
         
       
 
 
        
         rdata
         
         cpu1_data_i
           310
         
       
 
 
 
 
      
        stall
        cpu1_stall_o
      
 
 
 
      
        bp
        cpu1_bp_i
      
 
 
      
        stb
        cpu1_stb_o
      
 
 
      
        we
        cpu1_we_o
      
 
 
      
        ack
        cpu1_ack_i
      
 
 
    
 
        
      
 
 
 
 
  
 
 
 
 
 
 
 
 

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

       
 
 
 
      
 
 
 
 

 
 
 

 
 
 

 
 
 
 
 
 
 
 
 
 
 
 


Line No.	Rev	Author	Line
1	131	jt_eaton
2
30	135	jt_eaton
31			`xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"`
32	131	jt_eaton	`xmlns:socgen="http://opencores.org"`
33			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
34	135	jt_eaton	`xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014`
35			`http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">`
36	131	jt_eaton
37	135	jt_eaton	`opencores.org`
38			`adv_debug_sys`
39			`adv_dbg_if`
40			`cpu1_i`
41	131	jt_eaton
42
43
44
45
46	135	jt_eaton
47	131	jt_eaton
48	135	jt_eaton	`cpu1_clk`
49
50
51
52
53
54
55			`clk`
56			`cpu1_clk_i`
57
58
59
60
61
62	131	jt_eaton
63	135	jt_eaton
64	131	jt_eaton
65
66
67
68	135	jt_eaton	`cpu1_reset`
69
70
71
72
73
74
75			`reset`
76			`cpu1_rst_o`
77
78
79
80
81
82
83	131	jt_eaton
84
85
86
87	135	jt_eaton	`cpu1_debug`
88
89
90
91
92
93	131	jt_eaton
94	135	jt_eaton
95			`addr`
96
97			`cpu1_addr_o`
98			`310`
99
100
101	131	jt_eaton
102
103	135	jt_eaton
104			`wdata`
105
106			`cpu1_data_o`
107			`310`
108
109
110	131	jt_eaton
111
112	135	jt_eaton
113			`rdata`
114
115			`cpu1_data_i`
116			`310`
117
118
119	131	jt_eaton
120
121
122
123	135	jt_eaton
124			`stall`
125			`cpu1_stall_o`
126
127	131	jt_eaton
128
129
130	135	jt_eaton
131			`bp`
132			`cpu1_bp_i`
133
134	131	jt_eaton
135
136	135	jt_eaton
137			`stb`
138			`cpu1_stb_o`
139
140	131	jt_eaton
141
142	135	jt_eaton
143			`we`
144			`cpu1_we_o`
145
146	131	jt_eaton
147
148	135	jt_eaton
149			`ack`
150			`cpu1_ack_i`
151
152	131	jt_eaton
153
154	135	jt_eaton
155
156
157
158	131	jt_eaton
159
160	135	jt_eaton
161	131	jt_eaton
162	135	jt_eaton
163	131	jt_eaton
164	135	jt_eaton
165	131	jt_eaton
166
167
168
169
170
171	135	jt_eaton
172	131	jt_eaton
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187	135	jt_eaton
188
189	131	jt_eaton
190
191
192	135	jt_eaton
193	131	jt_eaton
194
195
196
197	135	jt_eaton
198	131	jt_eaton
199
200
201	135	jt_eaton
202	131	jt_eaton
203
204
205	135	jt_eaton
206	131	jt_eaton
207
208
209
210
211
212
213	135	jt_eaton
214
215
216
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218

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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [adv_debug_sys/] [Hardware/] [adv_dbg_if/] [rtl/] [xml/] [adv_dbg_if_cpu1_i.xml] - Blame information for rev 135