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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [spi_interface/] [sim/] [testbenches/] [xml/] [spi_interface_def_lint.xml] - Blame information for rev 135

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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
 
opencores.org
logic
spi_interface
def_lint
 
 
 

 
 
       
 
              
              Dut
              
              
                                   ipxact:library="logic"
                                   ipxact:name="spi_interface"
                                   ipxact:version="def_dut.params"/>
              
              
 
 
 
              
              lint
              :*Lint:*
              Verilog
              fs-lint
              
 
 
              
              rtl_check
              
              
                                   ipxact:library="Testbench"
                                   ipxact:name="toolflow"
                                   ipxact:version="rtl_check"/>
              
              
 
      
 
 
 

 
 
 
 
  
 
 
 
 
 
    
      fs-lint
 
      
        
        ../verilog/lint/spi_interface_def_lint
        verilogSource
        module
      
 
 
    
 
 
 
 
  
 
 
 
 
 


Line No.	Rev	Author	Line
1	135	jt_eaton
2
30
31			`xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"`
32			`xmlns:socgen="http://opencores.org"`
33			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
34			`xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014`
35			`http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">`
36
37			`opencores.org`
38			`logic`
39			`spi_interface`
40			`def_lint`
41
42
43
44
45
46
47
48
49
50			`Dut`
51
52
53			`ipxact:library="logic"`
54			`ipxact:name="spi_interface"`
55			`ipxact:version="def_dut.params"/>`
56
57
58
59
60
61
62			`lint`
63			`:Lint:`
64			`Verilog`
65			`fs-lint`
66
67
68
69
70			`rtl_check`
71
72
73			`ipxact:library="Testbench"`
74			`ipxact:name="toolflow"`
75			`ipxact:version="rtl_check"/>`
76
77
78
79
80
81
82
83
84
85
86
87
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95			`fs-lint`
96
97
98
99			`../verilog/lint/spi_interface_def_lint`
100			`verilogSource`
101			`module`
102
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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [spi_interface/] [sim/] [testbenches/] [xml/] [spi_interface_def_lint.xml] - Blame information for rev 135