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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [wishbone/] [busDefs/] [wb_b.2.xml] - Blame information for rev 135

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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
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xmlns:socgen="http://opencores.org"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
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xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
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http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
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37 135 jt_eaton
opencores.org
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wishbone
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wb
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b.2
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true
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true
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    CLOCK
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    RESET
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    ENABLE
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Wishbone Soc Interconnect Bus version B.2
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