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[/] [socgen/] [trunk/] [Projects/] [valentfx.com/] [logipi/] [ip/] [clock/] [rtl/] [xml/] [cde_clock_sys.xml] - Blame information for rev 135

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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
 
valentfx.com
logipi
clock
sys
 
 
 

 
 
 
 
 
 
 
 
   
      fs-syn
 
      
        dest_dir
        ../verilog/syn/
        verilogSource
        libraryDir
      
 
 
 
 
   
 
 

 
 
 
 
 
 
 

       
 
              
              syn:*Synthesis:*
 
              Verilog
              
                     
                            fs-syn
                     
              
 
      
 
 
 
 

 
 
 
 
 
 
 
 
 


Line No.	Rev	Author	Line
1	135	jt_eaton
2
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31			`xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"`
32			`xmlns:socgen="http://opencores.org"`
33			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
34			`xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014`
35			`http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">`
36
37			`valentfx.com`
38			`logipi`
39			`clock`
40			`sys`
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54			`fs-syn`
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57			`dest_dir`
58			`../verilog/syn/`
59			`verilogSource`
60			`libraryDir`
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81			`syn:Synthesis:`
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83			`Verilog`
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86			`fs-syn`
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Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [valentfx.com/] [logipi/] [ip/] [clock/] [rtl/] [xml/] [cde_clock_sys.xml] - Blame information for rev 135