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[/] [spacewiresystemc/] [trunk/] [altera_work/] [spw_fifo_ulight/] [output_files/] [spw_fifo_ulight.fit.summary] - Blame information for rev 40

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Line No. Rev Author Line
1 40 redbear 
Fitter Status : Successful - Mon Feb  5 00:57:17 2018
2 
Quartus Prime Version : 17.1.1 Internal Build 593 12/11/2017 SJ Lite Edition
3 32 redbear 
Revision Name : spw_fifo_ulight
4 
Top-level Entity Name : SPW_ULIGHT_FIFO
5 
Family : Cyclone V
6 
Device : 5CSEMA4U23C6
7 
Timing Models : Final
8 40 redbear 
Logic utilization (in ALMs) : 3,362 / 15,880 ( 21 % )
9 
Total registers : 4633
10 32 redbear 
Total pins : 19 / 314 ( 6 % )
11 
Total virtual pins : 0
12 35 redbear 
Total block memory bits : 0 / 2,764,800 ( 0 % )
13 
Total RAM Blocks : 0 / 270 ( 0 % )
14 32 redbear 
Total DSP Blocks : 0 / 84 ( 0 % )
15 
Total HSSI RX PCSs : 0
16 
Total HSSI PMA RX Deserializers : 0
17 
Total HSSI TX PCSs : 0
18 
Total HSSI PMA TX Serializers : 0
19 
Total PLLs : 1 / 5 ( 20 % )
20 
Total DLLs : 0 / 4 ( 0 % )

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