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[/] [spacewiresystemc/] [trunk/] [altera_work/] [spw_fifo_ulight/] [output_files/] [spw_fifo_ulight.sta.summary] - Blame information for rev 32

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Line No. Rev Author Line
1 32 redbear
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2
TimeQuest Timing Analyzer Summary
3
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4
 
5
Type  : Slow 1100mV 85C Model Setup 'FPGA_CLK1_50'
6
Slack : 1.403
7
TNS   : 0.000
8
 
9
Type  : Slow 1100mV 85C Model Hold 'FPGA_CLK1_50'
10
Slack : 0.221
11
TNS   : 0.000
12
 
13
Type  : Slow 1100mV 85C Model Recovery 'FPGA_CLK1_50'
14
Slack : 4.786
15
TNS   : 0.000
16
 
17
Type  : Slow 1100mV 85C Model Removal 'FPGA_CLK1_50'
18
Slack : 0.870
19
TNS   : 0.000
20
 
21
Type  : Slow 1100mV 85C Model Minimum Pulse Width 'din_a'
22
Slack : 0.338
23
TNS   : 0.000
24
 
25
Type  : Slow 1100mV 85C Model Minimum Pulse Width 'clock_reduce:R_400_to_2_5_10_100_200_300MHZ|clk_100_reduced_i'
26
Slack : 0.364
27
TNS   : 0.000
28
 
29
Type  : Slow 1100mV 85C Model Minimum Pulse Width 'spw_ulight_con_top_x:A_SPW_TOP|top_spw_ultra_light:SPW|TX_SPW:TX|tx_dout_e'
30
Slack : 0.512
31
TNS   : 0.000
32
 
33
Type  : Slow 1100mV 85C Model Minimum Pulse Width 'u0|pll_0|altera_pll_i|cyclonev_pll|counter[0].output_counter|divclk'
34
Slack : 0.537
35
TNS   : 0.000
36
 
37
Type  : Slow 1100mV 85C Model Minimum Pulse Width 'clock_reduce:R_400_to_2_5_10_100_200_300MHZ|clk_reduced_i'
38
Slack : 0.797
39
TNS   : 0.000
40
 
41
Type  : Slow 1100mV 85C Model Minimum Pulse Width 'u0|pll_0|altera_pll_i|cyclonev_pll|fpll_0|fpll|vcoph[0]'
42
Slack : 1.250
43
TNS   : 0.000
44
 
45
Type  : Slow 1100mV 85C Model Minimum Pulse Width 'FPGA_CLK1_50'
46
Slack : 4.202
47
TNS   : 0.000
48
 
49
Type  : Slow 1100mV 0C Model Setup 'FPGA_CLK1_50'
50
Slack : 1.581
51
TNS   : 0.000
52
 
53
Type  : Slow 1100mV 0C Model Hold 'FPGA_CLK1_50'
54
Slack : 0.200
55
TNS   : 0.000
56
 
57
Type  : Slow 1100mV 0C Model Recovery 'FPGA_CLK1_50'
58
Slack : 4.853
59
TNS   : 0.000
60
 
61
Type  : Slow 1100mV 0C Model Removal 'FPGA_CLK1_50'
62
Slack : 0.822
63
TNS   : 0.000
64
 
65
Type  : Slow 1100mV 0C Model Minimum Pulse Width 'din_a'
66
Slack : 0.332
67
TNS   : 0.000
68
 
69
Type  : Slow 1100mV 0C Model Minimum Pulse Width 'clock_reduce:R_400_to_2_5_10_100_200_300MHZ|clk_100_reduced_i'
70
Slack : 0.364
71
TNS   : 0.000
72
 
73
Type  : Slow 1100mV 0C Model Minimum Pulse Width 'u0|pll_0|altera_pll_i|cyclonev_pll|counter[0].output_counter|divclk'
74
Slack : 0.464
75
TNS   : 0.000
76
 
77
Type  : Slow 1100mV 0C Model Minimum Pulse Width 'spw_ulight_con_top_x:A_SPW_TOP|top_spw_ultra_light:SPW|TX_SPW:TX|tx_dout_e'
78
Slack : 0.580
79
TNS   : 0.000
80
 
81
Type  : Slow 1100mV 0C Model Minimum Pulse Width 'clock_reduce:R_400_to_2_5_10_100_200_300MHZ|clk_reduced_i'
82
Slack : 0.801
83
TNS   : 0.000
84
 
85
Type  : Slow 1100mV 0C Model Minimum Pulse Width 'u0|pll_0|altera_pll_i|cyclonev_pll|fpll_0|fpll|vcoph[0]'
86
Slack : 1.250
87
TNS   : 0.000
88
 
89
Type  : Slow 1100mV 0C Model Minimum Pulse Width 'FPGA_CLK1_50'
90
Slack : 4.284
91
TNS   : 0.000
92
 
93
Type  : Fast 1100mV 85C Model Setup 'FPGA_CLK1_50'
94
Slack : 4.677
95
TNS   : 0.000
96
 
97
Type  : Fast 1100mV 85C Model Hold 'FPGA_CLK1_50'
98
Slack : 0.137
99
TNS   : 0.000
100
 
101
Type  : Fast 1100mV 85C Model Recovery 'FPGA_CLK1_50'
102
Slack : 6.858
103
TNS   : 0.000
104
 
105
Type  : Fast 1100mV 85C Model Removal 'FPGA_CLK1_50'
106
Slack : 0.501
107
TNS   : 0.000
108
 
109
Type  : Fast 1100mV 85C Model Minimum Pulse Width 'clock_reduce:R_400_to_2_5_10_100_200_300MHZ|clk_100_reduced_i'
110
Slack : 0.364
111
TNS   : 0.000
112
 
113
Type  : Fast 1100mV 85C Model Minimum Pulse Width 'din_a'
114
Slack : 0.497
115
TNS   : 0.000
116
 
117
Type  : Fast 1100mV 85C Model Minimum Pulse Width 'spw_ulight_con_top_x:A_SPW_TOP|top_spw_ultra_light:SPW|TX_SPW:TX|tx_dout_e'
118
Slack : 0.759
119
TNS   : 0.000
120
 
121
Type  : Fast 1100mV 85C Model Minimum Pulse Width 'u0|pll_0|altera_pll_i|cyclonev_pll|counter[0].output_counter|divclk'
122
Slack : 0.799
123
TNS   : 0.000
124
 
125
Type  : Fast 1100mV 85C Model Minimum Pulse Width 'clock_reduce:R_400_to_2_5_10_100_200_300MHZ|clk_reduced_i'
126
Slack : 1.029
127
TNS   : 0.000
128
 
129
Type  : Fast 1100mV 85C Model Minimum Pulse Width 'u0|pll_0|altera_pll_i|cyclonev_pll|fpll_0|fpll|vcoph[0]'
130
Slack : 1.250
131
TNS   : 0.000
132
 
133
Type  : Fast 1100mV 85C Model Minimum Pulse Width 'FPGA_CLK1_50'
134
Slack : 4.076
135
TNS   : 0.000
136
 
137
Type  : Fast 1100mV 0C Model Setup 'FPGA_CLK1_50'
138
Slack : 5.192
139
TNS   : 0.000
140
 
141
Type  : Fast 1100mV 0C Model Hold 'FPGA_CLK1_50'
142
Slack : 0.122
143
TNS   : 0.000
144
 
145
Type  : Fast 1100mV 0C Model Recovery 'FPGA_CLK1_50'
146
Slack : 7.031
147
TNS   : 0.000
148
 
149
Type  : Fast 1100mV 0C Model Removal 'FPGA_CLK1_50'
150
Slack : 0.453
151
TNS   : 0.000
152
 
153
Type  : Fast 1100mV 0C Model Minimum Pulse Width 'clock_reduce:R_400_to_2_5_10_100_200_300MHZ|clk_100_reduced_i'
154
Slack : 0.364
155
TNS   : 0.000
156
 
157
Type  : Fast 1100mV 0C Model Minimum Pulse Width 'din_a'
158
Slack : 0.599
159
TNS   : 0.000
160
 
161
Type  : Fast 1100mV 0C Model Minimum Pulse Width 'u0|pll_0|altera_pll_i|cyclonev_pll|counter[0].output_counter|divclk'
162
Slack : 0.792
163
TNS   : 0.000
164
 
165
Type  : Fast 1100mV 0C Model Minimum Pulse Width 'spw_ulight_con_top_x:A_SPW_TOP|top_spw_ultra_light:SPW|TX_SPW:TX|tx_dout_e'
166
Slack : 0.860
167
TNS   : 0.000
168
 
169
Type  : Fast 1100mV 0C Model Minimum Pulse Width 'clock_reduce:R_400_to_2_5_10_100_200_300MHZ|clk_reduced_i'
170
Slack : 1.057
171
TNS   : 0.000
172
 
173
Type  : Fast 1100mV 0C Model Minimum Pulse Width 'u0|pll_0|altera_pll_i|cyclonev_pll|fpll_0|fpll|vcoph[0]'
174
Slack : 1.250
175
TNS   : 0.000
176
 
177
Type  : Fast 1100mV 0C Model Minimum Pulse Width 'FPGA_CLK1_50'
178
Slack : 4.039
179
TNS   : 0.000
180
 
181
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