OpenCores
URL https://opencores.org/ocsvn/spacewiresystemc/spacewiresystemc/trunk

Subversion Repositories spacewiresystemc

[/] [spacewiresystemc/] [trunk/] [altera_work/] [spw_fifo_ulight/] [ulight_fifo/] [synthesis/] [submodules/] [ulight_fifo_mm_interconnect_0.v] - Blame information for rev 40

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 32 redbear 
// ulight_fifo_mm_interconnect_0.v
2 
 
3 
// This file was auto-generated from altera_mm_interconnect_hw.tcl.  If you edit it your changes
4 
// will probably be lost.
5 
//
6 40 redbear 
// Generated using ACDS version 17.1 593
7 32 redbear 
 
8 
`timescale 1 ps / 1 ps
9 
module ulight_fifo_mm_interconnect_0 (
10 
                input  wire [11:0] hps_0_h2f_axi_master_awid,                                        //                                       hps_0_h2f_axi_master.awid
11 
                input  wire [29:0] hps_0_h2f_axi_master_awaddr,                                      //                                                           .awaddr
12 
                input  wire [3:0]  hps_0_h2f_axi_master_awlen,                                       //                                                           .awlen
13 
                input  wire [2:0]  hps_0_h2f_axi_master_awsize,                                      //                                                           .awsize
14 
                input  wire [1:0]  hps_0_h2f_axi_master_awburst,                                     //                                                           .awburst
15 
                input  wire [1:0]  hps_0_h2f_axi_master_awlock,                                      //                                                           .awlock
16 
                input  wire [3:0]  hps_0_h2f_axi_master_awcache,                                     //                                                           .awcache
17 
                input  wire [2:0]  hps_0_h2f_axi_master_awprot,                                      //                                                           .awprot
18 
                input  wire        hps_0_h2f_axi_master_awvalid,                                     //                                                           .awvalid
19 
                output wire        hps_0_h2f_axi_master_awready,                                     //                                                           .awready
20 
                input  wire [11:0] hps_0_h2f_axi_master_wid,                                         //                                                           .wid
21 
                input  wire [31:0] hps_0_h2f_axi_master_wdata,                                       //                                                           .wdata
22 
                input  wire [3:0]  hps_0_h2f_axi_master_wstrb,                                       //                                                           .wstrb
23 
                input  wire        hps_0_h2f_axi_master_wlast,                                       //                                                           .wlast
24 
                input  wire        hps_0_h2f_axi_master_wvalid,                                      //                                                           .wvalid
25 
                output wire        hps_0_h2f_axi_master_wready,                                      //                                                           .wready
26 
                output wire [11:0] hps_0_h2f_axi_master_bid,                                         //                                                           .bid
27 
                output wire [1:0]  hps_0_h2f_axi_master_bresp,                                       //                                                           .bresp
28 
                output wire        hps_0_h2f_axi_master_bvalid,                                      //                                                           .bvalid
29 
                input  wire        hps_0_h2f_axi_master_bready,                                      //                                                           .bready
30 
                input  wire [11:0] hps_0_h2f_axi_master_arid,                                        //                                                           .arid
31 
                input  wire [29:0] hps_0_h2f_axi_master_araddr,                                      //                                                           .araddr
32 
                input  wire [3:0]  hps_0_h2f_axi_master_arlen,                                       //                                                           .arlen
33 
                input  wire [2:0]  hps_0_h2f_axi_master_arsize,                                      //                                                           .arsize
34 
                input  wire [1:0]  hps_0_h2f_axi_master_arburst,                                     //                                                           .arburst
35 
                input  wire [1:0]  hps_0_h2f_axi_master_arlock,                                      //                                                           .arlock
36 
                input  wire [3:0]  hps_0_h2f_axi_master_arcache,                                     //                                                           .arcache
37 
                input  wire [2:0]  hps_0_h2f_axi_master_arprot,                                      //                                                           .arprot
38 
                input  wire        hps_0_h2f_axi_master_arvalid,                                     //                                                           .arvalid
39 
                output wire        hps_0_h2f_axi_master_arready,                                     //                                                           .arready
40 
                output wire [11:0] hps_0_h2f_axi_master_rid,                                         //                                                           .rid
41 
                output wire [31:0] hps_0_h2f_axi_master_rdata,                                       //                                                           .rdata
42 
                output wire [1:0]  hps_0_h2f_axi_master_rresp,                                       //                                                           .rresp
43 
                output wire        hps_0_h2f_axi_master_rlast,                                       //                                                           .rlast
44 
                output wire        hps_0_h2f_axi_master_rvalid,                                      //                                                           .rvalid
45 
                input  wire        hps_0_h2f_axi_master_rready,                                      //                                                           .rready
46 
                input  wire        clk_0_clk_clk,                                                    //                                                  clk_0_clk.clk
47 
                input  wire        hps_0_h2f_axi_master_agent_clk_reset_reset_bridge_in_reset_reset, // hps_0_h2f_axi_master_agent_clk_reset_reset_bridge_in_reset.reset
48 
                input  wire        led_pio_test_reset_reset_bridge_in_reset_reset,                   //                   led_pio_test_reset_reset_bridge_in_reset.reset
49 
                output wire [1:0]  auto_start_s1_address,                                            //                                              auto_start_s1.address
50 
                output wire        auto_start_s1_write,                                              //                                                           .write
51 
                input  wire [31:0] auto_start_s1_readdata,                                           //                                                           .readdata
52 
                output wire [31:0] auto_start_s1_writedata,                                          //                                                           .writedata
53 
                output wire        auto_start_s1_chipselect,                                         //                                                           .chipselect
54 
                output wire [1:0]  clock_sel_s1_address,                                             //                                               clock_sel_s1.address
55 
                output wire        clock_sel_s1_write,                                               //                                                           .write
56 
                input  wire [31:0] clock_sel_s1_readdata,                                            //                                                           .readdata
57 
                output wire [31:0] clock_sel_s1_writedata,                                           //                                                           .writedata
58 
                output wire        clock_sel_s1_chipselect,                                          //                                                           .chipselect
59 
                output wire [1:0]  counter_rx_fifo_s1_address,                                       //                                         counter_rx_fifo_s1.address
60 
                input  wire [31:0] counter_rx_fifo_s1_readdata,                                      //                                                           .readdata
61 
                output wire [1:0]  counter_tx_fifo_s1_address,                                       //                                         counter_tx_fifo_s1.address
62 
                input  wire [31:0] counter_tx_fifo_s1_readdata,                                      //                                                           .readdata
63 
                output wire [1:0]  data_flag_rx_s1_address,                                          //                                            data_flag_rx_s1.address
64 
                input  wire [31:0] data_flag_rx_s1_readdata,                                         //                                                           .readdata
65 
                output wire [1:0]  data_info_s1_address,                                             //                                               data_info_s1.address
66 
                input  wire [31:0] data_info_s1_readdata,                                            //                                                           .readdata
67 
                output wire [1:0]  data_read_en_rx_s1_address,                                       //                                         data_read_en_rx_s1.address
68 
                output wire        data_read_en_rx_s1_write,                                         //                                                           .write
69 
                input  wire [31:0] data_read_en_rx_s1_readdata,                                      //                                                           .readdata
70 
                output wire [31:0] data_read_en_rx_s1_writedata,                                     //                                                           .writedata
71 
                output wire        data_read_en_rx_s1_chipselect,                                    //                                                           .chipselect
72 
                output wire [1:0]  fifo_empty_rx_status_s1_address,                                  //                                    fifo_empty_rx_status_s1.address
73 
                input  wire [31:0] fifo_empty_rx_status_s1_readdata,                                 //                                                           .readdata
74 
                output wire [1:0]  fifo_empty_tx_status_s1_address,                                  //                                    fifo_empty_tx_status_s1.address
75 
                input  wire [31:0] fifo_empty_tx_status_s1_readdata,                                 //                                                           .readdata
76 
                output wire [1:0]  fifo_full_rx_status_s1_address,                                   //                                     fifo_full_rx_status_s1.address
77 
                input  wire [31:0] fifo_full_rx_status_s1_readdata,                                  //                                                           .readdata
78 
                output wire [1:0]  fifo_full_tx_status_s1_address,                                   //                                     fifo_full_tx_status_s1.address
79 
                input  wire [31:0] fifo_full_tx_status_s1_readdata,                                  //                                                           .readdata
80 
                output wire [1:0]  fsm_info_s1_address,                                              //                                                fsm_info_s1.address
81 
                input  wire [31:0] fsm_info_s1_readdata,                                             //                                                           .readdata
82 
                output wire [1:0]  led_pio_test_s1_address,                                          //                                            led_pio_test_s1.address
83 
                output wire        led_pio_test_s1_write,                                            //                                                           .write
84 
                input  wire [31:0] led_pio_test_s1_readdata,                                         //                                                           .readdata
85 
                output wire [31:0] led_pio_test_s1_writedata,                                        //                                                           .writedata
86 
                output wire        led_pio_test_s1_chipselect,                                       //                                                           .chipselect
87 
                output wire [1:0]  link_disable_s1_address,                                          //                                            link_disable_s1.address
88 
                output wire        link_disable_s1_write,                                            //                                                           .write
89 
                input  wire [31:0] link_disable_s1_readdata,                                         //                                                           .readdata
90 
                output wire [31:0] link_disable_s1_writedata,                                        //                                                           .writedata
91 
                output wire        link_disable_s1_chipselect,                                       //                                                           .chipselect
92 
                output wire [1:0]  link_start_s1_address,                                            //                                              link_start_s1.address
93 
                output wire        link_start_s1_write,                                              //                                                           .write
94 
                input  wire [31:0] link_start_s1_readdata,                                           //                                                           .readdata
95 
                output wire [31:0] link_start_s1_writedata,                                          //                                                           .writedata
96 
                output wire        link_start_s1_chipselect,                                         //                                                           .chipselect
97 
                output wire [1:0]  timecode_ready_rx_s1_address,                                     //                                       timecode_ready_rx_s1.address
98 
                input  wire [31:0] timecode_ready_rx_s1_readdata,                                    //                                                           .readdata
99 
                output wire [1:0]  timecode_rx_s1_address,                                           //                                             timecode_rx_s1.address
100 
                input  wire [31:0] timecode_rx_s1_readdata,                                          //                                                           .readdata
101 
                output wire [1:0]  timecode_tx_data_s1_address,                                      //                                        timecode_tx_data_s1.address
102 
                output wire        timecode_tx_data_s1_write,                                        //                                                           .write
103 
                input  wire [31:0] timecode_tx_data_s1_readdata,                                     //                                                           .readdata
104 
                output wire [31:0] timecode_tx_data_s1_writedata,                                    //                                                           .writedata
105 
                output wire        timecode_tx_data_s1_chipselect,                                   //                                                           .chipselect
106 
                output wire [1:0]  timecode_tx_enable_s1_address,                                    //                                      timecode_tx_enable_s1.address
107 
                output wire        timecode_tx_enable_s1_write,                                      //                                                           .write
108 
                input  wire [31:0] timecode_tx_enable_s1_readdata,                                   //                                                           .readdata
109 
                output wire [31:0] timecode_tx_enable_s1_writedata,                                  //                                                           .writedata
110 
                output wire        timecode_tx_enable_s1_chipselect,                                 //                                                           .chipselect
111 
                output wire [1:0]  timecode_tx_ready_s1_address,                                     //                                       timecode_tx_ready_s1.address
112 
                input  wire [31:0] timecode_tx_ready_s1_readdata,                                    //                                                           .readdata
113 
                output wire [1:0]  write_data_fifo_tx_s1_address,                                    //                                      write_data_fifo_tx_s1.address
114 
                output wire        write_data_fifo_tx_s1_write,                                      //                                                           .write
115 
                input  wire [31:0] write_data_fifo_tx_s1_readdata,                                   //                                                           .readdata
116 
                output wire [31:0] write_data_fifo_tx_s1_writedata,                                  //                                                           .writedata
117 
                output wire        write_data_fifo_tx_s1_chipselect,                                 //                                                           .chipselect
118 
                output wire [1:0]  write_en_tx_s1_address,                                           //                                             write_en_tx_s1.address
119 
                output wire        write_en_tx_s1_write,                                             //                                                           .write
120 
                input  wire [31:0] write_en_tx_s1_readdata,                                          //                                                           .readdata
121 
                output wire [31:0] write_en_tx_s1_writedata,                                         //                                                           .writedata
122 
                output wire        write_en_tx_s1_chipselect                                         //                                                           .chipselect
123 
        );
124 
 
125 
        wire   [31:0] led_pio_test_s1_agent_m0_readdata;                           // led_pio_test_s1_translator:uav_readdata -> led_pio_test_s1_agent:m0_readdata
126 
        wire          led_pio_test_s1_agent_m0_waitrequest;                        // led_pio_test_s1_translator:uav_waitrequest -> led_pio_test_s1_agent:m0_waitrequest
127 
        wire          led_pio_test_s1_agent_m0_debugaccess;                        // led_pio_test_s1_agent:m0_debugaccess -> led_pio_test_s1_translator:uav_debugaccess
128 
        wire   [29:0] led_pio_test_s1_agent_m0_address;                            // led_pio_test_s1_agent:m0_address -> led_pio_test_s1_translator:uav_address
129 
        wire    [3:0] led_pio_test_s1_agent_m0_byteenable;                         // led_pio_test_s1_agent:m0_byteenable -> led_pio_test_s1_translator:uav_byteenable
130 
        wire          led_pio_test_s1_agent_m0_read;                               // led_pio_test_s1_agent:m0_read -> led_pio_test_s1_translator:uav_read
131 
        wire          led_pio_test_s1_agent_m0_readdatavalid;                      // led_pio_test_s1_translator:uav_readdatavalid -> led_pio_test_s1_agent:m0_readdatavalid
132 
        wire          led_pio_test_s1_agent_m0_lock;                               // led_pio_test_s1_agent:m0_lock -> led_pio_test_s1_translator:uav_lock
133 
        wire   [31:0] led_pio_test_s1_agent_m0_writedata;                          // led_pio_test_s1_agent:m0_writedata -> led_pio_test_s1_translator:uav_writedata
134 
        wire          led_pio_test_s1_agent_m0_write;                              // led_pio_test_s1_agent:m0_write -> led_pio_test_s1_translator:uav_write
135 
        wire    [2:0] led_pio_test_s1_agent_m0_burstcount;                         // led_pio_test_s1_agent:m0_burstcount -> led_pio_test_s1_translator:uav_burstcount
136 
        wire          led_pio_test_s1_agent_rf_source_valid;                       // led_pio_test_s1_agent:rf_source_valid -> led_pio_test_s1_agent_rsp_fifo:in_valid
137 
        wire  [129:0] led_pio_test_s1_agent_rf_source_data;                        // led_pio_test_s1_agent:rf_source_data -> led_pio_test_s1_agent_rsp_fifo:in_data
138 
        wire          led_pio_test_s1_agent_rf_source_ready;                       // led_pio_test_s1_agent_rsp_fifo:in_ready -> led_pio_test_s1_agent:rf_source_ready
139 
        wire          led_pio_test_s1_agent_rf_source_startofpacket;               // led_pio_test_s1_agent:rf_source_startofpacket -> led_pio_test_s1_agent_rsp_fifo:in_startofpacket
140 
        wire          led_pio_test_s1_agent_rf_source_endofpacket;                 // led_pio_test_s1_agent:rf_source_endofpacket -> led_pio_test_s1_agent_rsp_fifo:in_endofpacket
141 
        wire          led_pio_test_s1_agent_rsp_fifo_out_valid;                    // led_pio_test_s1_agent_rsp_fifo:out_valid -> led_pio_test_s1_agent:rf_sink_valid
142 
        wire  [129:0] led_pio_test_s1_agent_rsp_fifo_out_data;                     // led_pio_test_s1_agent_rsp_fifo:out_data -> led_pio_test_s1_agent:rf_sink_data
143 
        wire          led_pio_test_s1_agent_rsp_fifo_out_ready;                    // led_pio_test_s1_agent:rf_sink_ready -> led_pio_test_s1_agent_rsp_fifo:out_ready
144 
        wire          led_pio_test_s1_agent_rsp_fifo_out_startofpacket;            // led_pio_test_s1_agent_rsp_fifo:out_startofpacket -> led_pio_test_s1_agent:rf_sink_startofpacket
145 
        wire          led_pio_test_s1_agent_rsp_fifo_out_endofpacket;              // led_pio_test_s1_agent_rsp_fifo:out_endofpacket -> led_pio_test_s1_agent:rf_sink_endofpacket
146 
        wire          led_pio_test_s1_agent_rdata_fifo_src_valid;                  // led_pio_test_s1_agent:rdata_fifo_src_valid -> led_pio_test_s1_agent_rdata_fifo:in_valid
147 
        wire   [33:0] led_pio_test_s1_agent_rdata_fifo_src_data;                   // led_pio_test_s1_agent:rdata_fifo_src_data -> led_pio_test_s1_agent_rdata_fifo:in_data
148 
        wire          led_pio_test_s1_agent_rdata_fifo_src_ready;                  // led_pio_test_s1_agent_rdata_fifo:in_ready -> led_pio_test_s1_agent:rdata_fifo_src_ready
149 
        wire   [31:0] timecode_rx_s1_agent_m0_readdata;                            // timecode_rx_s1_translator:uav_readdata -> timecode_rx_s1_agent:m0_readdata
150 
        wire          timecode_rx_s1_agent_m0_waitrequest;                         // timecode_rx_s1_translator:uav_waitrequest -> timecode_rx_s1_agent:m0_waitrequest
151 
        wire          timecode_rx_s1_agent_m0_debugaccess;                         // timecode_rx_s1_agent:m0_debugaccess -> timecode_rx_s1_translator:uav_debugaccess
152 
        wire   [29:0] timecode_rx_s1_agent_m0_address;                             // timecode_rx_s1_agent:m0_address -> timecode_rx_s1_translator:uav_address
153 
        wire    [3:0] timecode_rx_s1_agent_m0_byteenable;                          // timecode_rx_s1_agent:m0_byteenable -> timecode_rx_s1_translator:uav_byteenable
154 
        wire          timecode_rx_s1_agent_m0_read;                                // timecode_rx_s1_agent:m0_read -> timecode_rx_s1_translator:uav_read
155 
        wire          timecode_rx_s1_agent_m0_readdatavalid;                       // timecode_rx_s1_translator:uav_readdatavalid -> timecode_rx_s1_agent:m0_readdatavalid
156 
        wire          timecode_rx_s1_agent_m0_lock;                                // timecode_rx_s1_agent:m0_lock -> timecode_rx_s1_translator:uav_lock
157 
        wire   [31:0] timecode_rx_s1_agent_m0_writedata;                           // timecode_rx_s1_agent:m0_writedata -> timecode_rx_s1_translator:uav_writedata
158 
        wire          timecode_rx_s1_agent_m0_write;                               // timecode_rx_s1_agent:m0_write -> timecode_rx_s1_translator:uav_write
159 
        wire    [2:0] timecode_rx_s1_agent_m0_burstcount;                          // timecode_rx_s1_agent:m0_burstcount -> timecode_rx_s1_translator:uav_burstcount
160 
        wire          timecode_rx_s1_agent_rf_source_valid;                        // timecode_rx_s1_agent:rf_source_valid -> timecode_rx_s1_agent_rsp_fifo:in_valid
161 
        wire  [129:0] timecode_rx_s1_agent_rf_source_data;                         // timecode_rx_s1_agent:rf_source_data -> timecode_rx_s1_agent_rsp_fifo:in_data
162 
        wire          timecode_rx_s1_agent_rf_source_ready;                        // timecode_rx_s1_agent_rsp_fifo:in_ready -> timecode_rx_s1_agent:rf_source_ready
163 
        wire          timecode_rx_s1_agent_rf_source_startofpacket;                // timecode_rx_s1_agent:rf_source_startofpacket -> timecode_rx_s1_agent_rsp_fifo:in_startofpacket
164 
        wire          timecode_rx_s1_agent_rf_source_endofpacket;                  // timecode_rx_s1_agent:rf_source_endofpacket -> timecode_rx_s1_agent_rsp_fifo:in_endofpacket
165 
        wire          timecode_rx_s1_agent_rsp_fifo_out_valid;                     // timecode_rx_s1_agent_rsp_fifo:out_valid -> timecode_rx_s1_agent:rf_sink_valid
166 
        wire  [129:0] timecode_rx_s1_agent_rsp_fifo_out_data;                      // timecode_rx_s1_agent_rsp_fifo:out_data -> timecode_rx_s1_agent:rf_sink_data
167 
        wire          timecode_rx_s1_agent_rsp_fifo_out_ready;                     // timecode_rx_s1_agent:rf_sink_ready -> timecode_rx_s1_agent_rsp_fifo:out_ready
168 
        wire          timecode_rx_s1_agent_rsp_fifo_out_startofpacket;             // timecode_rx_s1_agent_rsp_fifo:out_startofpacket -> timecode_rx_s1_agent:rf_sink_startofpacket
169 
        wire          timecode_rx_s1_agent_rsp_fifo_out_endofpacket;               // timecode_rx_s1_agent_rsp_fifo:out_endofpacket -> timecode_rx_s1_agent:rf_sink_endofpacket
170 
        wire          timecode_rx_s1_agent_rdata_fifo_src_valid;                   // timecode_rx_s1_agent:rdata_fifo_src_valid -> timecode_rx_s1_agent_rdata_fifo:in_valid
171 
        wire   [33:0] timecode_rx_s1_agent_rdata_fifo_src_data;                    // timecode_rx_s1_agent:rdata_fifo_src_data -> timecode_rx_s1_agent_rdata_fifo:in_data
172 
        wire          timecode_rx_s1_agent_rdata_fifo_src_ready;                   // timecode_rx_s1_agent_rdata_fifo:in_ready -> timecode_rx_s1_agent:rdata_fifo_src_ready
173 
        wire   [31:0] timecode_ready_rx_s1_agent_m0_readdata;                      // timecode_ready_rx_s1_translator:uav_readdata -> timecode_ready_rx_s1_agent:m0_readdata
174 
        wire          timecode_ready_rx_s1_agent_m0_waitrequest;                   // timecode_ready_rx_s1_translator:uav_waitrequest -> timecode_ready_rx_s1_agent:m0_waitrequest
175 
        wire          timecode_ready_rx_s1_agent_m0_debugaccess;                   // timecode_ready_rx_s1_agent:m0_debugaccess -> timecode_ready_rx_s1_translator:uav_debugaccess
176 
        wire   [29:0] timecode_ready_rx_s1_agent_m0_address;                       // timecode_ready_rx_s1_agent:m0_address -> timecode_ready_rx_s1_translator:uav_address
177 
        wire    [3:0] timecode_ready_rx_s1_agent_m0_byteenable;                    // timecode_ready_rx_s1_agent:m0_byteenable -> timecode_ready_rx_s1_translator:uav_byteenable
178 
        wire          timecode_ready_rx_s1_agent_m0_read;                          // timecode_ready_rx_s1_agent:m0_read -> timecode_ready_rx_s1_translator:uav_read
179 
        wire          timecode_ready_rx_s1_agent_m0_readdatavalid;                 // timecode_ready_rx_s1_translator:uav_readdatavalid -> timecode_ready_rx_s1_agent:m0_readdatavalid
180 
        wire          timecode_ready_rx_s1_agent_m0_lock;                          // timecode_ready_rx_s1_agent:m0_lock -> timecode_ready_rx_s1_translator:uav_lock
181 
        wire   [31:0] timecode_ready_rx_s1_agent_m0_writedata;                     // timecode_ready_rx_s1_agent:m0_writedata -> timecode_ready_rx_s1_translator:uav_writedata
182 
        wire          timecode_ready_rx_s1_agent_m0_write;                         // timecode_ready_rx_s1_agent:m0_write -> timecode_ready_rx_s1_translator:uav_write
183 
        wire    [2:0] timecode_ready_rx_s1_agent_m0_burstcount;                    // timecode_ready_rx_s1_agent:m0_burstcount -> timecode_ready_rx_s1_translator:uav_burstcount
184 
        wire          timecode_ready_rx_s1_agent_rf_source_valid;                  // timecode_ready_rx_s1_agent:rf_source_valid -> timecode_ready_rx_s1_agent_rsp_fifo:in_valid
185 
        wire  [129:0] timecode_ready_rx_s1_agent_rf_source_data;                   // timecode_ready_rx_s1_agent:rf_source_data -> timecode_ready_rx_s1_agent_rsp_fifo:in_data
186 
        wire          timecode_ready_rx_s1_agent_rf_source_ready;                  // timecode_ready_rx_s1_agent_rsp_fifo:in_ready -> timecode_ready_rx_s1_agent:rf_source_ready
187 
        wire          timecode_ready_rx_s1_agent_rf_source_startofpacket;          // timecode_ready_rx_s1_agent:rf_source_startofpacket -> timecode_ready_rx_s1_agent_rsp_fifo:in_startofpacket
188 
        wire          timecode_ready_rx_s1_agent_rf_source_endofpacket;            // timecode_ready_rx_s1_agent:rf_source_endofpacket -> timecode_ready_rx_s1_agent_rsp_fifo:in_endofpacket
189 
        wire          timecode_ready_rx_s1_agent_rsp_fifo_out_valid;               // timecode_ready_rx_s1_agent_rsp_fifo:out_valid -> timecode_ready_rx_s1_agent:rf_sink_valid
190 
        wire  [129:0] timecode_ready_rx_s1_agent_rsp_fifo_out_data;                // timecode_ready_rx_s1_agent_rsp_fifo:out_data -> timecode_ready_rx_s1_agent:rf_sink_data
191 
        wire          timecode_ready_rx_s1_agent_rsp_fifo_out_ready;               // timecode_ready_rx_s1_agent:rf_sink_ready -> timecode_ready_rx_s1_agent_rsp_fifo:out_ready
192 
        wire          timecode_ready_rx_s1_agent_rsp_fifo_out_startofpacket;       // timecode_ready_rx_s1_agent_rsp_fifo:out_startofpacket -> timecode_ready_rx_s1_agent:rf_sink_startofpacket
193 
        wire          timecode_ready_rx_s1_agent_rsp_fifo_out_endofpacket;         // timecode_ready_rx_s1_agent_rsp_fifo:out_endofpacket -> timecode_ready_rx_s1_agent:rf_sink_endofpacket
194 
        wire          timecode_ready_rx_s1_agent_rdata_fifo_src_valid;             // timecode_ready_rx_s1_agent:rdata_fifo_src_valid -> timecode_ready_rx_s1_agent_rdata_fifo:in_valid
195 
        wire   [33:0] timecode_ready_rx_s1_agent_rdata_fifo_src_data;              // timecode_ready_rx_s1_agent:rdata_fifo_src_data -> timecode_ready_rx_s1_agent_rdata_fifo:in_data
196 
        wire          timecode_ready_rx_s1_agent_rdata_fifo_src_ready;             // timecode_ready_rx_s1_agent_rdata_fifo:in_ready -> timecode_ready_rx_s1_agent:rdata_fifo_src_ready
197 
        wire   [31:0] data_flag_rx_s1_agent_m0_readdata;                           // data_flag_rx_s1_translator:uav_readdata -> data_flag_rx_s1_agent:m0_readdata
198 
        wire          data_flag_rx_s1_agent_m0_waitrequest;                        // data_flag_rx_s1_translator:uav_waitrequest -> data_flag_rx_s1_agent:m0_waitrequest
199 
        wire          data_flag_rx_s1_agent_m0_debugaccess;                        // data_flag_rx_s1_agent:m0_debugaccess -> data_flag_rx_s1_translator:uav_debugaccess
200 
        wire   [29:0] data_flag_rx_s1_agent_m0_address;                            // data_flag_rx_s1_agent:m0_address -> data_flag_rx_s1_translator:uav_address
201 
        wire    [3:0] data_flag_rx_s1_agent_m0_byteenable;                         // data_flag_rx_s1_agent:m0_byteenable -> data_flag_rx_s1_translator:uav_byteenable
202 
        wire          data_flag_rx_s1_agent_m0_read;                               // data_flag_rx_s1_agent:m0_read -> data_flag_rx_s1_translator:uav_read
203 
        wire          data_flag_rx_s1_agent_m0_readdatavalid;                      // data_flag_rx_s1_translator:uav_readdatavalid -> data_flag_rx_s1_agent:m0_readdatavalid
204 
        wire          data_flag_rx_s1_agent_m0_lock;                               // data_flag_rx_s1_agent:m0_lock -> data_flag_rx_s1_translator:uav_lock
205 
        wire   [31:0] data_flag_rx_s1_agent_m0_writedata;                          // data_flag_rx_s1_agent:m0_writedata -> data_flag_rx_s1_translator:uav_writedata
206 
        wire          data_flag_rx_s1_agent_m0_write;                              // data_flag_rx_s1_agent:m0_write -> data_flag_rx_s1_translator:uav_write
207 
        wire    [2:0] data_flag_rx_s1_agent_m0_burstcount;                         // data_flag_rx_s1_agent:m0_burstcount -> data_flag_rx_s1_translator:uav_burstcount
208 
        wire          data_flag_rx_s1_agent_rf_source_valid;                       // data_flag_rx_s1_agent:rf_source_valid -> data_flag_rx_s1_agent_rsp_fifo:in_valid
209 
        wire  [129:0] data_flag_rx_s1_agent_rf_source_data;                        // data_flag_rx_s1_agent:rf_source_data -> data_flag_rx_s1_agent_rsp_fifo:in_data
210 
        wire          data_flag_rx_s1_agent_rf_source_ready;                       // data_flag_rx_s1_agent_rsp_fifo:in_ready -> data_flag_rx_s1_agent:rf_source_ready
211 
        wire          data_flag_rx_s1_agent_rf_source_startofpacket;               // data_flag_rx_s1_agent:rf_source_startofpacket -> data_flag_rx_s1_agent_rsp_fifo:in_startofpacket
212 
        wire          data_flag_rx_s1_agent_rf_source_endofpacket;                 // data_flag_rx_s1_agent:rf_source_endofpacket -> data_flag_rx_s1_agent_rsp_fifo:in_endofpacket
213 
        wire          data_flag_rx_s1_agent_rsp_fifo_out_valid;                    // data_flag_rx_s1_agent_rsp_fifo:out_valid -> data_flag_rx_s1_agent:rf_sink_valid
214 
        wire  [129:0] data_flag_rx_s1_agent_rsp_fifo_out_data;                     // data_flag_rx_s1_agent_rsp_fifo:out_data -> data_flag_rx_s1_agent:rf_sink_data
215 
        wire          data_flag_rx_s1_agent_rsp_fifo_out_ready;                    // data_flag_rx_s1_agent:rf_sink_ready -> data_flag_rx_s1_agent_rsp_fifo:out_ready
216 
        wire          data_flag_rx_s1_agent_rsp_fifo_out_startofpacket;            // data_flag_rx_s1_agent_rsp_fifo:out_startofpacket -> data_flag_rx_s1_agent:rf_sink_startofpacket
217 
        wire          data_flag_rx_s1_agent_rsp_fifo_out_endofpacket;              // data_flag_rx_s1_agent_rsp_fifo:out_endofpacket -> data_flag_rx_s1_agent:rf_sink_endofpacket
218 
        wire          data_flag_rx_s1_agent_rdata_fifo_src_valid;                  // data_flag_rx_s1_agent:rdata_fifo_src_valid -> data_flag_rx_s1_agent_rdata_fifo:in_valid
219 
        wire   [33:0] data_flag_rx_s1_agent_rdata_fifo_src_data;                   // data_flag_rx_s1_agent:rdata_fifo_src_data -> data_flag_rx_s1_agent_rdata_fifo:in_data
220 
        wire          data_flag_rx_s1_agent_rdata_fifo_src_ready;                  // data_flag_rx_s1_agent_rdata_fifo:in_ready -> data_flag_rx_s1_agent:rdata_fifo_src_ready
221 
        wire   [31:0] data_read_en_rx_s1_agent_m0_readdata;                        // data_read_en_rx_s1_translator:uav_readdata -> data_read_en_rx_s1_agent:m0_readdata
222 
        wire          data_read_en_rx_s1_agent_m0_waitrequest;                     // data_read_en_rx_s1_translator:uav_waitrequest -> data_read_en_rx_s1_agent:m0_waitrequest
223 
        wire          data_read_en_rx_s1_agent_m0_debugaccess;                     // data_read_en_rx_s1_agent:m0_debugaccess -> data_read_en_rx_s1_translator:uav_debugaccess
224 
        wire   [29:0] data_read_en_rx_s1_agent_m0_address;                         // data_read_en_rx_s1_agent:m0_address -> data_read_en_rx_s1_translator:uav_address
225 
        wire    [3:0] data_read_en_rx_s1_agent_m0_byteenable;                      // data_read_en_rx_s1_agent:m0_byteenable -> data_read_en_rx_s1_translator:uav_byteenable
226 
        wire          data_read_en_rx_s1_agent_m0_read;                            // data_read_en_rx_s1_agent:m0_read -> data_read_en_rx_s1_translator:uav_read
227 
        wire          data_read_en_rx_s1_agent_m0_readdatavalid;                   // data_read_en_rx_s1_translator:uav_readdatavalid -> data_read_en_rx_s1_agent:m0_readdatavalid
228 
        wire          data_read_en_rx_s1_agent_m0_lock;                            // data_read_en_rx_s1_agent:m0_lock -> data_read_en_rx_s1_translator:uav_lock
229 
        wire   [31:0] data_read_en_rx_s1_agent_m0_writedata;                       // data_read_en_rx_s1_agent:m0_writedata -> data_read_en_rx_s1_translator:uav_writedata
230 
        wire          data_read_en_rx_s1_agent_m0_write;                           // data_read_en_rx_s1_agent:m0_write -> data_read_en_rx_s1_translator:uav_write
231 
        wire    [2:0] data_read_en_rx_s1_agent_m0_burstcount;                      // data_read_en_rx_s1_agent:m0_burstcount -> data_read_en_rx_s1_translator:uav_burstcount
232 
        wire          data_read_en_rx_s1_agent_rf_source_valid;                    // data_read_en_rx_s1_agent:rf_source_valid -> data_read_en_rx_s1_agent_rsp_fifo:in_valid
233 
        wire  [129:0] data_read_en_rx_s1_agent_rf_source_data;                     // data_read_en_rx_s1_agent:rf_source_data -> data_read_en_rx_s1_agent_rsp_fifo:in_data
234 
        wire          data_read_en_rx_s1_agent_rf_source_ready;                    // data_read_en_rx_s1_agent_rsp_fifo:in_ready -> data_read_en_rx_s1_agent:rf_source_ready
235 
        wire          data_read_en_rx_s1_agent_rf_source_startofpacket;            // data_read_en_rx_s1_agent:rf_source_startofpacket -> data_read_en_rx_s1_agent_rsp_fifo:in_startofpacket
236 
        wire          data_read_en_rx_s1_agent_rf_source_endofpacket;              // data_read_en_rx_s1_agent:rf_source_endofpacket -> data_read_en_rx_s1_agent_rsp_fifo:in_endofpacket
237 
        wire          data_read_en_rx_s1_agent_rsp_fifo_out_valid;                 // data_read_en_rx_s1_agent_rsp_fifo:out_valid -> data_read_en_rx_s1_agent:rf_sink_valid
238 
        wire  [129:0] data_read_en_rx_s1_agent_rsp_fifo_out_data;                  // data_read_en_rx_s1_agent_rsp_fifo:out_data -> data_read_en_rx_s1_agent:rf_sink_data
239 
        wire          data_read_en_rx_s1_agent_rsp_fifo_out_ready;                 // data_read_en_rx_s1_agent:rf_sink_ready -> data_read_en_rx_s1_agent_rsp_fifo:out_ready
240 
        wire          data_read_en_rx_s1_agent_rsp_fifo_out_startofpacket;         // data_read_en_rx_s1_agent_rsp_fifo:out_startofpacket -> data_read_en_rx_s1_agent:rf_sink_startofpacket
241 
        wire          data_read_en_rx_s1_agent_rsp_fifo_out_endofpacket;           // data_read_en_rx_s1_agent_rsp_fifo:out_endofpacket -> data_read_en_rx_s1_agent:rf_sink_endofpacket
242 
        wire          data_read_en_rx_s1_agent_rdata_fifo_src_valid;               // data_read_en_rx_s1_agent:rdata_fifo_src_valid -> data_read_en_rx_s1_agent_rdata_fifo:in_valid
243 
        wire   [33:0] data_read_en_rx_s1_agent_rdata_fifo_src_data;                // data_read_en_rx_s1_agent:rdata_fifo_src_data -> data_read_en_rx_s1_agent_rdata_fifo:in_data
244 
        wire          data_read_en_rx_s1_agent_rdata_fifo_src_ready;               // data_read_en_rx_s1_agent_rdata_fifo:in_ready -> data_read_en_rx_s1_agent:rdata_fifo_src_ready
245 
        wire   [31:0] fifo_full_rx_status_s1_agent_m0_readdata;                    // fifo_full_rx_status_s1_translator:uav_readdata -> fifo_full_rx_status_s1_agent:m0_readdata
246 
        wire          fifo_full_rx_status_s1_agent_m0_waitrequest;                 // fifo_full_rx_status_s1_translator:uav_waitrequest -> fifo_full_rx_status_s1_agent:m0_waitrequest
247 
        wire          fifo_full_rx_status_s1_agent_m0_debugaccess;                 // fifo_full_rx_status_s1_agent:m0_debugaccess -> fifo_full_rx_status_s1_translator:uav_debugaccess
248 
        wire   [29:0] fifo_full_rx_status_s1_agent_m0_address;                     // fifo_full_rx_status_s1_agent:m0_address -> fifo_full_rx_status_s1_translator:uav_address
249 
        wire    [3:0] fifo_full_rx_status_s1_agent_m0_byteenable;                  // fifo_full_rx_status_s1_agent:m0_byteenable -> fifo_full_rx_status_s1_translator:uav_byteenable
250 
        wire          fifo_full_rx_status_s1_agent_m0_read;                        // fifo_full_rx_status_s1_agent:m0_read -> fifo_full_rx_status_s1_translator:uav_read
251 
        wire          fifo_full_rx_status_s1_agent_m0_readdatavalid;               // fifo_full_rx_status_s1_translator:uav_readdatavalid -> fifo_full_rx_status_s1_agent:m0_readdatavalid
252 
        wire          fifo_full_rx_status_s1_agent_m0_lock;                        // fifo_full_rx_status_s1_agent:m0_lock -> fifo_full_rx_status_s1_translator:uav_lock
253 
        wire   [31:0] fifo_full_rx_status_s1_agent_m0_writedata;                   // fifo_full_rx_status_s1_agent:m0_writedata -> fifo_full_rx_status_s1_translator:uav_writedata
254 
        wire          fifo_full_rx_status_s1_agent_m0_write;                       // fifo_full_rx_status_s1_agent:m0_write -> fifo_full_rx_status_s1_translator:uav_write
255 
        wire    [2:0] fifo_full_rx_status_s1_agent_m0_burstcount;                  // fifo_full_rx_status_s1_agent:m0_burstcount -> fifo_full_rx_status_s1_translator:uav_burstcount
256 
        wire          fifo_full_rx_status_s1_agent_rf_source_valid;                // fifo_full_rx_status_s1_agent:rf_source_valid -> fifo_full_rx_status_s1_agent_rsp_fifo:in_valid
257 
        wire  [129:0] fifo_full_rx_status_s1_agent_rf_source_data;                 // fifo_full_rx_status_s1_agent:rf_source_data -> fifo_full_rx_status_s1_agent_rsp_fifo:in_data
258 
        wire          fifo_full_rx_status_s1_agent_rf_source_ready;                // fifo_full_rx_status_s1_agent_rsp_fifo:in_ready -> fifo_full_rx_status_s1_agent:rf_source_ready
259 
        wire          fifo_full_rx_status_s1_agent_rf_source_startofpacket;        // fifo_full_rx_status_s1_agent:rf_source_startofpacket -> fifo_full_rx_status_s1_agent_rsp_fifo:in_startofpacket
260 
        wire          fifo_full_rx_status_s1_agent_rf_source_endofpacket;          // fifo_full_rx_status_s1_agent:rf_source_endofpacket -> fifo_full_rx_status_s1_agent_rsp_fifo:in_endofpacket
261 
        wire          fifo_full_rx_status_s1_agent_rsp_fifo_out_valid;             // fifo_full_rx_status_s1_agent_rsp_fifo:out_valid -> fifo_full_rx_status_s1_agent:rf_sink_valid
262 
        wire  [129:0] fifo_full_rx_status_s1_agent_rsp_fifo_out_data;              // fifo_full_rx_status_s1_agent_rsp_fifo:out_data -> fifo_full_rx_status_s1_agent:rf_sink_data
263 
        wire          fifo_full_rx_status_s1_agent_rsp_fifo_out_ready;             // fifo_full_rx_status_s1_agent:rf_sink_ready -> fifo_full_rx_status_s1_agent_rsp_fifo:out_ready
264 
        wire          fifo_full_rx_status_s1_agent_rsp_fifo_out_startofpacket;     // fifo_full_rx_status_s1_agent_rsp_fifo:out_startofpacket -> fifo_full_rx_status_s1_agent:rf_sink_startofpacket
265 
        wire          fifo_full_rx_status_s1_agent_rsp_fifo_out_endofpacket;       // fifo_full_rx_status_s1_agent_rsp_fifo:out_endofpacket -> fifo_full_rx_status_s1_agent:rf_sink_endofpacket
266 
        wire          fifo_full_rx_status_s1_agent_rdata_fifo_src_valid;           // fifo_full_rx_status_s1_agent:rdata_fifo_src_valid -> fifo_full_rx_status_s1_agent_rdata_fifo:in_valid
267 
        wire   [33:0] fifo_full_rx_status_s1_agent_rdata_fifo_src_data;            // fifo_full_rx_status_s1_agent:rdata_fifo_src_data -> fifo_full_rx_status_s1_agent_rdata_fifo:in_data
268 
        wire          fifo_full_rx_status_s1_agent_rdata_fifo_src_ready;           // fifo_full_rx_status_s1_agent_rdata_fifo:in_ready -> fifo_full_rx_status_s1_agent:rdata_fifo_src_ready
269 
        wire   [31:0] fifo_empty_rx_status_s1_agent_m0_readdata;                   // fifo_empty_rx_status_s1_translator:uav_readdata -> fifo_empty_rx_status_s1_agent:m0_readdata
270 
        wire          fifo_empty_rx_status_s1_agent_m0_waitrequest;                // fifo_empty_rx_status_s1_translator:uav_waitrequest -> fifo_empty_rx_status_s1_agent:m0_waitrequest
271 
        wire          fifo_empty_rx_status_s1_agent_m0_debugaccess;                // fifo_empty_rx_status_s1_agent:m0_debugaccess -> fifo_empty_rx_status_s1_translator:uav_debugaccess
272 
        wire   [29:0] fifo_empty_rx_status_s1_agent_m0_address;                    // fifo_empty_rx_status_s1_agent:m0_address -> fifo_empty_rx_status_s1_translator:uav_address
273 
        wire    [3:0] fifo_empty_rx_status_s1_agent_m0_byteenable;                 // fifo_empty_rx_status_s1_agent:m0_byteenable -> fifo_empty_rx_status_s1_translator:uav_byteenable
274 
        wire          fifo_empty_rx_status_s1_agent_m0_read;                       // fifo_empty_rx_status_s1_agent:m0_read -> fifo_empty_rx_status_s1_translator:uav_read
275 
        wire          fifo_empty_rx_status_s1_agent_m0_readdatavalid;              // fifo_empty_rx_status_s1_translator:uav_readdatavalid -> fifo_empty_rx_status_s1_agent:m0_readdatavalid
276 
        wire          fifo_empty_rx_status_s1_agent_m0_lock;                       // fifo_empty_rx_status_s1_agent:m0_lock -> fifo_empty_rx_status_s1_translator:uav_lock
277 
        wire   [31:0] fifo_empty_rx_status_s1_agent_m0_writedata;                  // fifo_empty_rx_status_s1_agent:m0_writedata -> fifo_empty_rx_status_s1_translator:uav_writedata
278 
        wire          fifo_empty_rx_status_s1_agent_m0_write;                      // fifo_empty_rx_status_s1_agent:m0_write -> fifo_empty_rx_status_s1_translator:uav_write
279 
        wire    [2:0] fifo_empty_rx_status_s1_agent_m0_burstcount;                 // fifo_empty_rx_status_s1_agent:m0_burstcount -> fifo_empty_rx_status_s1_translator:uav_burstcount
280 
        wire          fifo_empty_rx_status_s1_agent_rf_source_valid;               // fifo_empty_rx_status_s1_agent:rf_source_valid -> fifo_empty_rx_status_s1_agent_rsp_fifo:in_valid
281 
        wire  [129:0] fifo_empty_rx_status_s1_agent_rf_source_data;                // fifo_empty_rx_status_s1_agent:rf_source_data -> fifo_empty_rx_status_s1_agent_rsp_fifo:in_data
282 
        wire          fifo_empty_rx_status_s1_agent_rf_source_ready;               // fifo_empty_rx_status_s1_agent_rsp_fifo:in_ready -> fifo_empty_rx_status_s1_agent:rf_source_ready
283 
        wire          fifo_empty_rx_status_s1_agent_rf_source_startofpacket;       // fifo_empty_rx_status_s1_agent:rf_source_startofpacket -> fifo_empty_rx_status_s1_agent_rsp_fifo:in_startofpacket
284 
        wire          fifo_empty_rx_status_s1_agent_rf_source_endofpacket;         // fifo_empty_rx_status_s1_agent:rf_source_endofpacket -> fifo_empty_rx_status_s1_agent_rsp_fifo:in_endofpacket
285 
        wire          fifo_empty_rx_status_s1_agent_rsp_fifo_out_valid;            // fifo_empty_rx_status_s1_agent_rsp_fifo:out_valid -> fifo_empty_rx_status_s1_agent:rf_sink_valid
286 
        wire  [129:0] fifo_empty_rx_status_s1_agent_rsp_fifo_out_data;             // fifo_empty_rx_status_s1_agent_rsp_fifo:out_data -> fifo_empty_rx_status_s1_agent:rf_sink_data
287 
        wire          fifo_empty_rx_status_s1_agent_rsp_fifo_out_ready;            // fifo_empty_rx_status_s1_agent:rf_sink_ready -> fifo_empty_rx_status_s1_agent_rsp_fifo:out_ready
288 
        wire          fifo_empty_rx_status_s1_agent_rsp_fifo_out_startofpacket;    // fifo_empty_rx_status_s1_agent_rsp_fifo:out_startofpacket -> fifo_empty_rx_status_s1_agent:rf_sink_startofpacket
289 
        wire          fifo_empty_rx_status_s1_agent_rsp_fifo_out_endofpacket;      // fifo_empty_rx_status_s1_agent_rsp_fifo:out_endofpacket -> fifo_empty_rx_status_s1_agent:rf_sink_endofpacket
290 
        wire          fifo_empty_rx_status_s1_agent_rdata_fifo_src_valid;          // fifo_empty_rx_status_s1_agent:rdata_fifo_src_valid -> fifo_empty_rx_status_s1_agent_rdata_fifo:in_valid
291 
        wire   [33:0] fifo_empty_rx_status_s1_agent_rdata_fifo_src_data;           // fifo_empty_rx_status_s1_agent:rdata_fifo_src_data -> fifo_empty_rx_status_s1_agent_rdata_fifo:in_data
292 
        wire          fifo_empty_rx_status_s1_agent_rdata_fifo_src_ready;          // fifo_empty_rx_status_s1_agent_rdata_fifo:in_ready -> fifo_empty_rx_status_s1_agent:rdata_fifo_src_ready
293 
        wire   [31:0] link_start_s1_agent_m0_readdata;                             // link_start_s1_translator:uav_readdata -> link_start_s1_agent:m0_readdata
294 
        wire          link_start_s1_agent_m0_waitrequest;                          // link_start_s1_translator:uav_waitrequest -> link_start_s1_agent:m0_waitrequest
295 
        wire          link_start_s1_agent_m0_debugaccess;                          // link_start_s1_agent:m0_debugaccess -> link_start_s1_translator:uav_debugaccess
296 
        wire   [29:0] link_start_s1_agent_m0_address;                              // link_start_s1_agent:m0_address -> link_start_s1_translator:uav_address
297 
        wire    [3:0] link_start_s1_agent_m0_byteenable;                           // link_start_s1_agent:m0_byteenable -> link_start_s1_translator:uav_byteenable
298 
        wire          link_start_s1_agent_m0_read;                                 // link_start_s1_agent:m0_read -> link_start_s1_translator:uav_read
299 
        wire          link_start_s1_agent_m0_readdatavalid;                        // link_start_s1_translator:uav_readdatavalid -> link_start_s1_agent:m0_readdatavalid
300 
        wire          link_start_s1_agent_m0_lock;                                 // link_start_s1_agent:m0_lock -> link_start_s1_translator:uav_lock
301 
        wire   [31:0] link_start_s1_agent_m0_writedata;                            // link_start_s1_agent:m0_writedata -> link_start_s1_translator:uav_writedata
302 
        wire          link_start_s1_agent_m0_write;                                // link_start_s1_agent:m0_write -> link_start_s1_translator:uav_write
303 
        wire    [2:0] link_start_s1_agent_m0_burstcount;                           // link_start_s1_agent:m0_burstcount -> link_start_s1_translator:uav_burstcount
304 
        wire          link_start_s1_agent_rf_source_valid;                         // link_start_s1_agent:rf_source_valid -> link_start_s1_agent_rsp_fifo:in_valid
305 
        wire  [129:0] link_start_s1_agent_rf_source_data;                          // link_start_s1_agent:rf_source_data -> link_start_s1_agent_rsp_fifo:in_data
306 
        wire          link_start_s1_agent_rf_source_ready;                         // link_start_s1_agent_rsp_fifo:in_ready -> link_start_s1_agent:rf_source_ready
307 
        wire          link_start_s1_agent_rf_source_startofpacket;                 // link_start_s1_agent:rf_source_startofpacket -> link_start_s1_agent_rsp_fifo:in_startofpacket
308 
        wire          link_start_s1_agent_rf_source_endofpacket;                   // link_start_s1_agent:rf_source_endofpacket -> link_start_s1_agent_rsp_fifo:in_endofpacket
309 
        wire          link_start_s1_agent_rsp_fifo_out_valid;                      // link_start_s1_agent_rsp_fifo:out_valid -> link_start_s1_agent:rf_sink_valid
310 
        wire  [129:0] link_start_s1_agent_rsp_fifo_out_data;                       // link_start_s1_agent_rsp_fifo:out_data -> link_start_s1_agent:rf_sink_data
311 
        wire          link_start_s1_agent_rsp_fifo_out_ready;                      // link_start_s1_agent:rf_sink_ready -> link_start_s1_agent_rsp_fifo:out_ready
312 
        wire          link_start_s1_agent_rsp_fifo_out_startofpacket;              // link_start_s1_agent_rsp_fifo:out_startofpacket -> link_start_s1_agent:rf_sink_startofpacket
313 
        wire          link_start_s1_agent_rsp_fifo_out_endofpacket;                // link_start_s1_agent_rsp_fifo:out_endofpacket -> link_start_s1_agent:rf_sink_endofpacket
314 
        wire          link_start_s1_agent_rdata_fifo_src_valid;                    // link_start_s1_agent:rdata_fifo_src_valid -> link_start_s1_agent_rdata_fifo:in_valid
315 
        wire   [33:0] link_start_s1_agent_rdata_fifo_src_data;                     // link_start_s1_agent:rdata_fifo_src_data -> link_start_s1_agent_rdata_fifo:in_data
316 
        wire          link_start_s1_agent_rdata_fifo_src_ready;                    // link_start_s1_agent_rdata_fifo:in_ready -> link_start_s1_agent:rdata_fifo_src_ready
317 
        wire   [31:0] auto_start_s1_agent_m0_readdata;                             // auto_start_s1_translator:uav_readdata -> auto_start_s1_agent:m0_readdata
318 
        wire          auto_start_s1_agent_m0_waitrequest;                          // auto_start_s1_translator:uav_waitrequest -> auto_start_s1_agent:m0_waitrequest
319 
        wire          auto_start_s1_agent_m0_debugaccess;                          // auto_start_s1_agent:m0_debugaccess -> auto_start_s1_translator:uav_debugaccess
320 
        wire   [29:0] auto_start_s1_agent_m0_address;                              // auto_start_s1_agent:m0_address -> auto_start_s1_translator:uav_address
321 
        wire    [3:0] auto_start_s1_agent_m0_byteenable;                           // auto_start_s1_agent:m0_byteenable -> auto_start_s1_translator:uav_byteenable
322 
        wire          auto_start_s1_agent_m0_read;                                 // auto_start_s1_agent:m0_read -> auto_start_s1_translator:uav_read
323 
        wire          auto_start_s1_agent_m0_readdatavalid;                        // auto_start_s1_translator:uav_readdatavalid -> auto_start_s1_agent:m0_readdatavalid
324 
        wire          auto_start_s1_agent_m0_lock;                                 // auto_start_s1_agent:m0_lock -> auto_start_s1_translator:uav_lock
325 
        wire   [31:0] auto_start_s1_agent_m0_writedata;                            // auto_start_s1_agent:m0_writedata -> auto_start_s1_translator:uav_writedata
326 
        wire          auto_start_s1_agent_m0_write;                                // auto_start_s1_agent:m0_write -> auto_start_s1_translator:uav_write
327 
        wire    [2:0] auto_start_s1_agent_m0_burstcount;                           // auto_start_s1_agent:m0_burstcount -> auto_start_s1_translator:uav_burstcount
328 
        wire          auto_start_s1_agent_rf_source_valid;                         // auto_start_s1_agent:rf_source_valid -> auto_start_s1_agent_rsp_fifo:in_valid
329 
        wire  [129:0] auto_start_s1_agent_rf_source_data;                          // auto_start_s1_agent:rf_source_data -> auto_start_s1_agent_rsp_fifo:in_data
330 
        wire          auto_start_s1_agent_rf_source_ready;                         // auto_start_s1_agent_rsp_fifo:in_ready -> auto_start_s1_agent:rf_source_ready
331 
        wire          auto_start_s1_agent_rf_source_startofpacket;                 // auto_start_s1_agent:rf_source_startofpacket -> auto_start_s1_agent_rsp_fifo:in_startofpacket
332 
        wire          auto_start_s1_agent_rf_source_endofpacket;                   // auto_start_s1_agent:rf_source_endofpacket -> auto_start_s1_agent_rsp_fifo:in_endofpacket
333 
        wire          auto_start_s1_agent_rsp_fifo_out_valid;                      // auto_start_s1_agent_rsp_fifo:out_valid -> auto_start_s1_agent:rf_sink_valid
334 
        wire  [129:0] auto_start_s1_agent_rsp_fifo_out_data;                       // auto_start_s1_agent_rsp_fifo:out_data -> auto_start_s1_agent:rf_sink_data
335 
        wire          auto_start_s1_agent_rsp_fifo_out_ready;                      // auto_start_s1_agent:rf_sink_ready -> auto_start_s1_agent_rsp_fifo:out_ready
336 
        wire          auto_start_s1_agent_rsp_fifo_out_startofpacket;              // auto_start_s1_agent_rsp_fifo:out_startofpacket -> auto_start_s1_agent:rf_sink_startofpacket
337 
        wire          auto_start_s1_agent_rsp_fifo_out_endofpacket;                // auto_start_s1_agent_rsp_fifo:out_endofpacket -> auto_start_s1_agent:rf_sink_endofpacket
338 
        wire          auto_start_s1_agent_rdata_fifo_src_valid;                    // auto_start_s1_agent:rdata_fifo_src_valid -> auto_start_s1_agent_rdata_fifo:in_valid
339 
        wire   [33:0] auto_start_s1_agent_rdata_fifo_src_data;                     // auto_start_s1_agent:rdata_fifo_src_data -> auto_start_s1_agent_rdata_fifo:in_data
340 
        wire          auto_start_s1_agent_rdata_fifo_src_ready;                    // auto_start_s1_agent_rdata_fifo:in_ready -> auto_start_s1_agent:rdata_fifo_src_ready
341 
        wire   [31:0] link_disable_s1_agent_m0_readdata;                           // link_disable_s1_translator:uav_readdata -> link_disable_s1_agent:m0_readdata
342 
        wire          link_disable_s1_agent_m0_waitrequest;                        // link_disable_s1_translator:uav_waitrequest -> link_disable_s1_agent:m0_waitrequest
343 
        wire          link_disable_s1_agent_m0_debugaccess;                        // link_disable_s1_agent:m0_debugaccess -> link_disable_s1_translator:uav_debugaccess
344 
        wire   [29:0] link_disable_s1_agent_m0_address;                            // link_disable_s1_agent:m0_address -> link_disable_s1_translator:uav_address
345 
        wire    [3:0] link_disable_s1_agent_m0_byteenable;                         // link_disable_s1_agent:m0_byteenable -> link_disable_s1_translator:uav_byteenable
346 
        wire          link_disable_s1_agent_m0_read;                               // link_disable_s1_agent:m0_read -> link_disable_s1_translator:uav_read
347 
        wire          link_disable_s1_agent_m0_readdatavalid;                      // link_disable_s1_translator:uav_readdatavalid -> link_disable_s1_agent:m0_readdatavalid
348 
        wire          link_disable_s1_agent_m0_lock;                               // link_disable_s1_agent:m0_lock -> link_disable_s1_translator:uav_lock
349 
        wire   [31:0] link_disable_s1_agent_m0_writedata;                          // link_disable_s1_agent:m0_writedata -> link_disable_s1_translator:uav_writedata
350 
        wire          link_disable_s1_agent_m0_write;                              // link_disable_s1_agent:m0_write -> link_disable_s1_translator:uav_write
351 
        wire    [2:0] link_disable_s1_agent_m0_burstcount;                         // link_disable_s1_agent:m0_burstcount -> link_disable_s1_translator:uav_burstcount
352 
        wire          link_disable_s1_agent_rf_source_valid;                       // link_disable_s1_agent:rf_source_valid -> link_disable_s1_agent_rsp_fifo:in_valid
353 
        wire  [129:0] link_disable_s1_agent_rf_source_data;                        // link_disable_s1_agent:rf_source_data -> link_disable_s1_agent_rsp_fifo:in_data
354 
        wire          link_disable_s1_agent_rf_source_ready;                       // link_disable_s1_agent_rsp_fifo:in_ready -> link_disable_s1_agent:rf_source_ready
355 
        wire          link_disable_s1_agent_rf_source_startofpacket;               // link_disable_s1_agent:rf_source_startofpacket -> link_disable_s1_agent_rsp_fifo:in_startofpacket
356 
        wire          link_disable_s1_agent_rf_source_endofpacket;                 // link_disable_s1_agent:rf_source_endofpacket -> link_disable_s1_agent_rsp_fifo:in_endofpacket
357 
        wire          link_disable_s1_agent_rsp_fifo_out_valid;                    // link_disable_s1_agent_rsp_fifo:out_valid -> link_disable_s1_agent:rf_sink_valid
358 
        wire  [129:0] link_disable_s1_agent_rsp_fifo_out_data;                     // link_disable_s1_agent_rsp_fifo:out_data -> link_disable_s1_agent:rf_sink_data
359 
        wire          link_disable_s1_agent_rsp_fifo_out_ready;                    // link_disable_s1_agent:rf_sink_ready -> link_disable_s1_agent_rsp_fifo:out_ready
360 
        wire          link_disable_s1_agent_rsp_fifo_out_startofpacket;            // link_disable_s1_agent_rsp_fifo:out_startofpacket -> link_disable_s1_agent:rf_sink_startofpacket
361 
        wire          link_disable_s1_agent_rsp_fifo_out_endofpacket;              // link_disable_s1_agent_rsp_fifo:out_endofpacket -> link_disable_s1_agent:rf_sink_endofpacket
362 
        wire          link_disable_s1_agent_rdata_fifo_src_valid;                  // link_disable_s1_agent:rdata_fifo_src_valid -> link_disable_s1_agent_rdata_fifo:in_valid
363 
        wire   [33:0] link_disable_s1_agent_rdata_fifo_src_data;                   // link_disable_s1_agent:rdata_fifo_src_data -> link_disable_s1_agent_rdata_fifo:in_data
364 
        wire          link_disable_s1_agent_rdata_fifo_src_ready;                  // link_disable_s1_agent_rdata_fifo:in_ready -> link_disable_s1_agent:rdata_fifo_src_ready
365 
        wire   [31:0] write_data_fifo_tx_s1_agent_m0_readdata;                     // write_data_fifo_tx_s1_translator:uav_readdata -> write_data_fifo_tx_s1_agent:m0_readdata
366 
        wire          write_data_fifo_tx_s1_agent_m0_waitrequest;                  // write_data_fifo_tx_s1_translator:uav_waitrequest -> write_data_fifo_tx_s1_agent:m0_waitrequest
367 
        wire          write_data_fifo_tx_s1_agent_m0_debugaccess;                  // write_data_fifo_tx_s1_agent:m0_debugaccess -> write_data_fifo_tx_s1_translator:uav_debugaccess
368 
        wire   [29:0] write_data_fifo_tx_s1_agent_m0_address;                      // write_data_fifo_tx_s1_agent:m0_address -> write_data_fifo_tx_s1_translator:uav_address
369 
        wire    [3:0] write_data_fifo_tx_s1_agent_m0_byteenable;                   // write_data_fifo_tx_s1_agent:m0_byteenable -> write_data_fifo_tx_s1_translator:uav_byteenable
370 
        wire          write_data_fifo_tx_s1_agent_m0_read;                         // write_data_fifo_tx_s1_agent:m0_read -> write_data_fifo_tx_s1_translator:uav_read
371 
        wire          write_data_fifo_tx_s1_agent_m0_readdatavalid;                // write_data_fifo_tx_s1_translator:uav_readdatavalid -> write_data_fifo_tx_s1_agent:m0_readdatavalid
372 
        wire          write_data_fifo_tx_s1_agent_m0_lock;                         // write_data_fifo_tx_s1_agent:m0_lock -> write_data_fifo_tx_s1_translator:uav_lock
373 
        wire   [31:0] write_data_fifo_tx_s1_agent_m0_writedata;                    // write_data_fifo_tx_s1_agent:m0_writedata -> write_data_fifo_tx_s1_translator:uav_writedata
374 
        wire          write_data_fifo_tx_s1_agent_m0_write;                        // write_data_fifo_tx_s1_agent:m0_write -> write_data_fifo_tx_s1_translator:uav_write
375 
        wire    [2:0] write_data_fifo_tx_s1_agent_m0_burstcount;                   // write_data_fifo_tx_s1_agent:m0_burstcount -> write_data_fifo_tx_s1_translator:uav_burstcount
376 
        wire          write_data_fifo_tx_s1_agent_rf_source_valid;                 // write_data_fifo_tx_s1_agent:rf_source_valid -> write_data_fifo_tx_s1_agent_rsp_fifo:in_valid
377 
        wire  [129:0] write_data_fifo_tx_s1_agent_rf_source_data;                  // write_data_fifo_tx_s1_agent:rf_source_data -> write_data_fifo_tx_s1_agent_rsp_fifo:in_data
378 
        wire          write_data_fifo_tx_s1_agent_rf_source_ready;                 // write_data_fifo_tx_s1_agent_rsp_fifo:in_ready -> write_data_fifo_tx_s1_agent:rf_source_ready
379 
        wire          write_data_fifo_tx_s1_agent_rf_source_startofpacket;         // write_data_fifo_tx_s1_agent:rf_source_startofpacket -> write_data_fifo_tx_s1_agent_rsp_fifo:in_startofpacket
380 
        wire          write_data_fifo_tx_s1_agent_rf_source_endofpacket;           // write_data_fifo_tx_s1_agent:rf_source_endofpacket -> write_data_fifo_tx_s1_agent_rsp_fifo:in_endofpacket
381 
        wire          write_data_fifo_tx_s1_agent_rsp_fifo_out_valid;              // write_data_fifo_tx_s1_agent_rsp_fifo:out_valid -> write_data_fifo_tx_s1_agent:rf_sink_valid
382 
        wire  [129:0] write_data_fifo_tx_s1_agent_rsp_fifo_out_data;               // write_data_fifo_tx_s1_agent_rsp_fifo:out_data -> write_data_fifo_tx_s1_agent:rf_sink_data
383 
        wire          write_data_fifo_tx_s1_agent_rsp_fifo_out_ready;              // write_data_fifo_tx_s1_agent:rf_sink_ready -> write_data_fifo_tx_s1_agent_rsp_fifo:out_ready
384 
        wire          write_data_fifo_tx_s1_agent_rsp_fifo_out_startofpacket;      // write_data_fifo_tx_s1_agent_rsp_fifo:out_startofpacket -> write_data_fifo_tx_s1_agent:rf_sink_startofpacket
385 
        wire          write_data_fifo_tx_s1_agent_rsp_fifo_out_endofpacket;        // write_data_fifo_tx_s1_agent_rsp_fifo:out_endofpacket -> write_data_fifo_tx_s1_agent:rf_sink_endofpacket
386 
        wire          write_data_fifo_tx_s1_agent_rdata_fifo_src_valid;            // write_data_fifo_tx_s1_agent:rdata_fifo_src_valid -> write_data_fifo_tx_s1_agent_rdata_fifo:in_valid
387 
        wire   [33:0] write_data_fifo_tx_s1_agent_rdata_fifo_src_data;             // write_data_fifo_tx_s1_agent:rdata_fifo_src_data -> write_data_fifo_tx_s1_agent_rdata_fifo:in_data
388 
        wire          write_data_fifo_tx_s1_agent_rdata_fifo_src_ready;            // write_data_fifo_tx_s1_agent_rdata_fifo:in_ready -> write_data_fifo_tx_s1_agent:rdata_fifo_src_ready
389 
        wire   [31:0] write_en_tx_s1_agent_m0_readdata;                            // write_en_tx_s1_translator:uav_readdata -> write_en_tx_s1_agent:m0_readdata
390 
        wire          write_en_tx_s1_agent_m0_waitrequest;                         // write_en_tx_s1_translator:uav_waitrequest -> write_en_tx_s1_agent:m0_waitrequest
391 
        wire          write_en_tx_s1_agent_m0_debugaccess;                         // write_en_tx_s1_agent:m0_debugaccess -> write_en_tx_s1_translator:uav_debugaccess
392 
        wire   [29:0] write_en_tx_s1_agent_m0_address;                             // write_en_tx_s1_agent:m0_address -> write_en_tx_s1_translator:uav_address
393 
        wire    [3:0] write_en_tx_s1_agent_m0_byteenable;                          // write_en_tx_s1_agent:m0_byteenable -> write_en_tx_s1_translator:uav_byteenable
394 
        wire          write_en_tx_s1_agent_m0_read;                                // write_en_tx_s1_agent:m0_read -> write_en_tx_s1_translator:uav_read
395 
        wire          write_en_tx_s1_agent_m0_readdatavalid;                       // write_en_tx_s1_translator:uav_readdatavalid -> write_en_tx_s1_agent:m0_readdatavalid
396 
        wire          write_en_tx_s1_agent_m0_lock;                                // write_en_tx_s1_agent:m0_lock -> write_en_tx_s1_translator:uav_lock
397 
        wire   [31:0] write_en_tx_s1_agent_m0_writedata;                           // write_en_tx_s1_agent:m0_writedata -> write_en_tx_s1_translator:uav_writedata
398 
        wire          write_en_tx_s1_agent_m0_write;                               // write_en_tx_s1_agent:m0_write -> write_en_tx_s1_translator:uav_write
399 
        wire    [2:0] write_en_tx_s1_agent_m0_burstcount;                          // write_en_tx_s1_agent:m0_burstcount -> write_en_tx_s1_translator:uav_burstcount
400 
        wire          write_en_tx_s1_agent_rf_source_valid;                        // write_en_tx_s1_agent:rf_source_valid -> write_en_tx_s1_agent_rsp_fifo:in_valid
401 
        wire  [129:0] write_en_tx_s1_agent_rf_source_data;                         // write_en_tx_s1_agent:rf_source_data -> write_en_tx_s1_agent_rsp_fifo:in_data
402 
        wire          write_en_tx_s1_agent_rf_source_ready;                        // write_en_tx_s1_agent_rsp_fifo:in_ready -> write_en_tx_s1_agent:rf_source_ready
403 
        wire          write_en_tx_s1_agent_rf_source_startofpacket;                // write_en_tx_s1_agent:rf_source_startofpacket -> write_en_tx_s1_agent_rsp_fifo:in_startofpacket
404 
        wire          write_en_tx_s1_agent_rf_source_endofpacket;                  // write_en_tx_s1_agent:rf_source_endofpacket -> write_en_tx_s1_agent_rsp_fifo:in_endofpacket
405 
        wire          write_en_tx_s1_agent_rsp_fifo_out_valid;                     // write_en_tx_s1_agent_rsp_fifo:out_valid -> write_en_tx_s1_agent:rf_sink_valid
406 
        wire  [129:0] write_en_tx_s1_agent_rsp_fifo_out_data;                      // write_en_tx_s1_agent_rsp_fifo:out_data -> write_en_tx_s1_agent:rf_sink_data
407 
        wire          write_en_tx_s1_agent_rsp_fifo_out_ready;                     // write_en_tx_s1_agent:rf_sink_ready -> write_en_tx_s1_agent_rsp_fifo:out_ready
408 
        wire          write_en_tx_s1_agent_rsp_fifo_out_startofpacket;             // write_en_tx_s1_agent_rsp_fifo:out_startofpacket -> write_en_tx_s1_agent:rf_sink_startofpacket
409 
        wire          write_en_tx_s1_agent_rsp_fifo_out_endofpacket;               // write_en_tx_s1_agent_rsp_fifo:out_endofpacket -> write_en_tx_s1_agent:rf_sink_endofpacket
410 
        wire          write_en_tx_s1_agent_rdata_fifo_src_valid;                   // write_en_tx_s1_agent:rdata_fifo_src_valid -> write_en_tx_s1_agent_rdata_fifo:in_valid
411 
        wire   [33:0] write_en_tx_s1_agent_rdata_fifo_src_data;                    // write_en_tx_s1_agent:rdata_fifo_src_data -> write_en_tx_s1_agent_rdata_fifo:in_data
412 
        wire          write_en_tx_s1_agent_rdata_fifo_src_ready;                   // write_en_tx_s1_agent_rdata_fifo:in_ready -> write_en_tx_s1_agent:rdata_fifo_src_ready
413 
        wire   [31:0] fifo_full_tx_status_s1_agent_m0_readdata;                    // fifo_full_tx_status_s1_translator:uav_readdata -> fifo_full_tx_status_s1_agent:m0_readdata
414 
        wire          fifo_full_tx_status_s1_agent_m0_waitrequest;                 // fifo_full_tx_status_s1_translator:uav_waitrequest -> fifo_full_tx_status_s1_agent:m0_waitrequest
415 
        wire          fifo_full_tx_status_s1_agent_m0_debugaccess;                 // fifo_full_tx_status_s1_agent:m0_debugaccess -> fifo_full_tx_status_s1_translator:uav_debugaccess
416 
        wire   [29:0] fifo_full_tx_status_s1_agent_m0_address;                     // fifo_full_tx_status_s1_agent:m0_address -> fifo_full_tx_status_s1_translator:uav_address
417 
        wire    [3:0] fifo_full_tx_status_s1_agent_m0_byteenable;                  // fifo_full_tx_status_s1_agent:m0_byteenable -> fifo_full_tx_status_s1_translator:uav_byteenable
418 
        wire          fifo_full_tx_status_s1_agent_m0_read;                        // fifo_full_tx_status_s1_agent:m0_read -> fifo_full_tx_status_s1_translator:uav_read
419 
        wire          fifo_full_tx_status_s1_agent_m0_readdatavalid;               // fifo_full_tx_status_s1_translator:uav_readdatavalid -> fifo_full_tx_status_s1_agent:m0_readdatavalid
420 
        wire          fifo_full_tx_status_s1_agent_m0_lock;                        // fifo_full_tx_status_s1_agent:m0_lock -> fifo_full_tx_status_s1_translator:uav_lock
421 
        wire   [31:0] fifo_full_tx_status_s1_agent_m0_writedata;                   // fifo_full_tx_status_s1_agent:m0_writedata -> fifo_full_tx_status_s1_translator:uav_writedata
422 
        wire          fifo_full_tx_status_s1_agent_m0_write;                       // fifo_full_tx_status_s1_agent:m0_write -> fifo_full_tx_status_s1_translator:uav_write
423 
        wire    [2:0] fifo_full_tx_status_s1_agent_m0_burstcount;                  // fifo_full_tx_status_s1_agent:m0_burstcount -> fifo_full_tx_status_s1_translator:uav_burstcount
424 
        wire          fifo_full_tx_status_s1_agent_rf_source_valid;                // fifo_full_tx_status_s1_agent:rf_source_valid -> fifo_full_tx_status_s1_agent_rsp_fifo:in_valid
425 
        wire  [129:0] fifo_full_tx_status_s1_agent_rf_source_data;                 // fifo_full_tx_status_s1_agent:rf_source_data -> fifo_full_tx_status_s1_agent_rsp_fifo:in_data
426 
        wire          fifo_full_tx_status_s1_agent_rf_source_ready;                // fifo_full_tx_status_s1_agent_rsp_fifo:in_ready -> fifo_full_tx_status_s1_agent:rf_source_ready
427 
        wire          fifo_full_tx_status_s1_agent_rf_source_startofpacket;        // fifo_full_tx_status_s1_agent:rf_source_startofpacket -> fifo_full_tx_status_s1_agent_rsp_fifo:in_startofpacket
428 
        wire          fifo_full_tx_status_s1_agent_rf_source_endofpacket;          // fifo_full_tx_status_s1_agent:rf_source_endofpacket -> fifo_full_tx_status_s1_agent_rsp_fifo:in_endofpacket
429 
        wire          fifo_full_tx_status_s1_agent_rsp_fifo_out_valid;             // fifo_full_tx_status_s1_agent_rsp_fifo:out_valid -> fifo_full_tx_status_s1_agent:rf_sink_valid
430 
        wire  [129:0] fifo_full_tx_status_s1_agent_rsp_fifo_out_data;              // fifo_full_tx_status_s1_agent_rsp_fifo:out_data -> fifo_full_tx_status_s1_agent:rf_sink_data
431 
        wire          fifo_full_tx_status_s1_agent_rsp_fifo_out_ready;             // fifo_full_tx_status_s1_agent:rf_sink_ready -> fifo_full_tx_status_s1_agent_rsp_fifo:out_ready
432 
        wire          fifo_full_tx_status_s1_agent_rsp_fifo_out_startofpacket;     // fifo_full_tx_status_s1_agent_rsp_fifo:out_startofpacket -> fifo_full_tx_status_s1_agent:rf_sink_startofpacket
433 
        wire          fifo_full_tx_status_s1_agent_rsp_fifo_out_endofpacket;       // fifo_full_tx_status_s1_agent_rsp_fifo:out_endofpacket -> fifo_full_tx_status_s1_agent:rf_sink_endofpacket
434 
        wire          fifo_full_tx_status_s1_agent_rdata_fifo_src_valid;           // fifo_full_tx_status_s1_agent:rdata_fifo_src_valid -> fifo_full_tx_status_s1_agent_rdata_fifo:in_valid
435 
        wire   [33:0] fifo_full_tx_status_s1_agent_rdata_fifo_src_data;            // fifo_full_tx_status_s1_agent:rdata_fifo_src_data -> fifo_full_tx_status_s1_agent_rdata_fifo:in_data
436 
        wire          fifo_full_tx_status_s1_agent_rdata_fifo_src_ready;           // fifo_full_tx_status_s1_agent_rdata_fifo:in_ready -> fifo_full_tx_status_s1_agent:rdata_fifo_src_ready
437 
        wire   [31:0] fifo_empty_tx_status_s1_agent_m0_readdata;                   // fifo_empty_tx_status_s1_translator:uav_readdata -> fifo_empty_tx_status_s1_agent:m0_readdata
438 
        wire          fifo_empty_tx_status_s1_agent_m0_waitrequest;                // fifo_empty_tx_status_s1_translator:uav_waitrequest -> fifo_empty_tx_status_s1_agent:m0_waitrequest
439 
        wire          fifo_empty_tx_status_s1_agent_m0_debugaccess;                // fifo_empty_tx_status_s1_agent:m0_debugaccess -> fifo_empty_tx_status_s1_translator:uav_debugaccess
440 
        wire   [29:0] fifo_empty_tx_status_s1_agent_m0_address;                    // fifo_empty_tx_status_s1_agent:m0_address -> fifo_empty_tx_status_s1_translator:uav_address
441 
        wire    [3:0] fifo_empty_tx_status_s1_agent_m0_byteenable;                 // fifo_empty_tx_status_s1_agent:m0_byteenable -> fifo_empty_tx_status_s1_translator:uav_byteenable
442 
        wire          fifo_empty_tx_status_s1_agent_m0_read;                       // fifo_empty_tx_status_s1_agent:m0_read -> fifo_empty_tx_status_s1_translator:uav_read
443 
        wire          fifo_empty_tx_status_s1_agent_m0_readdatavalid;              // fifo_empty_tx_status_s1_translator:uav_readdatavalid -> fifo_empty_tx_status_s1_agent:m0_readdatavalid
444 
        wire          fifo_empty_tx_status_s1_agent_m0_lock;                       // fifo_empty_tx_status_s1_agent:m0_lock -> fifo_empty_tx_status_s1_translator:uav_lock
445 
        wire   [31:0] fifo_empty_tx_status_s1_agent_m0_writedata;                  // fifo_empty_tx_status_s1_agent:m0_writedata -> fifo_empty_tx_status_s1_translator:uav_writedata
446 
        wire          fifo_empty_tx_status_s1_agent_m0_write;                      // fifo_empty_tx_status_s1_agent:m0_write -> fifo_empty_tx_status_s1_translator:uav_write
447 
        wire    [2:0] fifo_empty_tx_status_s1_agent_m0_burstcount;                 // fifo_empty_tx_status_s1_agent:m0_burstcount -> fifo_empty_tx_status_s1_translator:uav_burstcount
448 
        wire          fifo_empty_tx_status_s1_agent_rf_source_valid;               // fifo_empty_tx_status_s1_agent:rf_source_valid -> fifo_empty_tx_status_s1_agent_rsp_fifo:in_valid
449 
        wire  [129:0] fifo_empty_tx_status_s1_agent_rf_source_data;                // fifo_empty_tx_status_s1_agent:rf_source_data -> fifo_empty_tx_status_s1_agent_rsp_fifo:in_data
450 
        wire          fifo_empty_tx_status_s1_agent_rf_source_ready;               // fifo_empty_tx_status_s1_agent_rsp_fifo:in_ready -> fifo_empty_tx_status_s1_agent:rf_source_ready
451 
        wire          fifo_empty_tx_status_s1_agent_rf_source_startofpacket;       // fifo_empty_tx_status_s1_agent:rf_source_startofpacket -> fifo_empty_tx_status_s1_agent_rsp_fifo:in_startofpacket
452 
        wire          fifo_empty_tx_status_s1_agent_rf_source_endofpacket;         // fifo_empty_tx_status_s1_agent:rf_source_endofpacket -> fifo_empty_tx_status_s1_agent_rsp_fifo:in_endofpacket
453 
        wire          fifo_empty_tx_status_s1_agent_rsp_fifo_out_valid;            // fifo_empty_tx_status_s1_agent_rsp_fifo:out_valid -> fifo_empty_tx_status_s1_agent:rf_sink_valid
454 
        wire  [129:0] fifo_empty_tx_status_s1_agent_rsp_fifo_out_data;             // fifo_empty_tx_status_s1_agent_rsp_fifo:out_data -> fifo_empty_tx_status_s1_agent:rf_sink_data
455 
        wire          fifo_empty_tx_status_s1_agent_rsp_fifo_out_ready;            // fifo_empty_tx_status_s1_agent:rf_sink_ready -> fifo_empty_tx_status_s1_agent_rsp_fifo:out_ready
456 
        wire          fifo_empty_tx_status_s1_agent_rsp_fifo_out_startofpacket;    // fifo_empty_tx_status_s1_agent_rsp_fifo:out_startofpacket -> fifo_empty_tx_status_s1_agent:rf_sink_startofpacket
457 
        wire          fifo_empty_tx_status_s1_agent_rsp_fifo_out_endofpacket;      // fifo_empty_tx_status_s1_agent_rsp_fifo:out_endofpacket -> fifo_empty_tx_status_s1_agent:rf_sink_endofpacket
458 
        wire          fifo_empty_tx_status_s1_agent_rdata_fifo_src_valid;          // fifo_empty_tx_status_s1_agent:rdata_fifo_src_valid -> fifo_empty_tx_status_s1_agent_rdata_fifo:in_valid
459 
        wire   [33:0] fifo_empty_tx_status_s1_agent_rdata_fifo_src_data;           // fifo_empty_tx_status_s1_agent:rdata_fifo_src_data -> fifo_empty_tx_status_s1_agent_rdata_fifo:in_data
460 
        wire          fifo_empty_tx_status_s1_agent_rdata_fifo_src_ready;          // fifo_empty_tx_status_s1_agent_rdata_fifo:in_ready -> fifo_empty_tx_status_s1_agent:rdata_fifo_src_ready
461 
        wire   [31:0] timecode_tx_data_s1_agent_m0_readdata;                       // timecode_tx_data_s1_translator:uav_readdata -> timecode_tx_data_s1_agent:m0_readdata
462 
        wire          timecode_tx_data_s1_agent_m0_waitrequest;                    // timecode_tx_data_s1_translator:uav_waitrequest -> timecode_tx_data_s1_agent:m0_waitrequest
463 
        wire          timecode_tx_data_s1_agent_m0_debugaccess;                    // timecode_tx_data_s1_agent:m0_debugaccess -> timecode_tx_data_s1_translator:uav_debugaccess
464 
        wire   [29:0] timecode_tx_data_s1_agent_m0_address;                        // timecode_tx_data_s1_agent:m0_address -> timecode_tx_data_s1_translator:uav_address
465 
        wire    [3:0] timecode_tx_data_s1_agent_m0_byteenable;                     // timecode_tx_data_s1_agent:m0_byteenable -> timecode_tx_data_s1_translator:uav_byteenable
466 
        wire          timecode_tx_data_s1_agent_m0_read;                           // timecode_tx_data_s1_agent:m0_read -> timecode_tx_data_s1_translator:uav_read
467 
        wire          timecode_tx_data_s1_agent_m0_readdatavalid;                  // timecode_tx_data_s1_translator:uav_readdatavalid -> timecode_tx_data_s1_agent:m0_readdatavalid
468 
        wire          timecode_tx_data_s1_agent_m0_lock;                           // timecode_tx_data_s1_agent:m0_lock -> timecode_tx_data_s1_translator:uav_lock
469 
        wire   [31:0] timecode_tx_data_s1_agent_m0_writedata;                      // timecode_tx_data_s1_agent:m0_writedata -> timecode_tx_data_s1_translator:uav_writedata
470 
        wire          timecode_tx_data_s1_agent_m0_write;                          // timecode_tx_data_s1_agent:m0_write -> timecode_tx_data_s1_translator:uav_write
471 
        wire    [2:0] timecode_tx_data_s1_agent_m0_burstcount;                     // timecode_tx_data_s1_agent:m0_burstcount -> timecode_tx_data_s1_translator:uav_burstcount
472 
        wire          timecode_tx_data_s1_agent_rf_source_valid;                   // timecode_tx_data_s1_agent:rf_source_valid -> timecode_tx_data_s1_agent_rsp_fifo:in_valid
473 
        wire  [129:0] timecode_tx_data_s1_agent_rf_source_data;                    // timecode_tx_data_s1_agent:rf_source_data -> timecode_tx_data_s1_agent_rsp_fifo:in_data
474 
        wire          timecode_tx_data_s1_agent_rf_source_ready;                   // timecode_tx_data_s1_agent_rsp_fifo:in_ready -> timecode_tx_data_s1_agent:rf_source_ready
475 
        wire          timecode_tx_data_s1_agent_rf_source_startofpacket;           // timecode_tx_data_s1_agent:rf_source_startofpacket -> timecode_tx_data_s1_agent_rsp_fifo:in_startofpacket
476 
        wire          timecode_tx_data_s1_agent_rf_source_endofpacket;             // timecode_tx_data_s1_agent:rf_source_endofpacket -> timecode_tx_data_s1_agent_rsp_fifo:in_endofpacket
477 
        wire          timecode_tx_data_s1_agent_rsp_fifo_out_valid;                // timecode_tx_data_s1_agent_rsp_fifo:out_valid -> timecode_tx_data_s1_agent:rf_sink_valid
478 
        wire  [129:0] timecode_tx_data_s1_agent_rsp_fifo_out_data;                 // timecode_tx_data_s1_agent_rsp_fifo:out_data -> timecode_tx_data_s1_agent:rf_sink_data
479 
        wire          timecode_tx_data_s1_agent_rsp_fifo_out_ready;                // timecode_tx_data_s1_agent:rf_sink_ready -> timecode_tx_data_s1_agent_rsp_fifo:out_ready
480 
        wire          timecode_tx_data_s1_agent_rsp_fifo_out_startofpacket;        // timecode_tx_data_s1_agent_rsp_fifo:out_startofpacket -> timecode_tx_data_s1_agent:rf_sink_startofpacket
481 
        wire          timecode_tx_data_s1_agent_rsp_fifo_out_endofpacket;          // timecode_tx_data_s1_agent_rsp_fifo:out_endofpacket -> timecode_tx_data_s1_agent:rf_sink_endofpacket
482 
        wire          timecode_tx_data_s1_agent_rdata_fifo_src_valid;              // timecode_tx_data_s1_agent:rdata_fifo_src_valid -> timecode_tx_data_s1_agent_rdata_fifo:in_valid
483 
        wire   [33:0] timecode_tx_data_s1_agent_rdata_fifo_src_data;               // timecode_tx_data_s1_agent:rdata_fifo_src_data -> timecode_tx_data_s1_agent_rdata_fifo:in_data
484 
        wire          timecode_tx_data_s1_agent_rdata_fifo_src_ready;              // timecode_tx_data_s1_agent_rdata_fifo:in_ready -> timecode_tx_data_s1_agent:rdata_fifo_src_ready
485 
        wire   [31:0] timecode_tx_enable_s1_agent_m0_readdata;                     // timecode_tx_enable_s1_translator:uav_readdata -> timecode_tx_enable_s1_agent:m0_readdata
486 
        wire          timecode_tx_enable_s1_agent_m0_waitrequest;                  // timecode_tx_enable_s1_translator:uav_waitrequest -> timecode_tx_enable_s1_agent:m0_waitrequest
487 
        wire          timecode_tx_enable_s1_agent_m0_debugaccess;                  // timecode_tx_enable_s1_agent:m0_debugaccess -> timecode_tx_enable_s1_translator:uav_debugaccess
488 
        wire   [29:0] timecode_tx_enable_s1_agent_m0_address;                      // timecode_tx_enable_s1_agent:m0_address -> timecode_tx_enable_s1_translator:uav_address
489 
        wire    [3:0] timecode_tx_enable_s1_agent_m0_byteenable;                   // timecode_tx_enable_s1_agent:m0_byteenable -> timecode_tx_enable_s1_translator:uav_byteenable
490 
        wire          timecode_tx_enable_s1_agent_m0_read;                         // timecode_tx_enable_s1_agent:m0_read -> timecode_tx_enable_s1_translator:uav_read
491 
        wire          timecode_tx_enable_s1_agent_m0_readdatavalid;                // timecode_tx_enable_s1_translator:uav_readdatavalid -> timecode_tx_enable_s1_agent:m0_readdatavalid
492 
        wire          timecode_tx_enable_s1_agent_m0_lock;                         // timecode_tx_enable_s1_agent:m0_lock -> timecode_tx_enable_s1_translator:uav_lock
493 
        wire   [31:0] timecode_tx_enable_s1_agent_m0_writedata;                    // timecode_tx_enable_s1_agent:m0_writedata -> timecode_tx_enable_s1_translator:uav_writedata
494 
        wire          timecode_tx_enable_s1_agent_m0_write;                        // timecode_tx_enable_s1_agent:m0_write -> timecode_tx_enable_s1_translator:uav_write
495 
        wire    [2:0] timecode_tx_enable_s1_agent_m0_burstcount;                   // timecode_tx_enable_s1_agent:m0_burstcount -> timecode_tx_enable_s1_translator:uav_burstcount
496 
        wire          timecode_tx_enable_s1_agent_rf_source_valid;                 // timecode_tx_enable_s1_agent:rf_source_valid -> timecode_tx_enable_s1_agent_rsp_fifo:in_valid
497 
        wire  [129:0] timecode_tx_enable_s1_agent_rf_source_data;                  // timecode_tx_enable_s1_agent:rf_source_data -> timecode_tx_enable_s1_agent_rsp_fifo:in_data
498 
        wire          timecode_tx_enable_s1_agent_rf_source_ready;                 // timecode_tx_enable_s1_agent_rsp_fifo:in_ready -> timecode_tx_enable_s1_agent:rf_source_ready
499 
        wire          timecode_tx_enable_s1_agent_rf_source_startofpacket;         // timecode_tx_enable_s1_agent:rf_source_startofpacket -> timecode_tx_enable_s1_agent_rsp_fifo:in_startofpacket
500 
        wire          timecode_tx_enable_s1_agent_rf_source_endofpacket;           // timecode_tx_enable_s1_agent:rf_source_endofpacket -> timecode_tx_enable_s1_agent_rsp_fifo:in_endofpacket
501 
        wire          timecode_tx_enable_s1_agent_rsp_fifo_out_valid;              // timecode_tx_enable_s1_agent_rsp_fifo:out_valid -> timecode_tx_enable_s1_agent:rf_sink_valid
502 
        wire  [129:0] timecode_tx_enable_s1_agent_rsp_fifo_out_data;               // timecode_tx_enable_s1_agent_rsp_fifo:out_data -> timecode_tx_enable_s1_agent:rf_sink_data
503 
        wire          timecode_tx_enable_s1_agent_rsp_fifo_out_ready;              // timecode_tx_enable_s1_agent:rf_sink_ready -> timecode_tx_enable_s1_agent_rsp_fifo:out_ready
504 
        wire          timecode_tx_enable_s1_agent_rsp_fifo_out_startofpacket;      // timecode_tx_enable_s1_agent_rsp_fifo:out_startofpacket -> timecode_tx_enable_s1_agent:rf_sink_startofpacket
505 
        wire          timecode_tx_enable_s1_agent_rsp_fifo_out_endofpacket;        // timecode_tx_enable_s1_agent_rsp_fifo:out_endofpacket -> timecode_tx_enable_s1_agent:rf_sink_endofpacket
506 
        wire          timecode_tx_enable_s1_agent_rdata_fifo_src_valid;            // timecode_tx_enable_s1_agent:rdata_fifo_src_valid -> timecode_tx_enable_s1_agent_rdata_fifo:in_valid
507 
        wire   [33:0] timecode_tx_enable_s1_agent_rdata_fifo_src_data;             // timecode_tx_enable_s1_agent:rdata_fifo_src_data -> timecode_tx_enable_s1_agent_rdata_fifo:in_data
508 
        wire          timecode_tx_enable_s1_agent_rdata_fifo_src_ready;            // timecode_tx_enable_s1_agent_rdata_fifo:in_ready -> timecode_tx_enable_s1_agent:rdata_fifo_src_ready
509 
        wire   [31:0] timecode_tx_ready_s1_agent_m0_readdata;                      // timecode_tx_ready_s1_translator:uav_readdata -> timecode_tx_ready_s1_agent:m0_readdata
510 
        wire          timecode_tx_ready_s1_agent_m0_waitrequest;                   // timecode_tx_ready_s1_translator:uav_waitrequest -> timecode_tx_ready_s1_agent:m0_waitrequest
511 
        wire          timecode_tx_ready_s1_agent_m0_debugaccess;                   // timecode_tx_ready_s1_agent:m0_debugaccess -> timecode_tx_ready_s1_translator:uav_debugaccess
512 
        wire   [29:0] timecode_tx_ready_s1_agent_m0_address;                       // timecode_tx_ready_s1_agent:m0_address -> timecode_tx_ready_s1_translator:uav_address
513 
        wire    [3:0] timecode_tx_ready_s1_agent_m0_byteenable;                    // timecode_tx_ready_s1_agent:m0_byteenable -> timecode_tx_ready_s1_translator:uav_byteenable
514 
        wire          timecode_tx_ready_s1_agent_m0_read;                          // timecode_tx_ready_s1_agent:m0_read -> timecode_tx_ready_s1_translator:uav_read
515 
        wire          timecode_tx_ready_s1_agent_m0_readdatavalid;                 // timecode_tx_ready_s1_translator:uav_readdatavalid -> timecode_tx_ready_s1_agent:m0_readdatavalid
516 
        wire          timecode_tx_ready_s1_agent_m0_lock;                          // timecode_tx_ready_s1_agent:m0_lock -> timecode_tx_ready_s1_translator:uav_lock
517 
        wire   [31:0] timecode_tx_ready_s1_agent_m0_writedata;                     // timecode_tx_ready_s1_agent:m0_writedata -> timecode_tx_ready_s1_translator:uav_writedata
518 
        wire          timecode_tx_ready_s1_agent_m0_write;                         // timecode_tx_ready_s1_agent:m0_write -> timecode_tx_ready_s1_translator:uav_write
519 
        wire    [2:0] timecode_tx_ready_s1_agent_m0_burstcount;                    // timecode_tx_ready_s1_agent:m0_burstcount -> timecode_tx_ready_s1_translator:uav_burstcount
520 
        wire          timecode_tx_ready_s1_agent_rf_source_valid;                  // timecode_tx_ready_s1_agent:rf_source_valid -> timecode_tx_ready_s1_agent_rsp_fifo:in_valid
521 
        wire  [129:0] timecode_tx_ready_s1_agent_rf_source_data;                   // timecode_tx_ready_s1_agent:rf_source_data -> timecode_tx_ready_s1_agent_rsp_fifo:in_data
522 
        wire          timecode_tx_ready_s1_agent_rf_source_ready;                  // timecode_tx_ready_s1_agent_rsp_fifo:in_ready -> timecode_tx_ready_s1_agent:rf_source_ready
523 
        wire          timecode_tx_ready_s1_agent_rf_source_startofpacket;          // timecode_tx_ready_s1_agent:rf_source_startofpacket -> timecode_tx_ready_s1_agent_rsp_fifo:in_startofpacket
524 
        wire          timecode_tx_ready_s1_agent_rf_source_endofpacket;            // timecode_tx_ready_s1_agent:rf_source_endofpacket -> timecode_tx_ready_s1_agent_rsp_fifo:in_endofpacket
525 
        wire          timecode_tx_ready_s1_agent_rsp_fifo_out_valid;               // timecode_tx_ready_s1_agent_rsp_fifo:out_valid -> timecode_tx_ready_s1_agent:rf_sink_valid
526 
        wire  [129:0] timecode_tx_ready_s1_agent_rsp_fifo_out_data;                // timecode_tx_ready_s1_agent_rsp_fifo:out_data -> timecode_tx_ready_s1_agent:rf_sink_data
527 
        wire          timecode_tx_ready_s1_agent_rsp_fifo_out_ready;               // timecode_tx_ready_s1_agent:rf_sink_ready -> timecode_tx_ready_s1_agent_rsp_fifo:out_ready
528 
        wire          timecode_tx_ready_s1_agent_rsp_fifo_out_startofpacket;       // timecode_tx_ready_s1_agent_rsp_fifo:out_startofpacket -> timecode_tx_ready_s1_agent:rf_sink_startofpacket
529 
        wire          timecode_tx_ready_s1_agent_rsp_fifo_out_endofpacket;         // timecode_tx_ready_s1_agent_rsp_fifo:out_endofpacket -> timecode_tx_ready_s1_agent:rf_sink_endofpacket
530 
        wire          timecode_tx_ready_s1_agent_rdata_fifo_src_valid;             // timecode_tx_ready_s1_agent:rdata_fifo_src_valid -> timecode_tx_ready_s1_agent_rdata_fifo:in_valid
531 
        wire   [33:0] timecode_tx_ready_s1_agent_rdata_fifo_src_data;              // timecode_tx_ready_s1_agent:rdata_fifo_src_data -> timecode_tx_ready_s1_agent_rdata_fifo:in_data
532 
        wire          timecode_tx_ready_s1_agent_rdata_fifo_src_ready;             // timecode_tx_ready_s1_agent_rdata_fifo:in_ready -> timecode_tx_ready_s1_agent:rdata_fifo_src_ready
533 
        wire   [31:0] data_info_s1_agent_m0_readdata;                              // data_info_s1_translator:uav_readdata -> data_info_s1_agent:m0_readdata
534 
        wire          data_info_s1_agent_m0_waitrequest;                           // data_info_s1_translator:uav_waitrequest -> data_info_s1_agent:m0_waitrequest
535 
        wire          data_info_s1_agent_m0_debugaccess;                           // data_info_s1_agent:m0_debugaccess -> data_info_s1_translator:uav_debugaccess
536 
        wire   [29:0] data_info_s1_agent_m0_address;                               // data_info_s1_agent:m0_address -> data_info_s1_translator:uav_address
537 
        wire    [3:0] data_info_s1_agent_m0_byteenable;                            // data_info_s1_agent:m0_byteenable -> data_info_s1_translator:uav_byteenable
538 
        wire          data_info_s1_agent_m0_read;                                  // data_info_s1_agent:m0_read -> data_info_s1_translator:uav_read
539 
        wire          data_info_s1_agent_m0_readdatavalid;                         // data_info_s1_translator:uav_readdatavalid -> data_info_s1_agent:m0_readdatavalid
540 
        wire          data_info_s1_agent_m0_lock;                                  // data_info_s1_agent:m0_lock -> data_info_s1_translator:uav_lock
541 
        wire   [31:0] data_info_s1_agent_m0_writedata;                             // data_info_s1_agent:m0_writedata -> data_info_s1_translator:uav_writedata
542 
        wire          data_info_s1_agent_m0_write;                                 // data_info_s1_agent:m0_write -> data_info_s1_translator:uav_write
543 
        wire    [2:0] data_info_s1_agent_m0_burstcount;                            // data_info_s1_agent:m0_burstcount -> data_info_s1_translator:uav_burstcount
544 
        wire          data_info_s1_agent_rf_source_valid;                          // data_info_s1_agent:rf_source_valid -> data_info_s1_agent_rsp_fifo:in_valid
545 
        wire  [129:0] data_info_s1_agent_rf_source_data;                           // data_info_s1_agent:rf_source_data -> data_info_s1_agent_rsp_fifo:in_data
546 
        wire          data_info_s1_agent_rf_source_ready;                          // data_info_s1_agent_rsp_fifo:in_ready -> data_info_s1_agent:rf_source_ready
547 
        wire          data_info_s1_agent_rf_source_startofpacket;                  // data_info_s1_agent:rf_source_startofpacket -> data_info_s1_agent_rsp_fifo:in_startofpacket
548 
        wire          data_info_s1_agent_rf_source_endofpacket;                    // data_info_s1_agent:rf_source_endofpacket -> data_info_s1_agent_rsp_fifo:in_endofpacket
549 
        wire          data_info_s1_agent_rsp_fifo_out_valid;                       // data_info_s1_agent_rsp_fifo:out_valid -> data_info_s1_agent:rf_sink_valid
550 
        wire  [129:0] data_info_s1_agent_rsp_fifo_out_data;                        // data_info_s1_agent_rsp_fifo:out_data -> data_info_s1_agent:rf_sink_data
551 
        wire          data_info_s1_agent_rsp_fifo_out_ready;                       // data_info_s1_agent:rf_sink_ready -> data_info_s1_agent_rsp_fifo:out_ready
552 
        wire          data_info_s1_agent_rsp_fifo_out_startofpacket;               // data_info_s1_agent_rsp_fifo:out_startofpacket -> data_info_s1_agent:rf_sink_startofpacket
553 
        wire          data_info_s1_agent_rsp_fifo_out_endofpacket;                 // data_info_s1_agent_rsp_fifo:out_endofpacket -> data_info_s1_agent:rf_sink_endofpacket
554 
        wire          data_info_s1_agent_rdata_fifo_src_valid;                     // data_info_s1_agent:rdata_fifo_src_valid -> data_info_s1_agent_rdata_fifo:in_valid
555 
        wire   [33:0] data_info_s1_agent_rdata_fifo_src_data;                      // data_info_s1_agent:rdata_fifo_src_data -> data_info_s1_agent_rdata_fifo:in_data
556 
        wire          data_info_s1_agent_rdata_fifo_src_ready;                     // data_info_s1_agent_rdata_fifo:in_ready -> data_info_s1_agent:rdata_fifo_src_ready
557 
        wire   [31:0] clock_sel_s1_agent_m0_readdata;                              // clock_sel_s1_translator:uav_readdata -> clock_sel_s1_agent:m0_readdata
558 
        wire          clock_sel_s1_agent_m0_waitrequest;                           // clock_sel_s1_translator:uav_waitrequest -> clock_sel_s1_agent:m0_waitrequest
559 
        wire          clock_sel_s1_agent_m0_debugaccess;                           // clock_sel_s1_agent:m0_debugaccess -> clock_sel_s1_translator:uav_debugaccess
560 
        wire   [29:0] clock_sel_s1_agent_m0_address;                               // clock_sel_s1_agent:m0_address -> clock_sel_s1_translator:uav_address
561 
        wire    [3:0] clock_sel_s1_agent_m0_byteenable;                            // clock_sel_s1_agent:m0_byteenable -> clock_sel_s1_translator:uav_byteenable
562 
        wire          clock_sel_s1_agent_m0_read;                                  // clock_sel_s1_agent:m0_read -> clock_sel_s1_translator:uav_read
563 
        wire          clock_sel_s1_agent_m0_readdatavalid;                         // clock_sel_s1_translator:uav_readdatavalid -> clock_sel_s1_agent:m0_readdatavalid
564 
        wire          clock_sel_s1_agent_m0_lock;                                  // clock_sel_s1_agent:m0_lock -> clock_sel_s1_translator:uav_lock
565 
        wire   [31:0] clock_sel_s1_agent_m0_writedata;                             // clock_sel_s1_agent:m0_writedata -> clock_sel_s1_translator:uav_writedata
566 
        wire          clock_sel_s1_agent_m0_write;                                 // clock_sel_s1_agent:m0_write -> clock_sel_s1_translator:uav_write
567 
        wire    [2:0] clock_sel_s1_agent_m0_burstcount;                            // clock_sel_s1_agent:m0_burstcount -> clock_sel_s1_translator:uav_burstcount
568 
        wire          clock_sel_s1_agent_rf_source_valid;                          // clock_sel_s1_agent:rf_source_valid -> clock_sel_s1_agent_rsp_fifo:in_valid
569 
        wire  [129:0] clock_sel_s1_agent_rf_source_data;                           // clock_sel_s1_agent:rf_source_data -> clock_sel_s1_agent_rsp_fifo:in_data
570 
        wire          clock_sel_s1_agent_rf_source_ready;                          // clock_sel_s1_agent_rsp_fifo:in_ready -> clock_sel_s1_agent:rf_source_ready
571 
        wire          clock_sel_s1_agent_rf_source_startofpacket;                  // clock_sel_s1_agent:rf_source_startofpacket -> clock_sel_s1_agent_rsp_fifo:in_startofpacket
572 
        wire          clock_sel_s1_agent_rf_source_endofpacket;                    // clock_sel_s1_agent:rf_source_endofpacket -> clock_sel_s1_agent_rsp_fifo:in_endofpacket
573 
        wire          clock_sel_s1_agent_rsp_fifo_out_valid;                       // clock_sel_s1_agent_rsp_fifo:out_valid -> clock_sel_s1_agent:rf_sink_valid
574 
        wire  [129:0] clock_sel_s1_agent_rsp_fifo_out_data;                        // clock_sel_s1_agent_rsp_fifo:out_data -> clock_sel_s1_agent:rf_sink_data
575 
        wire          clock_sel_s1_agent_rsp_fifo_out_ready;                       // clock_sel_s1_agent:rf_sink_ready -> clock_sel_s1_agent_rsp_fifo:out_ready
576 
        wire          clock_sel_s1_agent_rsp_fifo_out_startofpacket;               // clock_sel_s1_agent_rsp_fifo:out_startofpacket -> clock_sel_s1_agent:rf_sink_startofpacket
577 
        wire          clock_sel_s1_agent_rsp_fifo_out_endofpacket;                 // clock_sel_s1_agent_rsp_fifo:out_endofpacket -> clock_sel_s1_agent:rf_sink_endofpacket
578 
        wire          clock_sel_s1_agent_rdata_fifo_src_valid;                     // clock_sel_s1_agent:rdata_fifo_src_valid -> clock_sel_s1_agent_rdata_fifo:in_valid
579 
        wire   [33:0] clock_sel_s1_agent_rdata_fifo_src_data;                      // clock_sel_s1_agent:rdata_fifo_src_data -> clock_sel_s1_agent_rdata_fifo:in_data
580 
        wire          clock_sel_s1_agent_rdata_fifo_src_ready;                     // clock_sel_s1_agent_rdata_fifo:in_ready -> clock_sel_s1_agent:rdata_fifo_src_ready
581 
        wire   [31:0] fsm_info_s1_agent_m0_readdata;                               // fsm_info_s1_translator:uav_readdata -> fsm_info_s1_agent:m0_readdata
582 
        wire          fsm_info_s1_agent_m0_waitrequest;                            // fsm_info_s1_translator:uav_waitrequest -> fsm_info_s1_agent:m0_waitrequest
583 
        wire          fsm_info_s1_agent_m0_debugaccess;                            // fsm_info_s1_agent:m0_debugaccess -> fsm_info_s1_translator:uav_debugaccess
584 
        wire   [29:0] fsm_info_s1_agent_m0_address;                                // fsm_info_s1_agent:m0_address -> fsm_info_s1_translator:uav_address
585 
        wire    [3:0] fsm_info_s1_agent_m0_byteenable;                             // fsm_info_s1_agent:m0_byteenable -> fsm_info_s1_translator:uav_byteenable
586 
        wire          fsm_info_s1_agent_m0_read;                                   // fsm_info_s1_agent:m0_read -> fsm_info_s1_translator:uav_read
587 
        wire          fsm_info_s1_agent_m0_readdatavalid;                          // fsm_info_s1_translator:uav_readdatavalid -> fsm_info_s1_agent:m0_readdatavalid
588 
        wire          fsm_info_s1_agent_m0_lock;                                   // fsm_info_s1_agent:m0_lock -> fsm_info_s1_translator:uav_lock
589 
        wire   [31:0] fsm_info_s1_agent_m0_writedata;                              // fsm_info_s1_agent:m0_writedata -> fsm_info_s1_translator:uav_writedata
590 
        wire          fsm_info_s1_agent_m0_write;                                  // fsm_info_s1_agent:m0_write -> fsm_info_s1_translator:uav_write
591 
        wire    [2:0] fsm_info_s1_agent_m0_burstcount;                             // fsm_info_s1_agent:m0_burstcount -> fsm_info_s1_translator:uav_burstcount
592 
        wire          fsm_info_s1_agent_rf_source_valid;                           // fsm_info_s1_agent:rf_source_valid -> fsm_info_s1_agent_rsp_fifo:in_valid
593 
        wire  [129:0] fsm_info_s1_agent_rf_source_data;                            // fsm_info_s1_agent:rf_source_data -> fsm_info_s1_agent_rsp_fifo:in_data
594 
        wire          fsm_info_s1_agent_rf_source_ready;                           // fsm_info_s1_agent_rsp_fifo:in_ready -> fsm_info_s1_agent:rf_source_ready
595 
        wire          fsm_info_s1_agent_rf_source_startofpacket;                   // fsm_info_s1_agent:rf_source_startofpacket -> fsm_info_s1_agent_rsp_fifo:in_startofpacket
596 
        wire          fsm_info_s1_agent_rf_source_endofpacket;                     // fsm_info_s1_agent:rf_source_endofpacket -> fsm_info_s1_agent_rsp_fifo:in_endofpacket
597 
        wire          fsm_info_s1_agent_rsp_fifo_out_valid;                        // fsm_info_s1_agent_rsp_fifo:out_valid -> fsm_info_s1_agent:rf_sink_valid
598 
        wire  [129:0] fsm_info_s1_agent_rsp_fifo_out_data;                         // fsm_info_s1_agent_rsp_fifo:out_data -> fsm_info_s1_agent:rf_sink_data
599 
        wire          fsm_info_s1_agent_rsp_fifo_out_ready;                        // fsm_info_s1_agent:rf_sink_ready -> fsm_info_s1_agent_rsp_fifo:out_ready
600 
        wire          fsm_info_s1_agent_rsp_fifo_out_startofpacket;                // fsm_info_s1_agent_rsp_fifo:out_startofpacket -> fsm_info_s1_agent:rf_sink_startofpacket
601 
        wire          fsm_info_s1_agent_rsp_fifo_out_endofpacket;                  // fsm_info_s1_agent_rsp_fifo:out_endofpacket -> fsm_info_s1_agent:rf_sink_endofpacket
602 
        wire          fsm_info_s1_agent_rdata_fifo_src_valid;                      // fsm_info_s1_agent:rdata_fifo_src_valid -> fsm_info_s1_agent_rdata_fifo:in_valid
603 
        wire   [33:0] fsm_info_s1_agent_rdata_fifo_src_data;                       // fsm_info_s1_agent:rdata_fifo_src_data -> fsm_info_s1_agent_rdata_fifo:in_data
604 
        wire          fsm_info_s1_agent_rdata_fifo_src_ready;                      // fsm_info_s1_agent_rdata_fifo:in_ready -> fsm_info_s1_agent:rdata_fifo_src_ready
605 
        wire   [31:0] counter_tx_fifo_s1_agent_m0_readdata;                        // counter_tx_fifo_s1_translator:uav_readdata -> counter_tx_fifo_s1_agent:m0_readdata
606 
        wire          counter_tx_fifo_s1_agent_m0_waitrequest;                     // counter_tx_fifo_s1_translator:uav_waitrequest -> counter_tx_fifo_s1_agent:m0_waitrequest
607 
        wire          counter_tx_fifo_s1_agent_m0_debugaccess;                     // counter_tx_fifo_s1_agent:m0_debugaccess -> counter_tx_fifo_s1_translator:uav_debugaccess
608 
        wire   [29:0] counter_tx_fifo_s1_agent_m0_address;                         // counter_tx_fifo_s1_agent:m0_address -> counter_tx_fifo_s1_translator:uav_address
609 
        wire    [3:0] counter_tx_fifo_s1_agent_m0_byteenable;                      // counter_tx_fifo_s1_agent:m0_byteenable -> counter_tx_fifo_s1_translator:uav_byteenable
610 
        wire          counter_tx_fifo_s1_agent_m0_read;                            // counter_tx_fifo_s1_agent:m0_read -> counter_tx_fifo_s1_translator:uav_read
611 
        wire          counter_tx_fifo_s1_agent_m0_readdatavalid;                   // counter_tx_fifo_s1_translator:uav_readdatavalid -> counter_tx_fifo_s1_agent:m0_readdatavalid
612 
        wire          counter_tx_fifo_s1_agent_m0_lock;                            // counter_tx_fifo_s1_agent:m0_lock -> counter_tx_fifo_s1_translator:uav_lock
613 
        wire   [31:0] counter_tx_fifo_s1_agent_m0_writedata;                       // counter_tx_fifo_s1_agent:m0_writedata -> counter_tx_fifo_s1_translator:uav_writedata
614 
        wire          counter_tx_fifo_s1_agent_m0_write;                           // counter_tx_fifo_s1_agent:m0_write -> counter_tx_fifo_s1_translator:uav_write
615 
        wire    [2:0] counter_tx_fifo_s1_agent_m0_burstcount;                      // counter_tx_fifo_s1_agent:m0_burstcount -> counter_tx_fifo_s1_translator:uav_burstcount
616 
        wire          counter_tx_fifo_s1_agent_rf_source_valid;                    // counter_tx_fifo_s1_agent:rf_source_valid -> counter_tx_fifo_s1_agent_rsp_fifo:in_valid
617 
        wire  [129:0] counter_tx_fifo_s1_agent_rf_source_data;                     // counter_tx_fifo_s1_agent:rf_source_data -> counter_tx_fifo_s1_agent_rsp_fifo:in_data
618 
        wire          counter_tx_fifo_s1_agent_rf_source_ready;                    // counter_tx_fifo_s1_agent_rsp_fifo:in_ready -> counter_tx_fifo_s1_agent:rf_source_ready
619 
        wire          counter_tx_fifo_s1_agent_rf_source_startofpacket;            // counter_tx_fifo_s1_agent:rf_source_startofpacket -> counter_tx_fifo_s1_agent_rsp_fifo:in_startofpacket
620 
        wire          counter_tx_fifo_s1_agent_rf_source_endofpacket;              // counter_tx_fifo_s1_agent:rf_source_endofpacket -> counter_tx_fifo_s1_agent_rsp_fifo:in_endofpacket
621 
        wire          counter_tx_fifo_s1_agent_rsp_fifo_out_valid;                 // counter_tx_fifo_s1_agent_rsp_fifo:out_valid -> counter_tx_fifo_s1_agent:rf_sink_valid
622 
        wire  [129:0] counter_tx_fifo_s1_agent_rsp_fifo_out_data;                  // counter_tx_fifo_s1_agent_rsp_fifo:out_data -> counter_tx_fifo_s1_agent:rf_sink_data
623 
        wire          counter_tx_fifo_s1_agent_rsp_fifo_out_ready;                 // counter_tx_fifo_s1_agent:rf_sink_ready -> counter_tx_fifo_s1_agent_rsp_fifo:out_ready
624 
        wire          counter_tx_fifo_s1_agent_rsp_fifo_out_startofpacket;         // counter_tx_fifo_s1_agent_rsp_fifo:out_startofpacket -> counter_tx_fifo_s1_agent:rf_sink_startofpacket
625 
        wire          counter_tx_fifo_s1_agent_rsp_fifo_out_endofpacket;           // counter_tx_fifo_s1_agent_rsp_fifo:out_endofpacket -> counter_tx_fifo_s1_agent:rf_sink_endofpacket
626 
        wire          counter_tx_fifo_s1_agent_rdata_fifo_src_valid;               // counter_tx_fifo_s1_agent:rdata_fifo_src_valid -> counter_tx_fifo_s1_agent_rdata_fifo:in_valid
627 
        wire   [33:0] counter_tx_fifo_s1_agent_rdata_fifo_src_data;                // counter_tx_fifo_s1_agent:rdata_fifo_src_data -> counter_tx_fifo_s1_agent_rdata_fifo:in_data
628 
        wire          counter_tx_fifo_s1_agent_rdata_fifo_src_ready;               // counter_tx_fifo_s1_agent_rdata_fifo:in_ready -> counter_tx_fifo_s1_agent:rdata_fifo_src_ready
629 
        wire   [31:0] counter_rx_fifo_s1_agent_m0_readdata;                        // counter_rx_fifo_s1_translator:uav_readdata -> counter_rx_fifo_s1_agent:m0_readdata
630 
        wire          counter_rx_fifo_s1_agent_m0_waitrequest;                     // counter_rx_fifo_s1_translator:uav_waitrequest -> counter_rx_fifo_s1_agent:m0_waitrequest
631 
        wire          counter_rx_fifo_s1_agent_m0_debugaccess;                     // counter_rx_fifo_s1_agent:m0_debugaccess -> counter_rx_fifo_s1_translator:uav_debugaccess
632 
        wire   [29:0] counter_rx_fifo_s1_agent_m0_address;                         // counter_rx_fifo_s1_agent:m0_address -> counter_rx_fifo_s1_translator:uav_address
633 
        wire    [3:0] counter_rx_fifo_s1_agent_m0_byteenable;                      // counter_rx_fifo_s1_agent:m0_byteenable -> counter_rx_fifo_s1_translator:uav_byteenable
634 
        wire          counter_rx_fifo_s1_agent_m0_read;                            // counter_rx_fifo_s1_agent:m0_read -> counter_rx_fifo_s1_translator:uav_read
635 
        wire          counter_rx_fifo_s1_agent_m0_readdatavalid;                   // counter_rx_fifo_s1_translator:uav_readdatavalid -> counter_rx_fifo_s1_agent:m0_readdatavalid
636 
        wire          counter_rx_fifo_s1_agent_m0_lock;                            // counter_rx_fifo_s1_agent:m0_lock -> counter_rx_fifo_s1_translator:uav_lock
637 
        wire   [31:0] counter_rx_fifo_s1_agent_m0_writedata;                       // counter_rx_fifo_s1_agent:m0_writedata -> counter_rx_fifo_s1_translator:uav_writedata
638 
        wire          counter_rx_fifo_s1_agent_m0_write;                           // counter_rx_fifo_s1_agent:m0_write -> counter_rx_fifo_s1_translator:uav_write
639 
        wire    [2:0] counter_rx_fifo_s1_agent_m0_burstcount;                      // counter_rx_fifo_s1_agent:m0_burstcount -> counter_rx_fifo_s1_translator:uav_burstcount
640 
        wire          counter_rx_fifo_s1_agent_rf_source_valid;                    // counter_rx_fifo_s1_agent:rf_source_valid -> counter_rx_fifo_s1_agent_rsp_fifo:in_valid
641 
        wire  [129:0] counter_rx_fifo_s1_agent_rf_source_data;                     // counter_rx_fifo_s1_agent:rf_source_data -> counter_rx_fifo_s1_agent_rsp_fifo:in_data
642 
        wire          counter_rx_fifo_s1_agent_rf_source_ready;                    // counter_rx_fifo_s1_agent_rsp_fifo:in_ready -> counter_rx_fifo_s1_agent:rf_source_ready
643 
        wire          counter_rx_fifo_s1_agent_rf_source_startofpacket;            // counter_rx_fifo_s1_agent:rf_source_startofpacket -> counter_rx_fifo_s1_agent_rsp_fifo:in_startofpacket
644 
        wire          counter_rx_fifo_s1_agent_rf_source_endofpacket;              // counter_rx_fifo_s1_agent:rf_source_endofpacket -> counter_rx_fifo_s1_agent_rsp_fifo:in_endofpacket
645 
        wire          counter_rx_fifo_s1_agent_rsp_fifo_out_valid;                 // counter_rx_fifo_s1_agent_rsp_fifo:out_valid -> counter_rx_fifo_s1_agent:rf_sink_valid
646 
        wire  [129:0] counter_rx_fifo_s1_agent_rsp_fifo_out_data;                  // counter_rx_fifo_s1_agent_rsp_fifo:out_data -> counter_rx_fifo_s1_agent:rf_sink_data
647 
        wire          counter_rx_fifo_s1_agent_rsp_fifo_out_ready;                 // counter_rx_fifo_s1_agent:rf_sink_ready -> counter_rx_fifo_s1_agent_rsp_fifo:out_ready
648 
        wire          counter_rx_fifo_s1_agent_rsp_fifo_out_startofpacket;         // counter_rx_fifo_s1_agent_rsp_fifo:out_startofpacket -> counter_rx_fifo_s1_agent:rf_sink_startofpacket
649 
        wire          counter_rx_fifo_s1_agent_rsp_fifo_out_endofpacket;           // counter_rx_fifo_s1_agent_rsp_fifo:out_endofpacket -> counter_rx_fifo_s1_agent:rf_sink_endofpacket
650 
        wire          counter_rx_fifo_s1_agent_rdata_fifo_src_valid;               // counter_rx_fifo_s1_agent:rdata_fifo_src_valid -> counter_rx_fifo_s1_agent_rdata_fifo:in_valid
651 
        wire   [33:0] counter_rx_fifo_s1_agent_rdata_fifo_src_data;                // counter_rx_fifo_s1_agent:rdata_fifo_src_data -> counter_rx_fifo_s1_agent_rdata_fifo:in_data
652 
        wire          counter_rx_fifo_s1_agent_rdata_fifo_src_ready;               // counter_rx_fifo_s1_agent_rdata_fifo:in_ready -> counter_rx_fifo_s1_agent:rdata_fifo_src_ready
653 
        wire          hps_0_h2f_axi_master_agent_write_cp_valid;                   // hps_0_h2f_axi_master_agent:write_cp_valid -> router:sink_valid
654 
        wire  [128:0] hps_0_h2f_axi_master_agent_write_cp_data;                    // hps_0_h2f_axi_master_agent:write_cp_data -> router:sink_data
655 
        wire          hps_0_h2f_axi_master_agent_write_cp_ready;                   // router:sink_ready -> hps_0_h2f_axi_master_agent:write_cp_ready
656 
        wire          hps_0_h2f_axi_master_agent_write_cp_startofpacket;           // hps_0_h2f_axi_master_agent:write_cp_startofpacket -> router:sink_startofpacket
657 
        wire          hps_0_h2f_axi_master_agent_write_cp_endofpacket;             // hps_0_h2f_axi_master_agent:write_cp_endofpacket -> router:sink_endofpacket
658 
        wire          hps_0_h2f_axi_master_agent_read_cp_valid;                    // hps_0_h2f_axi_master_agent:read_cp_valid -> router_001:sink_valid
659 
        wire  [128:0] hps_0_h2f_axi_master_agent_read_cp_data;                     // hps_0_h2f_axi_master_agent:read_cp_data -> router_001:sink_data
660 
        wire          hps_0_h2f_axi_master_agent_read_cp_ready;                    // router_001:sink_ready -> hps_0_h2f_axi_master_agent:read_cp_ready
661 
        wire          hps_0_h2f_axi_master_agent_read_cp_startofpacket;            // hps_0_h2f_axi_master_agent:read_cp_startofpacket -> router_001:sink_startofpacket
662 
        wire          hps_0_h2f_axi_master_agent_read_cp_endofpacket;              // hps_0_h2f_axi_master_agent:read_cp_endofpacket -> router_001:sink_endofpacket
663 
        wire          led_pio_test_s1_agent_rp_valid;                              // led_pio_test_s1_agent:rp_valid -> router_002:sink_valid
664 
        wire  [128:0] led_pio_test_s1_agent_rp_data;                               // led_pio_test_s1_agent:rp_data -> router_002:sink_data
665 
        wire          led_pio_test_s1_agent_rp_ready;                              // router_002:sink_ready -> led_pio_test_s1_agent:rp_ready
666 
        wire          led_pio_test_s1_agent_rp_startofpacket;                      // led_pio_test_s1_agent:rp_startofpacket -> router_002:sink_startofpacket
667 
        wire          led_pio_test_s1_agent_rp_endofpacket;                        // led_pio_test_s1_agent:rp_endofpacket -> router_002:sink_endofpacket
668 
        wire          router_002_src_valid;                                        // router_002:src_valid -> rsp_demux:sink_valid
669 
        wire  [128:0] router_002_src_data;                                         // router_002:src_data -> rsp_demux:sink_data
670 
        wire          router_002_src_ready;                                        // rsp_demux:sink_ready -> router_002:src_ready
671 
        wire   [21:0] router_002_src_channel;                                      // router_002:src_channel -> rsp_demux:sink_channel
672 
        wire          router_002_src_startofpacket;                                // router_002:src_startofpacket -> rsp_demux:sink_startofpacket
673 
        wire          router_002_src_endofpacket;                                  // router_002:src_endofpacket -> rsp_demux:sink_endofpacket
674 
        wire          timecode_rx_s1_agent_rp_valid;                               // timecode_rx_s1_agent:rp_valid -> router_003:sink_valid
675 
        wire  [128:0] timecode_rx_s1_agent_rp_data;                                // timecode_rx_s1_agent:rp_data -> router_003:sink_data
676 
        wire          timecode_rx_s1_agent_rp_ready;                               // router_003:sink_ready -> timecode_rx_s1_agent:rp_ready
677 
        wire          timecode_rx_s1_agent_rp_startofpacket;                       // timecode_rx_s1_agent:rp_startofpacket -> router_003:sink_startofpacket
678 
        wire          timecode_rx_s1_agent_rp_endofpacket;                         // timecode_rx_s1_agent:rp_endofpacket -> router_003:sink_endofpacket
679 
        wire          router_003_src_valid;                                        // router_003:src_valid -> rsp_demux_001:sink_valid
680 
        wire  [128:0] router_003_src_data;                                         // router_003:src_data -> rsp_demux_001:sink_data
681 
        wire          router_003_src_ready;                                        // rsp_demux_001:sink_ready -> router_003:src_ready
682 
        wire   [21:0] router_003_src_channel;                                      // router_003:src_channel -> rsp_demux_001:sink_channel
683 
        wire          router_003_src_startofpacket;                                // router_003:src_startofpacket -> rsp_demux_001:sink_startofpacket
684 
        wire          router_003_src_endofpacket;                                  // router_003:src_endofpacket -> rsp_demux_001:sink_endofpacket
685 
        wire          timecode_ready_rx_s1_agent_rp_valid;                         // timecode_ready_rx_s1_agent:rp_valid -> router_004:sink_valid
686 
        wire  [128:0] timecode_ready_rx_s1_agent_rp_data;                          // timecode_ready_rx_s1_agent:rp_data -> router_004:sink_data
687 
        wire          timecode_ready_rx_s1_agent_rp_ready;                         // router_004:sink_ready -> timecode_ready_rx_s1_agent:rp_ready
688 
        wire          timecode_ready_rx_s1_agent_rp_startofpacket;                 // timecode_ready_rx_s1_agent:rp_startofpacket -> router_004:sink_startofpacket
689 
        wire          timecode_ready_rx_s1_agent_rp_endofpacket;                   // timecode_ready_rx_s1_agent:rp_endofpacket -> router_004:sink_endofpacket
690 
        wire          router_004_src_valid;                                        // router_004:src_valid -> rsp_demux_002:sink_valid
691 
        wire  [128:0] router_004_src_data;                                         // router_004:src_data -> rsp_demux_002:sink_data
692 
        wire          router_004_src_ready;                                        // rsp_demux_002:sink_ready -> router_004:src_ready
693 
        wire   [21:0] router_004_src_channel;                                      // router_004:src_channel -> rsp_demux_002:sink_channel
694 
        wire          router_004_src_startofpacket;                                // router_004:src_startofpacket -> rsp_demux_002:sink_startofpacket
695 
        wire          router_004_src_endofpacket;                                  // router_004:src_endofpacket -> rsp_demux_002:sink_endofpacket
696 
        wire          data_flag_rx_s1_agent_rp_valid;                              // data_flag_rx_s1_agent:rp_valid -> router_005:sink_valid
697 
        wire  [128:0] data_flag_rx_s1_agent_rp_data;                               // data_flag_rx_s1_agent:rp_data -> router_005:sink_data
698 
        wire          data_flag_rx_s1_agent_rp_ready;                              // router_005:sink_ready -> data_flag_rx_s1_agent:rp_ready
699 
        wire          data_flag_rx_s1_agent_rp_startofpacket;                      // data_flag_rx_s1_agent:rp_startofpacket -> router_005:sink_startofpacket
700 
        wire          data_flag_rx_s1_agent_rp_endofpacket;                        // data_flag_rx_s1_agent:rp_endofpacket -> router_005:sink_endofpacket
701 
        wire          router_005_src_valid;                                        // router_005:src_valid -> rsp_demux_003:sink_valid
702 
        wire  [128:0] router_005_src_data;                                         // router_005:src_data -> rsp_demux_003:sink_data
703 
        wire          router_005_src_ready;                                        // rsp_demux_003:sink_ready -> router_005:src_ready
704 
        wire   [21:0] router_005_src_channel;                                      // router_005:src_channel -> rsp_demux_003:sink_channel
705 
        wire          router_005_src_startofpacket;                                // router_005:src_startofpacket -> rsp_demux_003:sink_startofpacket
706 
        wire          router_005_src_endofpacket;                                  // router_005:src_endofpacket -> rsp_demux_003:sink_endofpacket
707 
        wire          data_read_en_rx_s1_agent_rp_valid;                           // data_read_en_rx_s1_agent:rp_valid -> router_006:sink_valid
708 
        wire  [128:0] data_read_en_rx_s1_agent_rp_data;                            // data_read_en_rx_s1_agent:rp_data -> router_006:sink_data
709 
        wire          data_read_en_rx_s1_agent_rp_ready;                           // router_006:sink_ready -> data_read_en_rx_s1_agent:rp_ready
710 
        wire          data_read_en_rx_s1_agent_rp_startofpacket;                   // data_read_en_rx_s1_agent:rp_startofpacket -> router_006:sink_startofpacket
711 
        wire          data_read_en_rx_s1_agent_rp_endofpacket;                     // data_read_en_rx_s1_agent:rp_endofpacket -> router_006:sink_endofpacket
712 
        wire          router_006_src_valid;                                        // router_006:src_valid -> rsp_demux_004:sink_valid
713 
        wire  [128:0] router_006_src_data;                                         // router_006:src_data -> rsp_demux_004:sink_data
714 
        wire          router_006_src_ready;                                        // rsp_demux_004:sink_ready -> router_006:src_ready
715 
        wire   [21:0] router_006_src_channel;                                      // router_006:src_channel -> rsp_demux_004:sink_channel
716 
        wire          router_006_src_startofpacket;                                // router_006:src_startofpacket -> rsp_demux_004:sink_startofpacket
717 
        wire          router_006_src_endofpacket;                                  // router_006:src_endofpacket -> rsp_demux_004:sink_endofpacket
718 
        wire          fifo_full_rx_status_s1_agent_rp_valid;                       // fifo_full_rx_status_s1_agent:rp_valid -> router_007:sink_valid
719 
        wire  [128:0] fifo_full_rx_status_s1_agent_rp_data;                        // fifo_full_rx_status_s1_agent:rp_data -> router_007:sink_data
720 
        wire          fifo_full_rx_status_s1_agent_rp_ready;                       // router_007:sink_ready -> fifo_full_rx_status_s1_agent:rp_ready
721 
        wire          fifo_full_rx_status_s1_agent_rp_startofpacket;               // fifo_full_rx_status_s1_agent:rp_startofpacket -> router_007:sink_startofpacket
722 
        wire          fifo_full_rx_status_s1_agent_rp_endofpacket;                 // fifo_full_rx_status_s1_agent:rp_endofpacket -> router_007:sink_endofpacket
723 
        wire          router_007_src_valid;                                        // router_007:src_valid -> rsp_demux_005:sink_valid
724 
        wire  [128:0] router_007_src_data;                                         // router_007:src_data -> rsp_demux_005:sink_data
725 
        wire          router_007_src_ready;                                        // rsp_demux_005:sink_ready -> router_007:src_ready
726 
        wire   [21:0] router_007_src_channel;                                      // router_007:src_channel -> rsp_demux_005:sink_channel
727 
        wire          router_007_src_startofpacket;                                // router_007:src_startofpacket -> rsp_demux_005:sink_startofpacket
728 
        wire          router_007_src_endofpacket;                                  // router_007:src_endofpacket -> rsp_demux_005:sink_endofpacket
729 
        wire          fifo_empty_rx_status_s1_agent_rp_valid;                      // fifo_empty_rx_status_s1_agent:rp_valid -> router_008:sink_valid
730 
        wire  [128:0] fifo_empty_rx_status_s1_agent_rp_data;                       // fifo_empty_rx_status_s1_agent:rp_data -> router_008:sink_data
731 
        wire          fifo_empty_rx_status_s1_agent_rp_ready;                      // router_008:sink_ready -> fifo_empty_rx_status_s1_agent:rp_ready
732 
        wire          fifo_empty_rx_status_s1_agent_rp_startofpacket;              // fifo_empty_rx_status_s1_agent:rp_startofpacket -> router_008:sink_startofpacket
733 
        wire          fifo_empty_rx_status_s1_agent_rp_endofpacket;                // fifo_empty_rx_status_s1_agent:rp_endofpacket -> router_008:sink_endofpacket
734 
        wire          router_008_src_valid;                                        // router_008:src_valid -> rsp_demux_006:sink_valid
735 
        wire  [128:0] router_008_src_data;                                         // router_008:src_data -> rsp_demux_006:sink_data
736 
        wire          router_008_src_ready;                                        // rsp_demux_006:sink_ready -> router_008:src_ready
737 
        wire   [21:0] router_008_src_channel;                                      // router_008:src_channel -> rsp_demux_006:sink_channel
738 
        wire          router_008_src_startofpacket;                                // router_008:src_startofpacket -> rsp_demux_006:sink_startofpacket
739 
        wire          router_008_src_endofpacket;                                  // router_008:src_endofpacket -> rsp_demux_006:sink_endofpacket
740 
        wire          link_start_s1_agent_rp_valid;                                // link_start_s1_agent:rp_valid -> router_009:sink_valid
741 
        wire  [128:0] link_start_s1_agent_rp_data;                                 // link_start_s1_agent:rp_data -> router_009:sink_data
742 
        wire          link_start_s1_agent_rp_ready;                                // router_009:sink_ready -> link_start_s1_agent:rp_ready
743 
        wire          link_start_s1_agent_rp_startofpacket;                        // link_start_s1_agent:rp_startofpacket -> router_009:sink_startofpacket
744 
        wire          link_start_s1_agent_rp_endofpacket;                          // link_start_s1_agent:rp_endofpacket -> router_009:sink_endofpacket
745 
        wire          router_009_src_valid;                                        // router_009:src_valid -> rsp_demux_007:sink_valid
746 
        wire  [128:0] router_009_src_data;                                         // router_009:src_data -> rsp_demux_007:sink_data
747 
        wire          router_009_src_ready;                                        // rsp_demux_007:sink_ready -> router_009:src_ready
748 
        wire   [21:0] router_009_src_channel;                                      // router_009:src_channel -> rsp_demux_007:sink_channel
749 
        wire          router_009_src_startofpacket;                                // router_009:src_startofpacket -> rsp_demux_007:sink_startofpacket
750 
        wire          router_009_src_endofpacket;                                  // router_009:src_endofpacket -> rsp_demux_007:sink_endofpacket
751 
        wire          auto_start_s1_agent_rp_valid;                                // auto_start_s1_agent:rp_valid -> router_010:sink_valid
752 
        wire  [128:0] auto_start_s1_agent_rp_data;                                 // auto_start_s1_agent:rp_data -> router_010:sink_data
753 
        wire          auto_start_s1_agent_rp_ready;                                // router_010:sink_ready -> auto_start_s1_agent:rp_ready
754 
        wire          auto_start_s1_agent_rp_startofpacket;                        // auto_start_s1_agent:rp_startofpacket -> router_010:sink_startofpacket
755 
        wire          auto_start_s1_agent_rp_endofpacket;                          // auto_start_s1_agent:rp_endofpacket -> router_010:sink_endofpacket
756 
        wire          router_010_src_valid;                                        // router_010:src_valid -> rsp_demux_008:sink_valid
757 
        wire  [128:0] router_010_src_data;                                         // router_010:src_data -> rsp_demux_008:sink_data
758 
        wire          router_010_src_ready;                                        // rsp_demux_008:sink_ready -> router_010:src_ready
759 
        wire   [21:0] router_010_src_channel;                                      // router_010:src_channel -> rsp_demux_008:sink_channel
760 
        wire          router_010_src_startofpacket;                                // router_010:src_startofpacket -> rsp_demux_008:sink_startofpacket
761 
        wire          router_010_src_endofpacket;                                  // router_010:src_endofpacket -> rsp_demux_008:sink_endofpacket
762 
        wire          link_disable_s1_agent_rp_valid;                              // link_disable_s1_agent:rp_valid -> router_011:sink_valid
763 
        wire  [128:0] link_disable_s1_agent_rp_data;                               // link_disable_s1_agent:rp_data -> router_011:sink_data
764 
        wire          link_disable_s1_agent_rp_ready;                              // router_011:sink_ready -> link_disable_s1_agent:rp_ready
765 
        wire          link_disable_s1_agent_rp_startofpacket;                      // link_disable_s1_agent:rp_startofpacket -> router_011:sink_startofpacket
766 
        wire          link_disable_s1_agent_rp_endofpacket;                        // link_disable_s1_agent:rp_endofpacket -> router_011:sink_endofpacket
767 
        wire          router_011_src_valid;                                        // router_011:src_valid -> rsp_demux_009:sink_valid
768 
        wire  [128:0] router_011_src_data;                                         // router_011:src_data -> rsp_demux_009:sink_data
769 
        wire          router_011_src_ready;                                        // rsp_demux_009:sink_ready -> router_011:src_ready
770 
        wire   [21:0] router_011_src_channel;                                      // router_011:src_channel -> rsp_demux_009:sink_channel
771 
        wire          router_011_src_startofpacket;                                // router_011:src_startofpacket -> rsp_demux_009:sink_startofpacket
772 
        wire          router_011_src_endofpacket;                                  // router_011:src_endofpacket -> rsp_demux_009:sink_endofpacket
773 
        wire          write_data_fifo_tx_s1_agent_rp_valid;                        // write_data_fifo_tx_s1_agent:rp_valid -> router_012:sink_valid
774 
        wire  [128:0] write_data_fifo_tx_s1_agent_rp_data;                         // write_data_fifo_tx_s1_agent:rp_data -> router_012:sink_data
775 
        wire          write_data_fifo_tx_s1_agent_rp_ready;                        // router_012:sink_ready -> write_data_fifo_tx_s1_agent:rp_ready
776 
        wire          write_data_fifo_tx_s1_agent_rp_startofpacket;                // write_data_fifo_tx_s1_agent:rp_startofpacket -> router_012:sink_startofpacket
777 
        wire          write_data_fifo_tx_s1_agent_rp_endofpacket;                  // write_data_fifo_tx_s1_agent:rp_endofpacket -> router_012:sink_endofpacket
778 
        wire          router_012_src_valid;                                        // router_012:src_valid -> rsp_demux_010:sink_valid
779 
        wire  [128:0] router_012_src_data;                                         // router_012:src_data -> rsp_demux_010:sink_data
780 
        wire          router_012_src_ready;                                        // rsp_demux_010:sink_ready -> router_012:src_ready
781 
        wire   [21:0] router_012_src_channel;                                      // router_012:src_channel -> rsp_demux_010:sink_channel
782 
        wire          router_012_src_startofpacket;                                // router_012:src_startofpacket -> rsp_demux_010:sink_startofpacket
783 
        wire          router_012_src_endofpacket;                                  // router_012:src_endofpacket -> rsp_demux_010:sink_endofpacket
784 
        wire          write_en_tx_s1_agent_rp_valid;                               // write_en_tx_s1_agent:rp_valid -> router_013:sink_valid
785 
        wire  [128:0] write_en_tx_s1_agent_rp_data;                                // write_en_tx_s1_agent:rp_data -> router_013:sink_data
786 
        wire          write_en_tx_s1_agent_rp_ready;                               // router_013:sink_ready -> write_en_tx_s1_agent:rp_ready
787 
        wire          write_en_tx_s1_agent_rp_startofpacket;                       // write_en_tx_s1_agent:rp_startofpacket -> router_013:sink_startofpacket
788 
        wire          write_en_tx_s1_agent_rp_endofpacket;                         // write_en_tx_s1_agent:rp_endofpacket -> router_013:sink_endofpacket
789 
        wire          router_013_src_valid;                                        // router_013:src_valid -> rsp_demux_011:sink_valid
790 
        wire  [128:0] router_013_src_data;                                         // router_013:src_data -> rsp_demux_011:sink_data
791 
        wire          router_013_src_ready;                                        // rsp_demux_011:sink_ready -> router_013:src_ready
792 
        wire   [21:0] router_013_src_channel;                                      // router_013:src_channel -> rsp_demux_011:sink_channel
793 
        wire          router_013_src_startofpacket;                                // router_013:src_startofpacket -> rsp_demux_011:sink_startofpacket
794 
        wire          router_013_src_endofpacket;                                  // router_013:src_endofpacket -> rsp_demux_011:sink_endofpacket
795 
        wire          fifo_full_tx_status_s1_agent_rp_valid;                       // fifo_full_tx_status_s1_agent:rp_valid -> router_014:sink_valid
796 
        wire  [128:0] fifo_full_tx_status_s1_agent_rp_data;                        // fifo_full_tx_status_s1_agent:rp_data -> router_014:sink_data
797 
        wire          fifo_full_tx_status_s1_agent_rp_ready;                       // router_014:sink_ready -> fifo_full_tx_status_s1_agent:rp_ready
798 
        wire          fifo_full_tx_status_s1_agent_rp_startofpacket;               // fifo_full_tx_status_s1_agent:rp_startofpacket -> router_014:sink_startofpacket
799 
        wire          fifo_full_tx_status_s1_agent_rp_endofpacket;                 // fifo_full_tx_status_s1_agent:rp_endofpacket -> router_014:sink_endofpacket
800 
        wire          router_014_src_valid;                                        // router_014:src_valid -> rsp_demux_012:sink_valid
801 
        wire  [128:0] router_014_src_data;                                         // router_014:src_data -> rsp_demux_012:sink_data
802 
        wire          router_014_src_ready;                                        // rsp_demux_012:sink_ready -> router_014:src_ready
803 
        wire   [21:0] router_014_src_channel;                                      // router_014:src_channel -> rsp_demux_012:sink_channel
804 
        wire          router_014_src_startofpacket;                                // router_014:src_startofpacket -> rsp_demux_012:sink_startofpacket
805 
        wire          router_014_src_endofpacket;                                  // router_014:src_endofpacket -> rsp_demux_012:sink_endofpacket
806 
        wire          fifo_empty_tx_status_s1_agent_rp_valid;                      // fifo_empty_tx_status_s1_agent:rp_valid -> router_015:sink_valid
807 
        wire  [128:0] fifo_empty_tx_status_s1_agent_rp_data;                       // fifo_empty_tx_status_s1_agent:rp_data -> router_015:sink_data
808 
        wire          fifo_empty_tx_status_s1_agent_rp_ready;                      // router_015:sink_ready -> fifo_empty_tx_status_s1_agent:rp_ready
809 
        wire          fifo_empty_tx_status_s1_agent_rp_startofpacket;              // fifo_empty_tx_status_s1_agent:rp_startofpacket -> router_015:sink_startofpacket
810 
        wire          fifo_empty_tx_status_s1_agent_rp_endofpacket;                // fifo_empty_tx_status_s1_agent:rp_endofpacket -> router_015:sink_endofpacket
811 
        wire          router_015_src_valid;                                        // router_015:src_valid -> rsp_demux_013:sink_valid
812 
        wire  [128:0] router_015_src_data;                                         // router_015:src_data -> rsp_demux_013:sink_data
813 
        wire          router_015_src_ready;                                        // rsp_demux_013:sink_ready -> router_015:src_ready
814 
        wire   [21:0] router_015_src_channel;                                      // router_015:src_channel -> rsp_demux_013:sink_channel
815 
        wire          router_015_src_startofpacket;                                // router_015:src_startofpacket -> rsp_demux_013:sink_startofpacket
816 
        wire          router_015_src_endofpacket;                                  // router_015:src_endofpacket -> rsp_demux_013:sink_endofpacket
817 
        wire          timecode_tx_data_s1_agent_rp_valid;                          // timecode_tx_data_s1_agent:rp_valid -> router_016:sink_valid
818 
        wire  [128:0] timecode_tx_data_s1_agent_rp_data;                           // timecode_tx_data_s1_agent:rp_data -> router_016:sink_data
819 
        wire          timecode_tx_data_s1_agent_rp_ready;                          // router_016:sink_ready -> timecode_tx_data_s1_agent:rp_ready
820 
        wire          timecode_tx_data_s1_agent_rp_startofpacket;                  // timecode_tx_data_s1_agent:rp_startofpacket -> router_016:sink_startofpacket
821 
        wire          timecode_tx_data_s1_agent_rp_endofpacket;                    // timecode_tx_data_s1_agent:rp_endofpacket -> router_016:sink_endofpacket
822 
        wire          router_016_src_valid;                                        // router_016:src_valid -> rsp_demux_014:sink_valid
823 
        wire  [128:0] router_016_src_data;                                         // router_016:src_data -> rsp_demux_014:sink_data
824 
        wire          router_016_src_ready;                                        // rsp_demux_014:sink_ready -> router_016:src_ready
825 
        wire   [21:0] router_016_src_channel;                                      // router_016:src_channel -> rsp_demux_014:sink_channel
826 
        wire          router_016_src_startofpacket;                                // router_016:src_startofpacket -> rsp_demux_014:sink_startofpacket
827 
        wire          router_016_src_endofpacket;                                  // router_016:src_endofpacket -> rsp_demux_014:sink_endofpacket
828 
        wire          timecode_tx_enable_s1_agent_rp_valid;                        // timecode_tx_enable_s1_agent:rp_valid -> router_017:sink_valid
829 
        wire  [128:0] timecode_tx_enable_s1_agent_rp_data;                         // timecode_tx_enable_s1_agent:rp_data -> router_017:sink_data
830 
        wire          timecode_tx_enable_s1_agent_rp_ready;                        // router_017:sink_ready -> timecode_tx_enable_s1_agent:rp_ready
831 
        wire          timecode_tx_enable_s1_agent_rp_startofpacket;                // timecode_tx_enable_s1_agent:rp_startofpacket -> router_017:sink_startofpacket
832 
        wire          timecode_tx_enable_s1_agent_rp_endofpacket;                  // timecode_tx_enable_s1_agent:rp_endofpacket -> router_017:sink_endofpacket
833 
        wire          router_017_src_valid;                                        // router_017:src_valid -> rsp_demux_015:sink_valid
834 
        wire  [128:0] router_017_src_data;                                         // router_017:src_data -> rsp_demux_015:sink_data
835 
        wire          router_017_src_ready;                                        // rsp_demux_015:sink_ready -> router_017:src_ready
836 
        wire   [21:0] router_017_src_channel;                                      // router_017:src_channel -> rsp_demux_015:sink_channel
837 
        wire          router_017_src_startofpacket;                                // router_017:src_startofpacket -> rsp_demux_015:sink_startofpacket
838 
        wire          router_017_src_endofpacket;                                  // router_017:src_endofpacket -> rsp_demux_015:sink_endofpacket
839 
        wire          timecode_tx_ready_s1_agent_rp_valid;                         // timecode_tx_ready_s1_agent:rp_valid -> router_018:sink_valid
840 
        wire  [128:0] timecode_tx_ready_s1_agent_rp_data;                          // timecode_tx_ready_s1_agent:rp_data -> router_018:sink_data
841 
        wire          timecode_tx_ready_s1_agent_rp_ready;                         // router_018:sink_ready -> timecode_tx_ready_s1_agent:rp_ready
842 
        wire          timecode_tx_ready_s1_agent_rp_startofpacket;                 // timecode_tx_ready_s1_agent:rp_startofpacket -> router_018:sink_startofpacket
843 
        wire          timecode_tx_ready_s1_agent_rp_endofpacket;                   // timecode_tx_ready_s1_agent:rp_endofpacket -> router_018:sink_endofpacket
844 
        wire          router_018_src_valid;                                        // router_018:src_valid -> rsp_demux_016:sink_valid
845 
        wire  [128:0] router_018_src_data;                                         // router_018:src_data -> rsp_demux_016:sink_data
846 
        wire          router_018_src_ready;                                        // rsp_demux_016:sink_ready -> router_018:src_ready
847 
        wire   [21:0] router_018_src_channel;                                      // router_018:src_channel -> rsp_demux_016:sink_channel
848 
        wire          router_018_src_startofpacket;                                // router_018:src_startofpacket -> rsp_demux_016:sink_startofpacket
849 
        wire          router_018_src_endofpacket;                                  // router_018:src_endofpacket -> rsp_demux_016:sink_endofpacket
850 
        wire          data_info_s1_agent_rp_valid;                                 // data_info_s1_agent:rp_valid -> router_019:sink_valid
851 
        wire  [128:0] data_info_s1_agent_rp_data;                                  // data_info_s1_agent:rp_data -> router_019:sink_data
852 
        wire          data_info_s1_agent_rp_ready;                                 // router_019:sink_ready -> data_info_s1_agent:rp_ready
853 
        wire          data_info_s1_agent_rp_startofpacket;                         // data_info_s1_agent:rp_startofpacket -> router_019:sink_startofpacket
854 
        wire          data_info_s1_agent_rp_endofpacket;                           // data_info_s1_agent:rp_endofpacket -> router_019:sink_endofpacket
855 
        wire          router_019_src_valid;                                        // router_019:src_valid -> rsp_demux_017:sink_valid
856 
        wire  [128:0] router_019_src_data;                                         // router_019:src_data -> rsp_demux_017:sink_data
857 
        wire          router_019_src_ready;                                        // rsp_demux_017:sink_ready -> router_019:src_ready
858 
        wire   [21:0] router_019_src_channel;                                      // router_019:src_channel -> rsp_demux_017:sink_channel
859 
        wire          router_019_src_startofpacket;                                // router_019:src_startofpacket -> rsp_demux_017:sink_startofpacket
860 
        wire          router_019_src_endofpacket;                                  // router_019:src_endofpacket -> rsp_demux_017:sink_endofpacket
861 
        wire          clock_sel_s1_agent_rp_valid;                                 // clock_sel_s1_agent:rp_valid -> router_020:sink_valid
862 
        wire  [128:0] clock_sel_s1_agent_rp_data;                                  // clock_sel_s1_agent:rp_data -> router_020:sink_data
863 
        wire          clock_sel_s1_agent_rp_ready;                                 // router_020:sink_ready -> clock_sel_s1_agent:rp_ready
864 
        wire          clock_sel_s1_agent_rp_startofpacket;                         // clock_sel_s1_agent:rp_startofpacket -> router_020:sink_startofpacket
865 
        wire          clock_sel_s1_agent_rp_endofpacket;                           // clock_sel_s1_agent:rp_endofpacket -> router_020:sink_endofpacket
866 
        wire          router_020_src_valid;                                        // router_020:src_valid -> rsp_demux_018:sink_valid
867 
        wire  [128:0] router_020_src_data;                                         // router_020:src_data -> rsp_demux_018:sink_data
868 
        wire          router_020_src_ready;                                        // rsp_demux_018:sink_ready -> router_020:src_ready
869 
        wire   [21:0] router_020_src_channel;                                      // router_020:src_channel -> rsp_demux_018:sink_channel
870 
        wire          router_020_src_startofpacket;                                // router_020:src_startofpacket -> rsp_demux_018:sink_startofpacket
871 
        wire          router_020_src_endofpacket;                                  // router_020:src_endofpacket -> rsp_demux_018:sink_endofpacket
872 
        wire          fsm_info_s1_agent_rp_valid;                                  // fsm_info_s1_agent:rp_valid -> router_021:sink_valid
873 
        wire  [128:0] fsm_info_s1_agent_rp_data;                                   // fsm_info_s1_agent:rp_data -> router_021:sink_data
874 
        wire          fsm_info_s1_agent_rp_ready;                                  // router_021:sink_ready -> fsm_info_s1_agent:rp_ready
875 
        wire          fsm_info_s1_agent_rp_startofpacket;                          // fsm_info_s1_agent:rp_startofpacket -> router_021:sink_startofpacket
876 
        wire          fsm_info_s1_agent_rp_endofpacket;                            // fsm_info_s1_agent:rp_endofpacket -> router_021:sink_endofpacket
877 
        wire          router_021_src_valid;                                        // router_021:src_valid -> rsp_demux_019:sink_valid
878 
        wire  [128:0] router_021_src_data;                                         // router_021:src_data -> rsp_demux_019:sink_data
879 
        wire          router_021_src_ready;                                        // rsp_demux_019:sink_ready -> router_021:src_ready
880 
        wire   [21:0] router_021_src_channel;                                      // router_021:src_channel -> rsp_demux_019:sink_channel
881 
        wire          router_021_src_startofpacket;                                // router_021:src_startofpacket -> rsp_demux_019:sink_startofpacket
882 
        wire          router_021_src_endofpacket;                                  // router_021:src_endofpacket -> rsp_demux_019:sink_endofpacket
883 
        wire          counter_tx_fifo_s1_agent_rp_valid;                           // counter_tx_fifo_s1_agent:rp_valid -> router_022:sink_valid
884 
        wire  [128:0] counter_tx_fifo_s1_agent_rp_data;                            // counter_tx_fifo_s1_agent:rp_data -> router_022:sink_data
885 
        wire          counter_tx_fifo_s1_agent_rp_ready;                           // router_022:sink_ready -> counter_tx_fifo_s1_agent:rp_ready
886 
        wire          counter_tx_fifo_s1_agent_rp_startofpacket;                   // counter_tx_fifo_s1_agent:rp_startofpacket -> router_022:sink_startofpacket
887 
        wire          counter_tx_fifo_s1_agent_rp_endofpacket;                     // counter_tx_fifo_s1_agent:rp_endofpacket -> router_022:sink_endofpacket
888 
        wire          router_022_src_valid;                                        // router_022:src_valid -> rsp_demux_020:sink_valid
889 
        wire  [128:0] router_022_src_data;                                         // router_022:src_data -> rsp_demux_020:sink_data
890 
        wire          router_022_src_ready;                                        // rsp_demux_020:sink_ready -> router_022:src_ready
891 
        wire   [21:0] router_022_src_channel;                                      // router_022:src_channel -> rsp_demux_020:sink_channel
892 
        wire          router_022_src_startofpacket;                                // router_022:src_startofpacket -> rsp_demux_020:sink_startofpacket
893 
        wire          router_022_src_endofpacket;                                  // router_022:src_endofpacket -> rsp_demux_020:sink_endofpacket
894 
        wire          counter_rx_fifo_s1_agent_rp_valid;                           // counter_rx_fifo_s1_agent:rp_valid -> router_023:sink_valid
895 
        wire  [128:0] counter_rx_fifo_s1_agent_rp_data;                            // counter_rx_fifo_s1_agent:rp_data -> router_023:sink_data
896 
        wire          counter_rx_fifo_s1_agent_rp_ready;                           // router_023:sink_ready -> counter_rx_fifo_s1_agent:rp_ready
897 
        wire          counter_rx_fifo_s1_agent_rp_startofpacket;                   // counter_rx_fifo_s1_agent:rp_startofpacket -> router_023:sink_startofpacket
898 
        wire          counter_rx_fifo_s1_agent_rp_endofpacket;                     // counter_rx_fifo_s1_agent:rp_endofpacket -> router_023:sink_endofpacket
899 
        wire          router_023_src_valid;                                        // router_023:src_valid -> rsp_demux_021:sink_valid
900 
        wire  [128:0] router_023_src_data;                                         // router_023:src_data -> rsp_demux_021:sink_data
901 
        wire          router_023_src_ready;                                        // rsp_demux_021:sink_ready -> router_023:src_ready
902 
        wire   [21:0] router_023_src_channel;                                      // router_023:src_channel -> rsp_demux_021:sink_channel
903 
        wire          router_023_src_startofpacket;                                // router_023:src_startofpacket -> rsp_demux_021:sink_startofpacket
904 
        wire          router_023_src_endofpacket;                                  // router_023:src_endofpacket -> rsp_demux_021:sink_endofpacket
905 
        wire          router_src_valid;                                            // router:src_valid -> hps_0_h2f_axi_master_wr_limiter:cmd_sink_valid
906 
        wire  [128:0] router_src_data;                                             // router:src_data -> hps_0_h2f_axi_master_wr_limiter:cmd_sink_data
907 
        wire          router_src_ready;                                            // hps_0_h2f_axi_master_wr_limiter:cmd_sink_ready -> router:src_ready
908 
        wire   [21:0] router_src_channel;                                          // router:src_channel -> hps_0_h2f_axi_master_wr_limiter:cmd_sink_channel
909 
        wire          router_src_startofpacket;                                    // router:src_startofpacket -> hps_0_h2f_axi_master_wr_limiter:cmd_sink_startofpacket
910 
        wire          router_src_endofpacket;                                      // router:src_endofpacket -> hps_0_h2f_axi_master_wr_limiter:cmd_sink_endofpacket
911 
        wire  [128:0] hps_0_h2f_axi_master_wr_limiter_cmd_src_data;                // hps_0_h2f_axi_master_wr_limiter:cmd_src_data -> cmd_demux:sink_data
912 
        wire          hps_0_h2f_axi_master_wr_limiter_cmd_src_ready;               // cmd_demux:sink_ready -> hps_0_h2f_axi_master_wr_limiter:cmd_src_ready
913 
        wire   [21:0] hps_0_h2f_axi_master_wr_limiter_cmd_src_channel;             // hps_0_h2f_axi_master_wr_limiter:cmd_src_channel -> cmd_demux:sink_channel
914 
        wire          hps_0_h2f_axi_master_wr_limiter_cmd_src_startofpacket;       // hps_0_h2f_axi_master_wr_limiter:cmd_src_startofpacket -> cmd_demux:sink_startofpacket
915 
        wire          hps_0_h2f_axi_master_wr_limiter_cmd_src_endofpacket;         // hps_0_h2f_axi_master_wr_limiter:cmd_src_endofpacket -> cmd_demux:sink_endofpacket
916 
        wire          rsp_mux_src_valid;                                           // rsp_mux:src_valid -> hps_0_h2f_axi_master_wr_limiter:rsp_sink_valid
917 
        wire  [128:0] rsp_mux_src_data;                                            // rsp_mux:src_data -> hps_0_h2f_axi_master_wr_limiter:rsp_sink_data
918 
        wire          rsp_mux_src_ready;                                           // hps_0_h2f_axi_master_wr_limiter:rsp_sink_ready -> rsp_mux:src_ready
919 
        wire   [21:0] rsp_mux_src_channel;                                         // rsp_mux:src_channel -> hps_0_h2f_axi_master_wr_limiter:rsp_sink_channel
920 
        wire          rsp_mux_src_startofpacket;                                   // rsp_mux:src_startofpacket -> hps_0_h2f_axi_master_wr_limiter:rsp_sink_startofpacket
921 
        wire          rsp_mux_src_endofpacket;                                     // rsp_mux:src_endofpacket -> hps_0_h2f_axi_master_wr_limiter:rsp_sink_endofpacket
922 
        wire          hps_0_h2f_axi_master_wr_limiter_rsp_src_valid;               // hps_0_h2f_axi_master_wr_limiter:rsp_src_valid -> hps_0_h2f_axi_master_agent:write_rp_valid
923 
        wire  [128:0] hps_0_h2f_axi_master_wr_limiter_rsp_src_data;                // hps_0_h2f_axi_master_wr_limiter:rsp_src_data -> hps_0_h2f_axi_master_agent:write_rp_data
924 
        wire          hps_0_h2f_axi_master_wr_limiter_rsp_src_ready;               // hps_0_h2f_axi_master_agent:write_rp_ready -> hps_0_h2f_axi_master_wr_limiter:rsp_src_ready
925 
        wire   [21:0] hps_0_h2f_axi_master_wr_limiter_rsp_src_channel;             // hps_0_h2f_axi_master_wr_limiter:rsp_src_channel -> hps_0_h2f_axi_master_agent:write_rp_channel
926 
        wire          hps_0_h2f_axi_master_wr_limiter_rsp_src_startofpacket;       // hps_0_h2f_axi_master_wr_limiter:rsp_src_startofpacket -> hps_0_h2f_axi_master_agent:write_rp_startofpacket
927 
        wire          hps_0_h2f_axi_master_wr_limiter_rsp_src_endofpacket;         // hps_0_h2f_axi_master_wr_limiter:rsp_src_endofpacket -> hps_0_h2f_axi_master_agent:write_rp_endofpacket
928 
        wire          router_001_src_valid;                                        // router_001:src_valid -> hps_0_h2f_axi_master_rd_limiter:cmd_sink_valid
929 
        wire  [128:0] router_001_src_data;                                         // router_001:src_data -> hps_0_h2f_axi_master_rd_limiter:cmd_sink_data
930 
        wire          router_001_src_ready;                                        // hps_0_h2f_axi_master_rd_limiter:cmd_sink_ready -> router_001:src_ready
931 
        wire   [21:0] router_001_src_channel;                                      // router_001:src_channel -> hps_0_h2f_axi_master_rd_limiter:cmd_sink_channel
932 
        wire          router_001_src_startofpacket;                                // router_001:src_startofpacket -> hps_0_h2f_axi_master_rd_limiter:cmd_sink_startofpacket
933 
        wire          router_001_src_endofpacket;                                  // router_001:src_endofpacket -> hps_0_h2f_axi_master_rd_limiter:cmd_sink_endofpacket
934 
        wire  [128:0] hps_0_h2f_axi_master_rd_limiter_cmd_src_data;                // hps_0_h2f_axi_master_rd_limiter:cmd_src_data -> cmd_demux_001:sink_data
935 
        wire          hps_0_h2f_axi_master_rd_limiter_cmd_src_ready;               // cmd_demux_001:sink_ready -> hps_0_h2f_axi_master_rd_limiter:cmd_src_ready
936 
        wire   [21:0] hps_0_h2f_axi_master_rd_limiter_cmd_src_channel;             // hps_0_h2f_axi_master_rd_limiter:cmd_src_channel -> cmd_demux_001:sink_channel
937 
        wire          hps_0_h2f_axi_master_rd_limiter_cmd_src_startofpacket;       // hps_0_h2f_axi_master_rd_limiter:cmd_src_startofpacket -> cmd_demux_001:sink_startofpacket
938 
        wire          hps_0_h2f_axi_master_rd_limiter_cmd_src_endofpacket;         // hps_0_h2f_axi_master_rd_limiter:cmd_src_endofpacket -> cmd_demux_001:sink_endofpacket
939 
        wire          rsp_mux_001_src_valid;                                       // rsp_mux_001:src_valid -> hps_0_h2f_axi_master_rd_limiter:rsp_sink_valid
940 
        wire  [128:0] rsp_mux_001_src_data;                                        // rsp_mux_001:src_data -> hps_0_h2f_axi_master_rd_limiter:rsp_sink_data
941 
        wire          rsp_mux_001_src_ready;                                       // hps_0_h2f_axi_master_rd_limiter:rsp_sink_ready -> rsp_mux_001:src_ready
942 
        wire   [21:0] rsp_mux_001_src_channel;                                     // rsp_mux_001:src_channel -> hps_0_h2f_axi_master_rd_limiter:rsp_sink_channel
943 
        wire          rsp_mux_001_src_startofpacket;                               // rsp_mux_001:src_startofpacket -> hps_0_h2f_axi_master_rd_limiter:rsp_sink_startofpacket
944 
        wire          rsp_mux_001_src_endofpacket;                                 // rsp_mux_001:src_endofpacket -> hps_0_h2f_axi_master_rd_limiter:rsp_sink_endofpacket
945 
        wire          hps_0_h2f_axi_master_rd_limiter_rsp_src_valid;               // hps_0_h2f_axi_master_rd_limiter:rsp_src_valid -> hps_0_h2f_axi_master_agent:read_rp_valid
946 
        wire  [128:0] hps_0_h2f_axi_master_rd_limiter_rsp_src_data;                // hps_0_h2f_axi_master_rd_limiter:rsp_src_data -> hps_0_h2f_axi_master_agent:read_rp_data
947 
        wire          hps_0_h2f_axi_master_rd_limiter_rsp_src_ready;               // hps_0_h2f_axi_master_agent:read_rp_ready -> hps_0_h2f_axi_master_rd_limiter:rsp_src_ready
948 
        wire   [21:0] hps_0_h2f_axi_master_rd_limiter_rsp_src_channel;             // hps_0_h2f_axi_master_rd_limiter:rsp_src_channel -> hps_0_h2f_axi_master_agent:read_rp_channel
949 
        wire          hps_0_h2f_axi_master_rd_limiter_rsp_src_startofpacket;       // hps_0_h2f_axi_master_rd_limiter:rsp_src_startofpacket -> hps_0_h2f_axi_master_agent:read_rp_startofpacket
950 
        wire          hps_0_h2f_axi_master_rd_limiter_rsp_src_endofpacket;         // hps_0_h2f_axi_master_rd_limiter:rsp_src_endofpacket -> hps_0_h2f_axi_master_agent:read_rp_endofpacket
951 
        wire          cmd_mux_src_valid;                                           // cmd_mux:src_valid -> led_pio_test_s1_burst_adapter:sink0_valid
952 
        wire  [128:0] cmd_mux_src_data;                                            // cmd_mux:src_data -> led_pio_test_s1_burst_adapter:sink0_data
953 
        wire          cmd_mux_src_ready;                                           // led_pio_test_s1_burst_adapter:sink0_ready -> cmd_mux:src_ready
954 
        wire   [21:0] cmd_mux_src_channel;                                         // cmd_mux:src_channel -> led_pio_test_s1_burst_adapter:sink0_channel
955 
        wire          cmd_mux_src_startofpacket;                                   // cmd_mux:src_startofpacket -> led_pio_test_s1_burst_adapter:sink0_startofpacket
956 
        wire          cmd_mux_src_endofpacket;                                     // cmd_mux:src_endofpacket -> led_pio_test_s1_burst_adapter:sink0_endofpacket
957 
        wire          led_pio_test_s1_burst_adapter_source0_valid;                 // led_pio_test_s1_burst_adapter:source0_valid -> led_pio_test_s1_agent:cp_valid
958 
        wire  [128:0] led_pio_test_s1_burst_adapter_source0_data;                  // led_pio_test_s1_burst_adapter:source0_data -> led_pio_test_s1_agent:cp_data
959 
        wire          led_pio_test_s1_burst_adapter_source0_ready;                 // led_pio_test_s1_agent:cp_ready -> led_pio_test_s1_burst_adapter:source0_ready
960 
        wire   [21:0] led_pio_test_s1_burst_adapter_source0_channel;               // led_pio_test_s1_burst_adapter:source0_channel -> led_pio_test_s1_agent:cp_channel
961 
        wire          led_pio_test_s1_burst_adapter_source0_startofpacket;         // led_pio_test_s1_burst_adapter:source0_startofpacket -> led_pio_test_s1_agent:cp_startofpacket
962 
        wire          led_pio_test_s1_burst_adapter_source0_endofpacket;           // led_pio_test_s1_burst_adapter:source0_endofpacket -> led_pio_test_s1_agent:cp_endofpacket
963 
        wire          cmd_mux_001_src_valid;                                       // cmd_mux_001:src_valid -> timecode_rx_s1_burst_adapter:sink0_valid
964 
        wire  [128:0] cmd_mux_001_src_data;                                        // cmd_mux_001:src_data -> timecode_rx_s1_burst_adapter:sink0_data
965 
        wire          cmd_mux_001_src_ready;                                       // timecode_rx_s1_burst_adapter:sink0_ready -> cmd_mux_001:src_ready
966 
        wire   [21:0] cmd_mux_001_src_channel;                                     // cmd_mux_001:src_channel -> timecode_rx_s1_burst_adapter:sink0_channel
967 
        wire          cmd_mux_001_src_startofpacket;                               // cmd_mux_001:src_startofpacket -> timecode_rx_s1_burst_adapter:sink0_startofpacket
968 
        wire          cmd_mux_001_src_endofpacket;                                 // cmd_mux_001:src_endofpacket -> timecode_rx_s1_burst_adapter:sink0_endofpacket
969 
        wire          timecode_rx_s1_burst_adapter_source0_valid;                  // timecode_rx_s1_burst_adapter:source0_valid -> timecode_rx_s1_agent:cp_valid
970 
        wire  [128:0] timecode_rx_s1_burst_adapter_source0_data;                   // timecode_rx_s1_burst_adapter:source0_data -> timecode_rx_s1_agent:cp_data
971 
        wire          timecode_rx_s1_burst_adapter_source0_ready;                  // timecode_rx_s1_agent:cp_ready -> timecode_rx_s1_burst_adapter:source0_ready
972 
        wire   [21:0] timecode_rx_s1_burst_adapter_source0_channel;                // timecode_rx_s1_burst_adapter:source0_channel -> timecode_rx_s1_agent:cp_channel
973 
        wire          timecode_rx_s1_burst_adapter_source0_startofpacket;          // timecode_rx_s1_burst_adapter:source0_startofpacket -> timecode_rx_s1_agent:cp_startofpacket
974 
        wire          timecode_rx_s1_burst_adapter_source0_endofpacket;            // timecode_rx_s1_burst_adapter:source0_endofpacket -> timecode_rx_s1_agent:cp_endofpacket
975 
        wire          cmd_mux_002_src_valid;                                       // cmd_mux_002:src_valid -> timecode_ready_rx_s1_burst_adapter:sink0_valid
976 
        wire  [128:0] cmd_mux_002_src_data;                                        // cmd_mux_002:src_data -> timecode_ready_rx_s1_burst_adapter:sink0_data
977 
        wire          cmd_mux_002_src_ready;                                       // timecode_ready_rx_s1_burst_adapter:sink0_ready -> cmd_mux_002:src_ready
978 
        wire   [21:0] cmd_mux_002_src_channel;                                     // cmd_mux_002:src_channel -> timecode_ready_rx_s1_burst_adapter:sink0_channel
979 
        wire          cmd_mux_002_src_startofpacket;                               // cmd_mux_002:src_startofpacket -> timecode_ready_rx_s1_burst_adapter:sink0_startofpacket
980 
        wire          cmd_mux_002_src_endofpacket;                                 // cmd_mux_002:src_endofpacket -> timecode_ready_rx_s1_burst_adapter:sink0_endofpacket
981 
        wire          timecode_ready_rx_s1_burst_adapter_source0_valid;            // timecode_ready_rx_s1_burst_adapter:source0_valid -> timecode_ready_rx_s1_agent:cp_valid
982 
        wire  [128:0] timecode_ready_rx_s1_burst_adapter_source0_data;             // timecode_ready_rx_s1_burst_adapter:source0_data -> timecode_ready_rx_s1_agent:cp_data
983 
        wire          timecode_ready_rx_s1_burst_adapter_source0_ready;            // timecode_ready_rx_s1_agent:cp_ready -> timecode_ready_rx_s1_burst_adapter:source0_ready
984 
        wire   [21:0] timecode_ready_rx_s1_burst_adapter_source0_channel;          // timecode_ready_rx_s1_burst_adapter:source0_channel -> timecode_ready_rx_s1_agent:cp_channel
985 
        wire          timecode_ready_rx_s1_burst_adapter_source0_startofpacket;    // timecode_ready_rx_s1_burst_adapter:source0_startofpacket -> timecode_ready_rx_s1_agent:cp_startofpacket
986 
        wire          timecode_ready_rx_s1_burst_adapter_source0_endofpacket;      // timecode_ready_rx_s1_burst_adapter:source0_endofpacket -> timecode_ready_rx_s1_agent:cp_endofpacket
987 
        wire          cmd_mux_003_src_valid;                                       // cmd_mux_003:src_valid -> data_flag_rx_s1_burst_adapter:sink0_valid
988 
        wire  [128:0] cmd_mux_003_src_data;                                        // cmd_mux_003:src_data -> data_flag_rx_s1_burst_adapter:sink0_data
989 
        wire          cmd_mux_003_src_ready;                                       // data_flag_rx_s1_burst_adapter:sink0_ready -> cmd_mux_003:src_ready
990 
        wire   [21:0] cmd_mux_003_src_channel;                                     // cmd_mux_003:src_channel -> data_flag_rx_s1_burst_adapter:sink0_channel
991 
        wire          cmd_mux_003_src_startofpacket;                               // cmd_mux_003:src_startofpacket -> data_flag_rx_s1_burst_adapter:sink0_startofpacket
992 
        wire          cmd_mux_003_src_endofpacket;                                 // cmd_mux_003:src_endofpacket -> data_flag_rx_s1_burst_adapter:sink0_endofpacket
993 
        wire          data_flag_rx_s1_burst_adapter_source0_valid;                 // data_flag_rx_s1_burst_adapter:source0_valid -> data_flag_rx_s1_agent:cp_valid
994 
        wire  [128:0] data_flag_rx_s1_burst_adapter_source0_data;                  // data_flag_rx_s1_burst_adapter:source0_data -> data_flag_rx_s1_agent:cp_data
995 
        wire          data_flag_rx_s1_burst_adapter_source0_ready;                 // data_flag_rx_s1_agent:cp_ready -> data_flag_rx_s1_burst_adapter:source0_ready
996 
        wire   [21:0] data_flag_rx_s1_burst_adapter_source0_channel;               // data_flag_rx_s1_burst_adapter:source0_channel -> data_flag_rx_s1_agent:cp_channel
997 
        wire          data_flag_rx_s1_burst_adapter_source0_startofpacket;         // data_flag_rx_s1_burst_adapter:source0_startofpacket -> data_flag_rx_s1_agent:cp_startofpacket
998 
        wire          data_flag_rx_s1_burst_adapter_source0_endofpacket;           // data_flag_rx_s1_burst_adapter:source0_endofpacket -> data_flag_rx_s1_agent:cp_endofpacket
999 
        wire          cmd_mux_004_src_valid;                                       // cmd_mux_004:src_valid -> data_read_en_rx_s1_burst_adapter:sink0_valid
1000 
        wire  [128:0] cmd_mux_004_src_data;                                        // cmd_mux_004:src_data -> data_read_en_rx_s1_burst_adapter:sink0_data
1001 
        wire          cmd_mux_004_src_ready;                                       // data_read_en_rx_s1_burst_adapter:sink0_ready -> cmd_mux_004:src_ready
1002 
        wire   [21:0] cmd_mux_004_src_channel;                                     // cmd_mux_004:src_channel -> data_read_en_rx_s1_burst_adapter:sink0_channel
1003 
        wire          cmd_mux_004_src_startofpacket;                               // cmd_mux_004:src_startofpacket -> data_read_en_rx_s1_burst_adapter:sink0_startofpacket
1004 
        wire          cmd_mux_004_src_endofpacket;                                 // cmd_mux_004:src_endofpacket -> data_read_en_rx_s1_burst_adapter:sink0_endofpacket
1005 
        wire          data_read_en_rx_s1_burst_adapter_source0_valid;              // data_read_en_rx_s1_burst_adapter:source0_valid -> data_read_en_rx_s1_agent:cp_valid
1006 
        wire  [128:0] data_read_en_rx_s1_burst_adapter_source0_data;               // data_read_en_rx_s1_burst_adapter:source0_data -> data_read_en_rx_s1_agent:cp_data
1007 
        wire          data_read_en_rx_s1_burst_adapter_source0_ready;              // data_read_en_rx_s1_agent:cp_ready -> data_read_en_rx_s1_burst_adapter:source0_ready
1008 
        wire   [21:0] data_read_en_rx_s1_burst_adapter_source0_channel;            // data_read_en_rx_s1_burst_adapter:source0_channel -> data_read_en_rx_s1_agent:cp_channel
1009 
        wire          data_read_en_rx_s1_burst_adapter_source0_startofpacket;      // data_read_en_rx_s1_burst_adapter:source0_startofpacket -> data_read_en_rx_s1_agent:cp_startofpacket
1010 
        wire          data_read_en_rx_s1_burst_adapter_source0_endofpacket;        // data_read_en_rx_s1_burst_adapter:source0_endofpacket -> data_read_en_rx_s1_agent:cp_endofpacket
1011 
        wire          cmd_mux_005_src_valid;                                       // cmd_mux_005:src_valid -> fifo_full_rx_status_s1_burst_adapter:sink0_valid
1012 
        wire  [128:0] cmd_mux_005_src_data;                                        // cmd_mux_005:src_data -> fifo_full_rx_status_s1_burst_adapter:sink0_data
1013 
        wire          cmd_mux_005_src_ready;                                       // fifo_full_rx_status_s1_burst_adapter:sink0_ready -> cmd_mux_005:src_ready
1014 
        wire   [21:0] cmd_mux_005_src_channel;                                     // cmd_mux_005:src_channel -> fifo_full_rx_status_s1_burst_adapter:sink0_channel
1015 
        wire          cmd_mux_005_src_startofpacket;                               // cmd_mux_005:src_startofpacket -> fifo_full_rx_status_s1_burst_adapter:sink0_startofpacket
1016 
        wire          cmd_mux_005_src_endofpacket;                                 // cmd_mux_005:src_endofpacket -> fifo_full_rx_status_s1_burst_adapter:sink0_endofpacket
1017 
        wire          fifo_full_rx_status_s1_burst_adapter_source0_valid;          // fifo_full_rx_status_s1_burst_adapter:source0_valid -> fifo_full_rx_status_s1_agent:cp_valid
1018 
        wire  [128:0] fifo_full_rx_status_s1_burst_adapter_source0_data;           // fifo_full_rx_status_s1_burst_adapter:source0_data -> fifo_full_rx_status_s1_agent:cp_data
1019 
        wire          fifo_full_rx_status_s1_burst_adapter_source0_ready;          // fifo_full_rx_status_s1_agent:cp_ready -> fifo_full_rx_status_s1_burst_adapter:source0_ready
1020 
        wire   [21:0] fifo_full_rx_status_s1_burst_adapter_source0_channel;        // fifo_full_rx_status_s1_burst_adapter:source0_channel -> fifo_full_rx_status_s1_agent:cp_channel
1021 
        wire          fifo_full_rx_status_s1_burst_adapter_source0_startofpacket;  // fifo_full_rx_status_s1_burst_adapter:source0_startofpacket -> fifo_full_rx_status_s1_agent:cp_startofpacket
1022 
        wire          fifo_full_rx_status_s1_burst_adapter_source0_endofpacket;    // fifo_full_rx_status_s1_burst_adapter:source0_endofpacket -> fifo_full_rx_status_s1_agent:cp_endofpacket
1023 
        wire          cmd_mux_006_src_valid;                                       // cmd_mux_006:src_valid -> fifo_empty_rx_status_s1_burst_adapter:sink0_valid
1024 
        wire  [128:0] cmd_mux_006_src_data;                                        // cmd_mux_006:src_data -> fifo_empty_rx_status_s1_burst_adapter:sink0_data
1025 
        wire          cmd_mux_006_src_ready;                                       // fifo_empty_rx_status_s1_burst_adapter:sink0_ready -> cmd_mux_006:src_ready
1026 
        wire   [21:0] cmd_mux_006_src_channel;                                     // cmd_mux_006:src_channel -> fifo_empty_rx_status_s1_burst_adapter:sink0_channel
1027 
        wire          cmd_mux_006_src_startofpacket;                               // cmd_mux_006:src_startofpacket -> fifo_empty_rx_status_s1_burst_adapter:sink0_startofpacket
1028 
        wire          cmd_mux_006_src_endofpacket;                                 // cmd_mux_006:src_endofpacket -> fifo_empty_rx_status_s1_burst_adapter:sink0_endofpacket
1029 
        wire          fifo_empty_rx_status_s1_burst_adapter_source0_valid;         // fifo_empty_rx_status_s1_burst_adapter:source0_valid -> fifo_empty_rx_status_s1_agent:cp_valid
1030 
        wire  [128:0] fifo_empty_rx_status_s1_burst_adapter_source0_data;          // fifo_empty_rx_status_s1_burst_adapter:source0_data -> fifo_empty_rx_status_s1_agent:cp_data
1031 
        wire          fifo_empty_rx_status_s1_burst_adapter_source0_ready;         // fifo_empty_rx_status_s1_agent:cp_ready -> fifo_empty_rx_status_s1_burst_adapter:source0_ready
1032 
        wire   [21:0] fifo_empty_rx_status_s1_burst_adapter_source0_channel;       // fifo_empty_rx_status_s1_burst_adapter:source0_channel -> fifo_empty_rx_status_s1_agent:cp_channel
1033 
        wire          fifo_empty_rx_status_s1_burst_adapter_source0_startofpacket; // fifo_empty_rx_status_s1_burst_adapter:source0_startofpacket -> fifo_empty_rx_status_s1_agent:cp_startofpacket
1034 
        wire          fifo_empty_rx_status_s1_burst_adapter_source0_endofpacket;   // fifo_empty_rx_status_s1_burst_adapter:source0_endofpacket -> fifo_empty_rx_status_s1_agent:cp_endofpacket
1035 
        wire          cmd_mux_007_src_valid;                                       // cmd_mux_007:src_valid -> link_start_s1_burst_adapter:sink0_valid
1036 
        wire  [128:0] cmd_mux_007_src_data;                                        // cmd_mux_007:src_data -> link_start_s1_burst_adapter:sink0_data
1037 
        wire          cmd_mux_007_src_ready;                                       // link_start_s1_burst_adapter:sink0_ready -> cmd_mux_007:src_ready
1038 
        wire   [21:0] cmd_mux_007_src_channel;                                     // cmd_mux_007:src_channel -> link_start_s1_burst_adapter:sink0_channel
1039 
        wire          cmd_mux_007_src_startofpacket;                               // cmd_mux_007:src_startofpacket -> link_start_s1_burst_adapter:sink0_startofpacket
1040 
        wire          cmd_mux_007_src_endofpacket;                                 // cmd_mux_007:src_endofpacket -> link_start_s1_burst_adapter:sink0_endofpacket
1041 
        wire          link_start_s1_burst_adapter_source0_valid;                   // link_start_s1_burst_adapter:source0_valid -> link_start_s1_agent:cp_valid
1042 
        wire  [128:0] link_start_s1_burst_adapter_source0_data;                    // link_start_s1_burst_adapter:source0_data -> link_start_s1_agent:cp_data
1043 
        wire          link_start_s1_burst_adapter_source0_ready;                   // link_start_s1_agent:cp_ready -> link_start_s1_burst_adapter:source0_ready
1044 
        wire   [21:0] link_start_s1_burst_adapter_source0_channel;                 // link_start_s1_burst_adapter:source0_channel -> link_start_s1_agent:cp_channel
1045 
        wire          link_start_s1_burst_adapter_source0_startofpacket;           // link_start_s1_burst_adapter:source0_startofpacket -> link_start_s1_agent:cp_startofpacket
1046 
        wire          link_start_s1_burst_adapter_source0_endofpacket;             // link_start_s1_burst_adapter:source0_endofpacket -> link_start_s1_agent:cp_endofpacket
1047 
        wire          cmd_mux_008_src_valid;                                       // cmd_mux_008:src_valid -> auto_start_s1_burst_adapter:sink0_valid
1048 
        wire  [128:0] cmd_mux_008_src_data;                                        // cmd_mux_008:src_data -> auto_start_s1_burst_adapter:sink0_data
1049 
        wire          cmd_mux_008_src_ready;                                       // auto_start_s1_burst_adapter:sink0_ready -> cmd_mux_008:src_ready
1050 
        wire   [21:0] cmd_mux_008_src_channel;                                     // cmd_mux_008:src_channel -> auto_start_s1_burst_adapter:sink0_channel
1051 
        wire          cmd_mux_008_src_startofpacket;                               // cmd_mux_008:src_startofpacket -> auto_start_s1_burst_adapter:sink0_startofpacket
1052 
        wire          cmd_mux_008_src_endofpacket;                                 // cmd_mux_008:src_endofpacket -> auto_start_s1_burst_adapter:sink0_endofpacket
1053 
        wire          auto_start_s1_burst_adapter_source0_valid;                   // auto_start_s1_burst_adapter:source0_valid -> auto_start_s1_agent:cp_valid
1054 
        wire  [128:0] auto_start_s1_burst_adapter_source0_data;                    // auto_start_s1_burst_adapter:source0_data -> auto_start_s1_agent:cp_data
1055 
        wire          auto_start_s1_burst_adapter_source0_ready;                   // auto_start_s1_agent:cp_ready -> auto_start_s1_burst_adapter:source0_ready
1056 
        wire   [21:0] auto_start_s1_burst_adapter_source0_channel;                 // auto_start_s1_burst_adapter:source0_channel -> auto_start_s1_agent:cp_channel
1057 
        wire          auto_start_s1_burst_adapter_source0_startofpacket;           // auto_start_s1_burst_adapter:source0_startofpacket -> auto_start_s1_agent:cp_startofpacket
1058 
        wire          auto_start_s1_burst_adapter_source0_endofpacket;             // auto_start_s1_burst_adapter:source0_endofpacket -> auto_start_s1_agent:cp_endofpacket
1059 
        wire          cmd_mux_009_src_valid;                                       // cmd_mux_009:src_valid -> link_disable_s1_burst_adapter:sink0_valid
1060 
        wire  [128:0] cmd_mux_009_src_data;                                        // cmd_mux_009:src_data -> link_disable_s1_burst_adapter:sink0_data
1061 
        wire          cmd_mux_009_src_ready;                                       // link_disable_s1_burst_adapter:sink0_ready -> cmd_mux_009:src_ready
1062 
        wire   [21:0] cmd_mux_009_src_channel;                                     // cmd_mux_009:src_channel -> link_disable_s1_burst_adapter:sink0_channel
1063 
        wire          cmd_mux_009_src_startofpacket;                               // cmd_mux_009:src_startofpacket -> link_disable_s1_burst_adapter:sink0_startofpacket
1064 
        wire          cmd_mux_009_src_endofpacket;                                 // cmd_mux_009:src_endofpacket -> link_disable_s1_burst_adapter:sink0_endofpacket
1065 
        wire          link_disable_s1_burst_adapter_source0_valid;                 // link_disable_s1_burst_adapter:source0_valid -> link_disable_s1_agent:cp_valid
1066 
        wire  [128:0] link_disable_s1_burst_adapter_source0_data;                  // link_disable_s1_burst_adapter:source0_data -> link_disable_s1_agent:cp_data
1067 
        wire          link_disable_s1_burst_adapter_source0_ready;                 // link_disable_s1_agent:cp_ready -> link_disable_s1_burst_adapter:source0_ready
1068 
        wire   [21:0] link_disable_s1_burst_adapter_source0_channel;               // link_disable_s1_burst_adapter:source0_channel -> link_disable_s1_agent:cp_channel
1069 
        wire          link_disable_s1_burst_adapter_source0_startofpacket;         // link_disable_s1_burst_adapter:source0_startofpacket -> link_disable_s1_agent:cp_startofpacket
1070 
        wire          link_disable_s1_burst_adapter_source0_endofpacket;           // link_disable_s1_burst_adapter:source0_endofpacket -> link_disable_s1_agent:cp_endofpacket
1071 
        wire          cmd_mux_010_src_valid;                                       // cmd_mux_010:src_valid -> write_data_fifo_tx_s1_burst_adapter:sink0_valid
1072 
        wire  [128:0] cmd_mux_010_src_data;                                        // cmd_mux_010:src_data -> write_data_fifo_tx_s1_burst_adapter:sink0_data
1073 
        wire          cmd_mux_010_src_ready;                                       // write_data_fifo_tx_s1_burst_adapter:sink0_ready -> cmd_mux_010:src_ready
1074 
        wire   [21:0] cmd_mux_010_src_channel;                                     // cmd_mux_010:src_channel -> write_data_fifo_tx_s1_burst_adapter:sink0_channel
1075 
        wire          cmd_mux_010_src_startofpacket;                               // cmd_mux_010:src_startofpacket -> write_data_fifo_tx_s1_burst_adapter:sink0_startofpacket
1076 
        wire          cmd_mux_010_src_endofpacket;                                 // cmd_mux_010:src_endofpacket -> write_data_fifo_tx_s1_burst_adapter:sink0_endofpacket
1077 
        wire          write_data_fifo_tx_s1_burst_adapter_source0_valid;           // write_data_fifo_tx_s1_burst_adapter:source0_valid -> write_data_fifo_tx_s1_agent:cp_valid
1078 
        wire  [128:0] write_data_fifo_tx_s1_burst_adapter_source0_data;            // write_data_fifo_tx_s1_burst_adapter:source0_data -> write_data_fifo_tx_s1_agent:cp_data
1079 
        wire          write_data_fifo_tx_s1_burst_adapter_source0_ready;           // write_data_fifo_tx_s1_agent:cp_ready -> write_data_fifo_tx_s1_burst_adapter:source0_ready
1080 
        wire   [21:0] write_data_fifo_tx_s1_burst_adapter_source0_channel;         // write_data_fifo_tx_s1_burst_adapter:source0_channel -> write_data_fifo_tx_s1_agent:cp_channel
1081 
        wire          write_data_fifo_tx_s1_burst_adapter_source0_startofpacket;   // write_data_fifo_tx_s1_burst_adapter:source0_startofpacket -> write_data_fifo_tx_s1_agent:cp_startofpacket
1082 
        wire          write_data_fifo_tx_s1_burst_adapter_source0_endofpacket;     // write_data_fifo_tx_s1_burst_adapter:source0_endofpacket -> write_data_fifo_tx_s1_agent:cp_endofpacket
1083 
        wire          cmd_mux_011_src_valid;                                       // cmd_mux_011:src_valid -> write_en_tx_s1_burst_adapter:sink0_valid
1084 
        wire  [128:0] cmd_mux_011_src_data;                                        // cmd_mux_011:src_data -> write_en_tx_s1_burst_adapter:sink0_data
1085 
        wire          cmd_mux_011_src_ready;                                       // write_en_tx_s1_burst_adapter:sink0_ready -> cmd_mux_011:src_ready
1086 
        wire   [21:0] cmd_mux_011_src_channel;                                     // cmd_mux_011:src_channel -> write_en_tx_s1_burst_adapter:sink0_channel
1087 
        wire          cmd_mux_011_src_startofpacket;                               // cmd_mux_011:src_startofpacket -> write_en_tx_s1_burst_adapter:sink0_startofpacket
1088 
        wire          cmd_mux_011_src_endofpacket;                                 // cmd_mux_011:src_endofpacket -> write_en_tx_s1_burst_adapter:sink0_endofpacket
1089 
        wire          write_en_tx_s1_burst_adapter_source0_valid;                  // write_en_tx_s1_burst_adapter:source0_valid -> write_en_tx_s1_agent:cp_valid
1090 
        wire  [128:0] write_en_tx_s1_burst_adapter_source0_data;                   // write_en_tx_s1_burst_adapter:source0_data -> write_en_tx_s1_agent:cp_data
1091 
        wire          write_en_tx_s1_burst_adapter_source0_ready;                  // write_en_tx_s1_agent:cp_ready -> write_en_tx_s1_burst_adapter:source0_ready
1092 
        wire   [21:0] write_en_tx_s1_burst_adapter_source0_channel;                // write_en_tx_s1_burst_adapter:source0_channel -> write_en_tx_s1_agent:cp_channel
1093 
        wire          write_en_tx_s1_burst_adapter_source0_startofpacket;          // write_en_tx_s1_burst_adapter:source0_startofpacket -> write_en_tx_s1_agent:cp_startofpacket
1094 
        wire          write_en_tx_s1_burst_adapter_source0_endofpacket;            // write_en_tx_s1_burst_adapter:source0_endofpacket -> write_en_tx_s1_agent:cp_endofpacket
1095 
        wire          cmd_mux_012_src_valid;                                       // cmd_mux_012:src_valid -> fifo_full_tx_status_s1_burst_adapter:sink0_valid
1096 
        wire  [128:0] cmd_mux_012_src_data;                                        // cmd_mux_012:src_data -> fifo_full_tx_status_s1_burst_adapter:sink0_data
1097 
        wire          cmd_mux_012_src_ready;                                       // fifo_full_tx_status_s1_burst_adapter:sink0_ready -> cmd_mux_012:src_ready
1098 
        wire   [21:0] cmd_mux_012_src_channel;                                     // cmd_mux_012:src_channel -> fifo_full_tx_status_s1_burst_adapter:sink0_channel
1099 
        wire          cmd_mux_012_src_startofpacket;                               // cmd_mux_012:src_startofpacket -> fifo_full_tx_status_s1_burst_adapter:sink0_startofpacket
1100 
        wire          cmd_mux_012_src_endofpacket;                                 // cmd_mux_012:src_endofpacket -> fifo_full_tx_status_s1_burst_adapter:sink0_endofpacket
1101 
        wire          fifo_full_tx_status_s1_burst_adapter_source0_valid;          // fifo_full_tx_status_s1_burst_adapter:source0_valid -> fifo_full_tx_status_s1_agent:cp_valid
1102 
        wire  [128:0] fifo_full_tx_status_s1_burst_adapter_source0_data;           // fifo_full_tx_status_s1_burst_adapter:source0_data -> fifo_full_tx_status_s1_agent:cp_data
1103 
        wire          fifo_full_tx_status_s1_burst_adapter_source0_ready;          // fifo_full_tx_status_s1_agent:cp_ready -> fifo_full_tx_status_s1_burst_adapter:source0_ready
1104 
        wire   [21:0] fifo_full_tx_status_s1_burst_adapter_source0_channel;        // fifo_full_tx_status_s1_burst_adapter:source0_channel -> fifo_full_tx_status_s1_agent:cp_channel
1105 
        wire          fifo_full_tx_status_s1_burst_adapter_source0_startofpacket;  // fifo_full_tx_status_s1_burst_adapter:source0_startofpacket -> fifo_full_tx_status_s1_agent:cp_startofpacket
1106 
        wire          fifo_full_tx_status_s1_burst_adapter_source0_endofpacket;    // fifo_full_tx_status_s1_burst_adapter:source0_endofpacket -> fifo_full_tx_status_s1_agent:cp_endofpacket
1107 
        wire          cmd_mux_013_src_valid;                                       // cmd_mux_013:src_valid -> fifo_empty_tx_status_s1_burst_adapter:sink0_valid
1108 
        wire  [128:0] cmd_mux_013_src_data;                                        // cmd_mux_013:src_data -> fifo_empty_tx_status_s1_burst_adapter:sink0_data
1109 
        wire          cmd_mux_013_src_ready;                                       // fifo_empty_tx_status_s1_burst_adapter:sink0_ready -> cmd_mux_013:src_ready
1110 
        wire   [21:0] cmd_mux_013_src_channel;                                     // cmd_mux_013:src_channel -> fifo_empty_tx_status_s1_burst_adapter:sink0_channel
1111 
        wire          cmd_mux_013_src_startofpacket;                               // cmd_mux_013:src_startofpacket -> fifo_empty_tx_status_s1_burst_adapter:sink0_startofpacket
1112 
        wire          cmd_mux_013_src_endofpacket;                                 // cmd_mux_013:src_endofpacket -> fifo_empty_tx_status_s1_burst_adapter:sink0_endofpacket
1113 
        wire          fifo_empty_tx_status_s1_burst_adapter_source0_valid;         // fifo_empty_tx_status_s1_burst_adapter:source0_valid -> fifo_empty_tx_status_s1_agent:cp_valid
1114 
        wire  [128:0] fifo_empty_tx_status_s1_burst_adapter_source0_data;          // fifo_empty_tx_status_s1_burst_adapter:source0_data -> fifo_empty_tx_status_s1_agent:cp_data
1115 
        wire          fifo_empty_tx_status_s1_burst_adapter_source0_ready;         // fifo_empty_tx_status_s1_agent:cp_ready -> fifo_empty_tx_status_s1_burst_adapter:source0_ready
1116 
        wire   [21:0] fifo_empty_tx_status_s1_burst_adapter_source0_channel;       // fifo_empty_tx_status_s1_burst_adapter:source0_channel -> fifo_empty_tx_status_s1_agent:cp_channel
1117 
        wire          fifo_empty_tx_status_s1_burst_adapter_source0_startofpacket; // fifo_empty_tx_status_s1_burst_adapter:source0_startofpacket -> fifo_empty_tx_status_s1_agent:cp_startofpacket
1118 
        wire          fifo_empty_tx_status_s1_burst_adapter_source0_endofpacket;   // fifo_empty_tx_status_s1_burst_adapter:source0_endofpacket -> fifo_empty_tx_status_s1_agent:cp_endofpacket
1119 
        wire          cmd_mux_014_src_valid;                                       // cmd_mux_014:src_valid -> timecode_tx_data_s1_burst_adapter:sink0_valid
1120 
        wire  [128:0] cmd_mux_014_src_data;                                        // cmd_mux_014:src_data -> timecode_tx_data_s1_burst_adapter:sink0_data
1121 
        wire          cmd_mux_014_src_ready;                                       // timecode_tx_data_s1_burst_adapter:sink0_ready -> cmd_mux_014:src_ready
1122 
        wire   [21:0] cmd_mux_014_src_channel;                                     // cmd_mux_014:src_channel -> timecode_tx_data_s1_burst_adapter:sink0_channel
1123 
        wire          cmd_mux_014_src_startofpacket;                               // cmd_mux_014:src_startofpacket -> timecode_tx_data_s1_burst_adapter:sink0_startofpacket
1124 
        wire          cmd_mux_014_src_endofpacket;                                 // cmd_mux_014:src_endofpacket -> timecode_tx_data_s1_burst_adapter:sink0_endofpacket
1125 
        wire          timecode_tx_data_s1_burst_adapter_source0_valid;             // timecode_tx_data_s1_burst_adapter:source0_valid -> timecode_tx_data_s1_agent:cp_valid
1126 
        wire  [128:0] timecode_tx_data_s1_burst_adapter_source0_data;              // timecode_tx_data_s1_burst_adapter:source0_data -> timecode_tx_data_s1_agent:cp_data
1127 
        wire          timecode_tx_data_s1_burst_adapter_source0_ready;             // timecode_tx_data_s1_agent:cp_ready -> timecode_tx_data_s1_burst_adapter:source0_ready
1128 
        wire   [21:0] timecode_tx_data_s1_burst_adapter_source0_channel;           // timecode_tx_data_s1_burst_adapter:source0_channel -> timecode_tx_data_s1_agent:cp_channel
1129 
        wire          timecode_tx_data_s1_burst_adapter_source0_startofpacket;     // timecode_tx_data_s1_burst_adapter:source0_startofpacket -> timecode_tx_data_s1_agent:cp_startofpacket
1130 
        wire          timecode_tx_data_s1_burst_adapter_source0_endofpacket;       // timecode_tx_data_s1_burst_adapter:source0_endofpacket -> timecode_tx_data_s1_agent:cp_endofpacket
1131 
        wire          cmd_mux_015_src_valid;                                       // cmd_mux_015:src_valid -> timecode_tx_enable_s1_burst_adapter:sink0_valid
1132 
        wire  [128:0] cmd_mux_015_src_data;                                        // cmd_mux_015:src_data -> timecode_tx_enable_s1_burst_adapter:sink0_data
1133 
        wire          cmd_mux_015_src_ready;                                       // timecode_tx_enable_s1_burst_adapter:sink0_ready -> cmd_mux_015:src_ready
1134 
        wire   [21:0] cmd_mux_015_src_channel;                                     // cmd_mux_015:src_channel -> timecode_tx_enable_s1_burst_adapter:sink0_channel
1135 
        wire          cmd_mux_015_src_startofpacket;                               // cmd_mux_015:src_startofpacket -> timecode_tx_enable_s1_burst_adapter:sink0_startofpacket
1136 
        wire          cmd_mux_015_src_endofpacket;                                 // cmd_mux_015:src_endofpacket -> timecode_tx_enable_s1_burst_adapter:sink0_endofpacket
1137 
        wire          timecode_tx_enable_s1_burst_adapter_source0_valid;           // timecode_tx_enable_s1_burst_adapter:source0_valid -> timecode_tx_enable_s1_agent:cp_valid
1138 
        wire  [128:0] timecode_tx_enable_s1_burst_adapter_source0_data;            // timecode_tx_enable_s1_burst_adapter:source0_data -> timecode_tx_enable_s1_agent:cp_data
1139 
        wire          timecode_tx_enable_s1_burst_adapter_source0_ready;           // timecode_tx_enable_s1_agent:cp_ready -> timecode_tx_enable_s1_burst_adapter:source0_ready
1140 
        wire   [21:0] timecode_tx_enable_s1_burst_adapter_source0_channel;         // timecode_tx_enable_s1_burst_adapter:source0_channel -> timecode_tx_enable_s1_agent:cp_channel
1141 
        wire          timecode_tx_enable_s1_burst_adapter_source0_startofpacket;   // timecode_tx_enable_s1_burst_adapter:source0_startofpacket -> timecode_tx_enable_s1_agent:cp_startofpacket
1142 
        wire          timecode_tx_enable_s1_burst_adapter_source0_endofpacket;     // timecode_tx_enable_s1_burst_adapter:source0_endofpacket -> timecode_tx_enable_s1_agent:cp_endofpacket
1143 
        wire          cmd_mux_016_src_valid;                                       // cmd_mux_016:src_valid -> timecode_tx_ready_s1_burst_adapter:sink0_valid
1144 
        wire  [128:0] cmd_mux_016_src_data;                                        // cmd_mux_016:src_data -> timecode_tx_ready_s1_burst_adapter:sink0_data
1145 
        wire          cmd_mux_016_src_ready;                                       // timecode_tx_ready_s1_burst_adapter:sink0_ready -> cmd_mux_016:src_ready
1146 
        wire   [21:0] cmd_mux_016_src_channel;                                     // cmd_mux_016:src_channel -> timecode_tx_ready_s1_burst_adapter:sink0_channel
1147 
        wire          cmd_mux_016_src_startofpacket;                               // cmd_mux_016:src_startofpacket -> timecode_tx_ready_s1_burst_adapter:sink0_startofpacket
1148 
        wire          cmd_mux_016_src_endofpacket;                                 // cmd_mux_016:src_endofpacket -> timecode_tx_ready_s1_burst_adapter:sink0_endofpacket
1149 
        wire          timecode_tx_ready_s1_burst_adapter_source0_valid;            // timecode_tx_ready_s1_burst_adapter:source0_valid -> timecode_tx_ready_s1_agent:cp_valid
1150 
        wire  [128:0] timecode_tx_ready_s1_burst_adapter_source0_data;             // timecode_tx_ready_s1_burst_adapter:source0_data -> timecode_tx_ready_s1_agent:cp_data
1151 
        wire          timecode_tx_ready_s1_burst_adapter_source0_ready;            // timecode_tx_ready_s1_agent:cp_ready -> timecode_tx_ready_s1_burst_adapter:source0_ready
1152 
        wire   [21:0] timecode_tx_ready_s1_burst_adapter_source0_channel;          // timecode_tx_ready_s1_burst_adapter:source0_channel -> timecode_tx_ready_s1_agent:cp_channel
1153 
        wire          timecode_tx_ready_s1_burst_adapter_source0_startofpacket;    // timecode_tx_ready_s1_burst_adapter:source0_startofpacket -> timecode_tx_ready_s1_agent:cp_startofpacket
1154 
        wire          timecode_tx_ready_s1_burst_adapter_source0_endofpacket;      // timecode_tx_ready_s1_burst_adapter:source0_endofpacket -> timecode_tx_ready_s1_agent:cp_endofpacket
1155 
        wire          cmd_mux_017_src_valid;                                       // cmd_mux_017:src_valid -> data_info_s1_burst_adapter:sink0_valid
1156 
        wire  [128:0] cmd_mux_017_src_data;                                        // cmd_mux_017:src_data -> data_info_s1_burst_adapter:sink0_data
1157 
        wire          cmd_mux_017_src_ready;                                       // data_info_s1_burst_adapter:sink0_ready -> cmd_mux_017:src_ready
1158 
        wire   [21:0] cmd_mux_017_src_channel;                                     // cmd_mux_017:src_channel -> data_info_s1_burst_adapter:sink0_channel
1159 
        wire          cmd_mux_017_src_startofpacket;                               // cmd_mux_017:src_startofpacket -> data_info_s1_burst_adapter:sink0_startofpacket
1160 
        wire          cmd_mux_017_src_endofpacket;                                 // cmd_mux_017:src_endofpacket -> data_info_s1_burst_adapter:sink0_endofpacket
1161 
        wire          data_info_s1_burst_adapter_source0_valid;                    // data_info_s1_burst_adapter:source0_valid -> data_info_s1_agent:cp_valid
1162 
        wire  [128:0] data_info_s1_burst_adapter_source0_data;                     // data_info_s1_burst_adapter:source0_data -> data_info_s1_agent:cp_data
1163 
        wire          data_info_s1_burst_adapter_source0_ready;                    // data_info_s1_agent:cp_ready -> data_info_s1_burst_adapter:source0_ready
1164 
        wire   [21:0] data_info_s1_burst_adapter_source0_channel;                  // data_info_s1_burst_adapter:source0_channel -> data_info_s1_agent:cp_channel
1165 
        wire          data_info_s1_burst_adapter_source0_startofpacket;            // data_info_s1_burst_adapter:source0_startofpacket -> data_info_s1_agent:cp_startofpacket
1166 
        wire          data_info_s1_burst_adapter_source0_endofpacket;              // data_info_s1_burst_adapter:source0_endofpacket -> data_info_s1_agent:cp_endofpacket
1167 
        wire          cmd_mux_018_src_valid;                                       // cmd_mux_018:src_valid -> clock_sel_s1_burst_adapter:sink0_valid
1168 
        wire  [128:0] cmd_mux_018_src_data;                                        // cmd_mux_018:src_data -> clock_sel_s1_burst_adapter:sink0_data
1169 
        wire          cmd_mux_018_src_ready;                                       // clock_sel_s1_burst_adapter:sink0_ready -> cmd_mux_018:src_ready
1170 
        wire   [21:0] cmd_mux_018_src_channel;                                     // cmd_mux_018:src_channel -> clock_sel_s1_burst_adapter:sink0_channel
1171 
        wire          cmd_mux_018_src_startofpacket;                               // cmd_mux_018:src_startofpacket -> clock_sel_s1_burst_adapter:sink0_startofpacket
1172 
        wire          cmd_mux_018_src_endofpacket;                                 // cmd_mux_018:src_endofpacket -> clock_sel_s1_burst_adapter:sink0_endofpacket
1173 
        wire          clock_sel_s1_burst_adapter_source0_valid;                    // clock_sel_s1_burst_adapter:source0_valid -> clock_sel_s1_agent:cp_valid
1174 
        wire  [128:0] clock_sel_s1_burst_adapter_source0_data;                     // clock_sel_s1_burst_adapter:source0_data -> clock_sel_s1_agent:cp_data
1175 
        wire          clock_sel_s1_burst_adapter_source0_ready;                    // clock_sel_s1_agent:cp_ready -> clock_sel_s1_burst_adapter:source0_ready
1176 
        wire   [21:0] clock_sel_s1_burst_adapter_source0_channel;                  // clock_sel_s1_burst_adapter:source0_channel -> clock_sel_s1_agent:cp_channel
1177 
        wire          clock_sel_s1_burst_adapter_source0_startofpacket;            // clock_sel_s1_burst_adapter:source0_startofpacket -> clock_sel_s1_agent:cp_startofpacket
1178 
        wire          clock_sel_s1_burst_adapter_source0_endofpacket;              // clock_sel_s1_burst_adapter:source0_endofpacket -> clock_sel_s1_agent:cp_endofpacket
1179 
        wire          cmd_mux_019_src_valid;                                       // cmd_mux_019:src_valid -> fsm_info_s1_burst_adapter:sink0_valid
1180 
        wire  [128:0] cmd_mux_019_src_data;                                        // cmd_mux_019:src_data -> fsm_info_s1_burst_adapter:sink0_data
1181 
        wire          cmd_mux_019_src_ready;                                       // fsm_info_s1_burst_adapter:sink0_ready -> cmd_mux_019:src_ready
1182 
        wire   [21:0] cmd_mux_019_src_channel;                                     // cmd_mux_019:src_channel -> fsm_info_s1_burst_adapter:sink0_channel
1183 
        wire          cmd_mux_019_src_startofpacket;                               // cmd_mux_019:src_startofpacket -> fsm_info_s1_burst_adapter:sink0_startofpacket
1184 
        wire          cmd_mux_019_src_endofpacket;                                 // cmd_mux_019:src_endofpacket -> fsm_info_s1_burst_adapter:sink0_endofpacket
1185 
        wire          fsm_info_s1_burst_adapter_source0_valid;                     // fsm_info_s1_burst_adapter:source0_valid -> fsm_info_s1_agent:cp_valid
1186 
        wire  [128:0] fsm_info_s1_burst_adapter_source0_data;                      // fsm_info_s1_burst_adapter:source0_data -> fsm_info_s1_agent:cp_data
1187 
        wire          fsm_info_s1_burst_adapter_source0_ready;                     // fsm_info_s1_agent:cp_ready -> fsm_info_s1_burst_adapter:source0_ready
1188 
        wire   [21:0] fsm_info_s1_burst_adapter_source0_channel;                   // fsm_info_s1_burst_adapter:source0_channel -> fsm_info_s1_agent:cp_channel
1189 
        wire          fsm_info_s1_burst_adapter_source0_startofpacket;             // fsm_info_s1_burst_adapter:source0_startofpacket -> fsm_info_s1_agent:cp_startofpacket
1190 
        wire          fsm_info_s1_burst_adapter_source0_endofpacket;               // fsm_info_s1_burst_adapter:source0_endofpacket -> fsm_info_s1_agent:cp_endofpacket
1191 
        wire          cmd_mux_020_src_valid;                                       // cmd_mux_020:src_valid -> counter_tx_fifo_s1_burst_adapter:sink0_valid
1192 
        wire  [128:0] cmd_mux_020_src_data;                                        // cmd_mux_020:src_data -> counter_tx_fifo_s1_burst_adapter:sink0_data
1193 
        wire          cmd_mux_020_src_ready;                                       // counter_tx_fifo_s1_burst_adapter:sink0_ready -> cmd_mux_020:src_ready
1194 
        wire   [21:0] cmd_mux_020_src_channel;                                     // cmd_mux_020:src_channel -> counter_tx_fifo_s1_burst_adapter:sink0_channel
1195 
        wire          cmd_mux_020_src_startofpacket;                               // cmd_mux_020:src_startofpacket -> counter_tx_fifo_s1_burst_adapter:sink0_startofpacket
1196 
        wire          cmd_mux_020_src_endofpacket;                                 // cmd_mux_020:src_endofpacket -> counter_tx_fifo_s1_burst_adapter:sink0_endofpacket
1197 
        wire          counter_tx_fifo_s1_burst_adapter_source0_valid;              // counter_tx_fifo_s1_burst_adapter:source0_valid -> counter_tx_fifo_s1_agent:cp_valid
1198 
        wire  [128:0] counter_tx_fifo_s1_burst_adapter_source0_data;               // counter_tx_fifo_s1_burst_adapter:source0_data -> counter_tx_fifo_s1_agent:cp_data
1199 
        wire          counter_tx_fifo_s1_burst_adapter_source0_ready;              // counter_tx_fifo_s1_agent:cp_ready -> counter_tx_fifo_s1_burst_adapter:source0_ready
1200 
        wire   [21:0] counter_tx_fifo_s1_burst_adapter_source0_channel;            // counter_tx_fifo_s1_burst_adapter:source0_channel -> counter_tx_fifo_s1_agent:cp_channel
1201 
        wire          counter_tx_fifo_s1_burst_adapter_source0_startofpacket;      // counter_tx_fifo_s1_burst_adapter:source0_startofpacket -> counter_tx_fifo_s1_agent:cp_startofpacket
1202 
        wire          counter_tx_fifo_s1_burst_adapter_source0_endofpacket;        // counter_tx_fifo_s1_burst_adapter:source0_endofpacket -> counter_tx_fifo_s1_agent:cp_endofpacket
1203 
        wire          cmd_mux_021_src_valid;                                       // cmd_mux_021:src_valid -> counter_rx_fifo_s1_burst_adapter:sink0_valid
1204 
        wire  [128:0] cmd_mux_021_src_data;                                        // cmd_mux_021:src_data -> counter_rx_fifo_s1_burst_adapter:sink0_data
1205 
        wire          cmd_mux_021_src_ready;                                       // counter_rx_fifo_s1_burst_adapter:sink0_ready -> cmd_mux_021:src_ready
1206 
        wire   [21:0] cmd_mux_021_src_channel;                                     // cmd_mux_021:src_channel -> counter_rx_fifo_s1_burst_adapter:sink0_channel
1207 
        wire          cmd_mux_021_src_startofpacket;                               // cmd_mux_021:src_startofpacket -> counter_rx_fifo_s1_burst_adapter:sink0_startofpacket
1208 
        wire          cmd_mux_021_src_endofpacket;                                 // cmd_mux_021:src_endofpacket -> counter_rx_fifo_s1_burst_adapter:sink0_endofpacket
1209 
        wire          counter_rx_fifo_s1_burst_adapter_source0_valid;              // counter_rx_fifo_s1_burst_adapter:source0_valid -> counter_rx_fifo_s1_agent:cp_valid
1210 
        wire  [128:0] counter_rx_fifo_s1_burst_adapter_source0_data;               // counter_rx_fifo_s1_burst_adapter:source0_data -> counter_rx_fifo_s1_agent:cp_data
1211 
        wire          counter_rx_fifo_s1_burst_adapter_source0_ready;              // counter_rx_fifo_s1_agent:cp_ready -> counter_rx_fifo_s1_burst_adapter:source0_ready
1212 
        wire   [21:0] counter_rx_fifo_s1_burst_adapter_source0_channel;            // counter_rx_fifo_s1_burst_adapter:source0_channel -> counter_rx_fifo_s1_agent:cp_channel
1213 
        wire          counter_rx_fifo_s1_burst_adapter_source0_startofpacket;      // counter_rx_fifo_s1_burst_adapter:source0_startofpacket -> counter_rx_fifo_s1_agent:cp_startofpacket
1214 
        wire          counter_rx_fifo_s1_burst_adapter_source0_endofpacket;        // counter_rx_fifo_s1_burst_adapter:source0_endofpacket -> counter_rx_fifo_s1_agent:cp_endofpacket
1215 
        wire          cmd_demux_src0_valid;                                        // cmd_demux:src0_valid -> cmd_mux:sink0_valid
1216 
        wire  [128:0] cmd_demux_src0_data;                                         // cmd_demux:src0_data -> cmd_mux:sink0_data
1217 
        wire          cmd_demux_src0_ready;                                        // cmd_mux:sink0_ready -> cmd_demux:src0_ready
1218 
        wire   [21:0] cmd_demux_src0_channel;                                      // cmd_demux:src0_channel -> cmd_mux:sink0_channel
1219 
        wire          cmd_demux_src0_startofpacket;                                // cmd_demux:src0_startofpacket -> cmd_mux:sink0_startofpacket
1220 
        wire          cmd_demux_src0_endofpacket;                                  // cmd_demux:src0_endofpacket -> cmd_mux:sink0_endofpacket
1221 
        wire          cmd_demux_src1_valid;                                        // cmd_demux:src1_valid -> cmd_mux_001:sink0_valid
1222 
        wire  [128:0] cmd_demux_src1_data;                                         // cmd_demux:src1_data -> cmd_mux_001:sink0_data
1223 
        wire          cmd_demux_src1_ready;                                        // cmd_mux_001:sink0_ready -> cmd_demux:src1_ready
1224 
        wire   [21:0] cmd_demux_src1_channel;                                      // cmd_demux:src1_channel -> cmd_mux_001:sink0_channel
1225 
        wire          cmd_demux_src1_startofpacket;                                // cmd_demux:src1_startofpacket -> cmd_mux_001:sink0_startofpacket
1226 
        wire          cmd_demux_src1_endofpacket;                                  // cmd_demux:src1_endofpacket -> cmd_mux_001:sink0_endofpacket
1227 
        wire          cmd_demux_src2_valid;                                        // cmd_demux:src2_valid -> cmd_mux_002:sink0_valid
1228 
        wire  [128:0] cmd_demux_src2_data;                                         // cmd_demux:src2_data -> cmd_mux_002:sink0_data
1229 
        wire          cmd_demux_src2_ready;                                        // cmd_mux_002:sink0_ready -> cmd_demux:src2_ready
1230 
        wire   [21:0] cmd_demux_src2_channel;                                      // cmd_demux:src2_channel -> cmd_mux_002:sink0_channel
1231 
        wire          cmd_demux_src2_startofpacket;                                // cmd_demux:src2_startofpacket -> cmd_mux_002:sink0_startofpacket
1232 
        wire          cmd_demux_src2_endofpacket;                                  // cmd_demux:src2_endofpacket -> cmd_mux_002:sink0_endofpacket
1233 
        wire          cmd_demux_src3_valid;                                        // cmd_demux:src3_valid -> cmd_mux_003:sink0_valid
1234 
        wire  [128:0] cmd_demux_src3_data;                                         // cmd_demux:src3_data -> cmd_mux_003:sink0_data
1235 
        wire          cmd_demux_src3_ready;                                        // cmd_mux_003:sink0_ready -> cmd_demux:src3_ready
1236 
        wire   [21:0] cmd_demux_src3_channel;                                      // cmd_demux:src3_channel -> cmd_mux_003:sink0_channel
1237 
        wire          cmd_demux_src3_startofpacket;                                // cmd_demux:src3_startofpacket -> cmd_mux_003:sink0_startofpacket
1238 
        wire          cmd_demux_src3_endofpacket;                                  // cmd_demux:src3_endofpacket -> cmd_mux_003:sink0_endofpacket
1239 
        wire          cmd_demux_src4_valid;                                        // cmd_demux:src4_valid -> cmd_mux_004:sink0_valid
1240 
        wire  [128:0] cmd_demux_src4_data;                                         // cmd_demux:src4_data -> cmd_mux_004:sink0_data
1241 
        wire          cmd_demux_src4_ready;                                        // cmd_mux_004:sink0_ready -> cmd_demux:src4_ready
1242 
        wire   [21:0] cmd_demux_src4_channel;                                      // cmd_demux:src4_channel -> cmd_mux_004:sink0_channel
1243 
        wire          cmd_demux_src4_startofpacket;                                // cmd_demux:src4_startofpacket -> cmd_mux_004:sink0_startofpacket
1244 
        wire          cmd_demux_src4_endofpacket;                                  // cmd_demux:src4_endofpacket -> cmd_mux_004:sink0_endofpacket
1245 
        wire          cmd_demux_src5_valid;                                        // cmd_demux:src5_valid -> cmd_mux_005:sink0_valid
1246 
        wire  [128:0] cmd_demux_src5_data;                                         // cmd_demux:src5_data -> cmd_mux_005:sink0_data
1247 
        wire          cmd_demux_src5_ready;                                        // cmd_mux_005:sink0_ready -> cmd_demux:src5_ready
1248 
        wire   [21:0] cmd_demux_src5_channel;                                      // cmd_demux:src5_channel -> cmd_mux_005:sink0_channel
1249 
        wire          cmd_demux_src5_startofpacket;                                // cmd_demux:src5_startofpacket -> cmd_mux_005:sink0_startofpacket
1250 
        wire          cmd_demux_src5_endofpacket;                                  // cmd_demux:src5_endofpacket -> cmd_mux_005:sink0_endofpacket
1251 
        wire          cmd_demux_src6_valid;                                        // cmd_demux:src6_valid -> cmd_mux_006:sink0_valid
1252 
        wire  [128:0] cmd_demux_src6_data;                                         // cmd_demux:src6_data -> cmd_mux_006:sink0_data
1253 
        wire          cmd_demux_src6_ready;                                        // cmd_mux_006:sink0_ready -> cmd_demux:src6_ready
1254 
        wire   [21:0] cmd_demux_src6_channel;                                      // cmd_demux:src6_channel -> cmd_mux_006:sink0_channel
1255 
        wire          cmd_demux_src6_startofpacket;                                // cmd_demux:src6_startofpacket -> cmd_mux_006:sink0_startofpacket
1256 
        wire          cmd_demux_src6_endofpacket;                                  // cmd_demux:src6_endofpacket -> cmd_mux_006:sink0_endofpacket
1257 
        wire          cmd_demux_src7_valid;                                        // cmd_demux:src7_valid -> cmd_mux_007:sink0_valid
1258 
        wire  [128:0] cmd_demux_src7_data;                                         // cmd_demux:src7_data -> cmd_mux_007:sink0_data
1259 
        wire          cmd_demux_src7_ready;                                        // cmd_mux_007:sink0_ready -> cmd_demux:src7_ready
1260 
        wire   [21:0] cmd_demux_src7_channel;                                      // cmd_demux:src7_channel -> cmd_mux_007:sink0_channel
1261 
        wire          cmd_demux_src7_startofpacket;                                // cmd_demux:src7_startofpacket -> cmd_mux_007:sink0_startofpacket
1262 
        wire          cmd_demux_src7_endofpacket;                                  // cmd_demux:src7_endofpacket -> cmd_mux_007:sink0_endofpacket
1263 
        wire          cmd_demux_src8_valid;                                        // cmd_demux:src8_valid -> cmd_mux_008:sink0_valid
1264 
        wire  [128:0] cmd_demux_src8_data;                                         // cmd_demux:src8_data -> cmd_mux_008:sink0_data
1265 
        wire          cmd_demux_src8_ready;                                        // cmd_mux_008:sink0_ready -> cmd_demux:src8_ready
1266 
        wire   [21:0] cmd_demux_src8_channel;                                      // cmd_demux:src8_channel -> cmd_mux_008:sink0_channel
1267 
        wire          cmd_demux_src8_startofpacket;                                // cmd_demux:src8_startofpacket -> cmd_mux_008:sink0_startofpacket
1268 
        wire          cmd_demux_src8_endofpacket;                                  // cmd_demux:src8_endofpacket -> cmd_mux_008:sink0_endofpacket
1269 
        wire          cmd_demux_src9_valid;                                        // cmd_demux:src9_valid -> cmd_mux_009:sink0_valid
1270 
        wire  [128:0] cmd_demux_src9_data;                                         // cmd_demux:src9_data -> cmd_mux_009:sink0_data
1271 
        wire          cmd_demux_src9_ready;                                        // cmd_mux_009:sink0_ready -> cmd_demux:src9_ready
1272 
        wire   [21:0] cmd_demux_src9_channel;                                      // cmd_demux:src9_channel -> cmd_mux_009:sink0_channel
1273 
        wire          cmd_demux_src9_startofpacket;                                // cmd_demux:src9_startofpacket -> cmd_mux_009:sink0_startofpacket
1274 
        wire          cmd_demux_src9_endofpacket;                                  // cmd_demux:src9_endofpacket -> cmd_mux_009:sink0_endofpacket
1275 
        wire          cmd_demux_src10_valid;                                       // cmd_demux:src10_valid -> cmd_mux_010:sink0_valid
1276 
        wire  [128:0] cmd_demux_src10_data;                                        // cmd_demux:src10_data -> cmd_mux_010:sink0_data
1277 
        wire          cmd_demux_src10_ready;                                       // cmd_mux_010:sink0_ready -> cmd_demux:src10_ready
1278 
        wire   [21:0] cmd_demux_src10_channel;                                     // cmd_demux:src10_channel -> cmd_mux_010:sink0_channel
1279 
        wire          cmd_demux_src10_startofpacket;                               // cmd_demux:src10_startofpacket -> cmd_mux_010:sink0_startofpacket
1280 
        wire          cmd_demux_src10_endofpacket;                                 // cmd_demux:src10_endofpacket -> cmd_mux_010:sink0_endofpacket
1281 
        wire          cmd_demux_src11_valid;                                       // cmd_demux:src11_valid -> cmd_mux_011:sink0_valid
1282 
        wire  [128:0] cmd_demux_src11_data;                                        // cmd_demux:src11_data -> cmd_mux_011:sink0_data
1283 
        wire          cmd_demux_src11_ready;                                       // cmd_mux_011:sink0_ready -> cmd_demux:src11_ready
1284 
        wire   [21:0] cmd_demux_src11_channel;                                     // cmd_demux:src11_channel -> cmd_mux_011:sink0_channel
1285 
        wire          cmd_demux_src11_startofpacket;                               // cmd_demux:src11_startofpacket -> cmd_mux_011:sink0_startofpacket
1286 
        wire          cmd_demux_src11_endofpacket;                                 // cmd_demux:src11_endofpacket -> cmd_mux_011:sink0_endofpacket
1287 
        wire          cmd_demux_src12_valid;                                       // cmd_demux:src12_valid -> cmd_mux_012:sink0_valid
1288 
        wire  [128:0] cmd_demux_src12_data;                                        // cmd_demux:src12_data -> cmd_mux_012:sink0_data
1289 
        wire          cmd_demux_src12_ready;                                       // cmd_mux_012:sink0_ready -> cmd_demux:src12_ready
1290 
        wire   [21:0] cmd_demux_src12_channel;                                     // cmd_demux:src12_channel -> cmd_mux_012:sink0_channel
1291 
        wire          cmd_demux_src12_startofpacket;                               // cmd_demux:src12_startofpacket -> cmd_mux_012:sink0_startofpacket
1292 
        wire          cmd_demux_src12_endofpacket;                                 // cmd_demux:src12_endofpacket -> cmd_mux_012:sink0_endofpacket
1293 
        wire          cmd_demux_src13_valid;                                       // cmd_demux:src13_valid -> cmd_mux_013:sink0_valid
1294 
        wire  [128:0] cmd_demux_src13_data;                                        // cmd_demux:src13_data -> cmd_mux_013:sink0_data
1295 
        wire          cmd_demux_src13_ready;                                       // cmd_mux_013:sink0_ready -> cmd_demux:src13_ready
1296 
        wire   [21:0] cmd_demux_src13_channel;                                     // cmd_demux:src13_channel -> cmd_mux_013:sink0_channel
1297 
        wire          cmd_demux_src13_startofpacket;                               // cmd_demux:src13_startofpacket -> cmd_mux_013:sink0_startofpacket
1298 
        wire          cmd_demux_src13_endofpacket;                                 // cmd_demux:src13_endofpacket -> cmd_mux_013:sink0_endofpacket
1299 
        wire          cmd_demux_src14_valid;                                       // cmd_demux:src14_valid -> cmd_mux_014:sink0_valid
1300 
        wire  [128:0] cmd_demux_src14_data;                                        // cmd_demux:src14_data -> cmd_mux_014:sink0_data
1301 
        wire          cmd_demux_src14_ready;                                       // cmd_mux_014:sink0_ready -> cmd_demux:src14_ready
1302 
        wire   [21:0] cmd_demux_src14_channel;                                     // cmd_demux:src14_channel -> cmd_mux_014:sink0_channel
1303 
        wire          cmd_demux_src14_startofpacket;                               // cmd_demux:src14_startofpacket -> cmd_mux_014:sink0_startofpacket
1304 
        wire          cmd_demux_src14_endofpacket;                                 // cmd_demux:src14_endofpacket -> cmd_mux_014:sink0_endofpacket
1305 
        wire          cmd_demux_src15_valid;                                       // cmd_demux:src15_valid -> cmd_mux_015:sink0_valid
1306 
        wire  [128:0] cmd_demux_src15_data;                                        // cmd_demux:src15_data -> cmd_mux_015:sink0_data
1307 
        wire          cmd_demux_src15_ready;                                       // cmd_mux_015:sink0_ready -> cmd_demux:src15_ready
1308 
        wire   [21:0] cmd_demux_src15_channel;                                     // cmd_demux:src15_channel -> cmd_mux_015:sink0_channel
1309 
        wire          cmd_demux_src15_startofpacket;                               // cmd_demux:src15_startofpacket -> cmd_mux_015:sink0_startofpacket
1310 
        wire          cmd_demux_src15_endofpacket;                                 // cmd_demux:src15_endofpacket -> cmd_mux_015:sink0_endofpacket
1311 
        wire          cmd_demux_src16_valid;                                       // cmd_demux:src16_valid -> cmd_mux_016:sink0_valid
1312 
        wire  [128:0] cmd_demux_src16_data;                                        // cmd_demux:src16_data -> cmd_mux_016:sink0_data
1313 
        wire          cmd_demux_src16_ready;                                       // cmd_mux_016:sink0_ready -> cmd_demux:src16_ready
1314 
        wire   [21:0] cmd_demux_src16_channel;                                     // cmd_demux:src16_channel -> cmd_mux_016:sink0_channel
1315 
        wire          cmd_demux_src16_startofpacket;                               // cmd_demux:src16_startofpacket -> cmd_mux_016:sink0_startofpacket
1316 
        wire          cmd_demux_src16_endofpacket;                                 // cmd_demux:src16_endofpacket -> cmd_mux_016:sink0_endofpacket
1317 
        wire          cmd_demux_src17_valid;                                       // cmd_demux:src17_valid -> cmd_mux_017:sink0_valid
1318 
        wire  [128:0] cmd_demux_src17_data;                                        // cmd_demux:src17_data -> cmd_mux_017:sink0_data
1319 
        wire          cmd_demux_src17_ready;                                       // cmd_mux_017:sink0_ready -> cmd_demux:src17_ready
1320 
        wire   [21:0] cmd_demux_src17_channel;                                     // cmd_demux:src17_channel -> cmd_mux_017:sink0_channel
1321 
        wire          cmd_demux_src17_startofpacket;                               // cmd_demux:src17_startofpacket -> cmd_mux_017:sink0_startofpacket
1322 
        wire          cmd_demux_src17_endofpacket;                                 // cmd_demux:src17_endofpacket -> cmd_mux_017:sink0_endofpacket
1323 
        wire          cmd_demux_src18_valid;                                       // cmd_demux:src18_valid -> cmd_mux_018:sink0_valid
1324 
        wire  [128:0] cmd_demux_src18_data;                                        // cmd_demux:src18_data -> cmd_mux_018:sink0_data
1325 
        wire          cmd_demux_src18_ready;                                       // cmd_mux_018:sink0_ready -> cmd_demux:src18_ready
1326 
        wire   [21:0] cmd_demux_src18_channel;                                     // cmd_demux:src18_channel -> cmd_mux_018:sink0_channel
1327 
        wire          cmd_demux_src18_startofpacket;                               // cmd_demux:src18_startofpacket -> cmd_mux_018:sink0_startofpacket
1328 
        wire          cmd_demux_src18_endofpacket;                                 // cmd_demux:src18_endofpacket -> cmd_mux_018:sink0_endofpacket
1329 
        wire          cmd_demux_src19_valid;                                       // cmd_demux:src19_valid -> cmd_mux_019:sink0_valid
1330 
        wire  [128:0] cmd_demux_src19_data;                                        // cmd_demux:src19_data -> cmd_mux_019:sink0_data
1331 
        wire          cmd_demux_src19_ready;                                       // cmd_mux_019:sink0_ready -> cmd_demux:src19_ready
1332 
        wire   [21:0] cmd_demux_src19_channel;                                     // cmd_demux:src19_channel -> cmd_mux_019:sink0_channel
1333 
        wire          cmd_demux_src19_startofpacket;                               // cmd_demux:src19_startofpacket -> cmd_mux_019:sink0_startofpacket
1334 
        wire          cmd_demux_src19_endofpacket;                                 // cmd_demux:src19_endofpacket -> cmd_mux_019:sink0_endofpacket
1335 
        wire          cmd_demux_src20_valid;                                       // cmd_demux:src20_valid -> cmd_mux_020:sink0_valid
1336 
        wire  [128:0] cmd_demux_src20_data;                                        // cmd_demux:src20_data -> cmd_mux_020:sink0_data
1337 
        wire          cmd_demux_src20_ready;                                       // cmd_mux_020:sink0_ready -> cmd_demux:src20_ready
1338 
        wire   [21:0] cmd_demux_src20_channel;                                     // cmd_demux:src20_channel -> cmd_mux_020:sink0_channel
1339 
        wire          cmd_demux_src20_startofpacket;                               // cmd_demux:src20_startofpacket -> cmd_mux_020:sink0_startofpacket
1340 
        wire          cmd_demux_src20_endofpacket;                                 // cmd_demux:src20_endofpacket -> cmd_mux_020:sink0_endofpacket
1341 
        wire          cmd_demux_src21_valid;                                       // cmd_demux:src21_valid -> cmd_mux_021:sink0_valid
1342 
        wire  [128:0] cmd_demux_src21_data;                                        // cmd_demux:src21_data -> cmd_mux_021:sink0_data
1343 
        wire          cmd_demux_src21_ready;                                       // cmd_mux_021:sink0_ready -> cmd_demux:src21_ready
1344 
        wire   [21:0] cmd_demux_src21_channel;                                     // cmd_demux:src21_channel -> cmd_mux_021:sink0_channel
1345 
        wire          cmd_demux_src21_startofpacket;                               // cmd_demux:src21_startofpacket -> cmd_mux_021:sink0_startofpacket
1346 
        wire          cmd_demux_src21_endofpacket;                                 // cmd_demux:src21_endofpacket -> cmd_mux_021:sink0_endofpacket
1347 
        wire          cmd_demux_001_src0_valid;                                    // cmd_demux_001:src0_valid -> cmd_mux:sink1_valid
1348 
        wire  [128:0] cmd_demux_001_src0_data;                                     // cmd_demux_001:src0_data -> cmd_mux:sink1_data
1349 
        wire          cmd_demux_001_src0_ready;                                    // cmd_mux:sink1_ready -> cmd_demux_001:src0_ready
1350 
        wire   [21:0] cmd_demux_001_src0_channel;                                  // cmd_demux_001:src0_channel -> cmd_mux:sink1_channel
1351 
        wire          cmd_demux_001_src0_startofpacket;                            // cmd_demux_001:src0_startofpacket -> cmd_mux:sink1_startofpacket
1352 
        wire          cmd_demux_001_src0_endofpacket;                              // cmd_demux_001:src0_endofpacket -> cmd_mux:sink1_endofpacket
1353 
        wire          cmd_demux_001_src1_valid;                                    // cmd_demux_001:src1_valid -> cmd_mux_001:sink1_valid
1354 
        wire  [128:0] cmd_demux_001_src1_data;                                     // cmd_demux_001:src1_data -> cmd_mux_001:sink1_data
1355 
        wire          cmd_demux_001_src1_ready;                                    // cmd_mux_001:sink1_ready -> cmd_demux_001:src1_ready
1356 
        wire   [21:0] cmd_demux_001_src1_channel;                                  // cmd_demux_001:src1_channel -> cmd_mux_001:sink1_channel
1357 
        wire          cmd_demux_001_src1_startofpacket;                            // cmd_demux_001:src1_startofpacket -> cmd_mux_001:sink1_startofpacket
1358 
        wire          cmd_demux_001_src1_endofpacket;                              // cmd_demux_001:src1_endofpacket -> cmd_mux_001:sink1_endofpacket
1359 
        wire          cmd_demux_001_src2_valid;                                    // cmd_demux_001:src2_valid -> cmd_mux_002:sink1_valid
1360 
        wire  [128:0] cmd_demux_001_src2_data;                                     // cmd_demux_001:src2_data -> cmd_mux_002:sink1_data
1361 
        wire          cmd_demux_001_src2_ready;                                    // cmd_mux_002:sink1_ready -> cmd_demux_001:src2_ready
1362 
        wire   [21:0] cmd_demux_001_src2_channel;                                  // cmd_demux_001:src2_channel -> cmd_mux_002:sink1_channel
1363 
        wire          cmd_demux_001_src2_startofpacket;                            // cmd_demux_001:src2_startofpacket -> cmd_mux_002:sink1_startofpacket
1364 
        wire          cmd_demux_001_src2_endofpacket;                              // cmd_demux_001:src2_endofpacket -> cmd_mux_002:sink1_endofpacket
1365 
        wire          cmd_demux_001_src3_valid;                                    // cmd_demux_001:src3_valid -> cmd_mux_003:sink1_valid
1366 
        wire  [128:0] cmd_demux_001_src3_data;                                     // cmd_demux_001:src3_data -> cmd_mux_003:sink1_data
1367 
        wire          cmd_demux_001_src3_ready;                                    // cmd_mux_003:sink1_ready -> cmd_demux_001:src3_ready
1368 
        wire   [21:0] cmd_demux_001_src3_channel;                                  // cmd_demux_001:src3_channel -> cmd_mux_003:sink1_channel
1369 
        wire          cmd_demux_001_src3_startofpacket;                            // cmd_demux_001:src3_startofpacket -> cmd_mux_003:sink1_startofpacket
1370 
        wire          cmd_demux_001_src3_endofpacket;                              // cmd_demux_001:src3_endofpacket -> cmd_mux_003:sink1_endofpacket
1371 
        wire          cmd_demux_001_src4_valid;                                    // cmd_demux_001:src4_valid -> cmd_mux_004:sink1_valid
1372 
        wire  [128:0] cmd_demux_001_src4_data;                                     // cmd_demux_001:src4_data -> cmd_mux_004:sink1_data
1373 
        wire          cmd_demux_001_src4_ready;                                    // cmd_mux_004:sink1_ready -> cmd_demux_001:src4_ready
1374 
        wire   [21:0] cmd_demux_001_src4_channel;                                  // cmd_demux_001:src4_channel -> cmd_mux_004:sink1_channel
1375 
        wire          cmd_demux_001_src4_startofpacket;                            // cmd_demux_001:src4_startofpacket -> cmd_mux_004:sink1_startofpacket
1376 
        wire          cmd_demux_001_src4_endofpacket;                              // cmd_demux_001:src4_endofpacket -> cmd_mux_004:sink1_endofpacket
1377 
        wire          cmd_demux_001_src5_valid;                                    // cmd_demux_001:src5_valid -> cmd_mux_005:sink1_valid
1378 
        wire  [128:0] cmd_demux_001_src5_data;                                     // cmd_demux_001:src5_data -> cmd_mux_005:sink1_data
1379 
        wire          cmd_demux_001_src5_ready;                                    // cmd_mux_005:sink1_ready -> cmd_demux_001:src5_ready
1380 
        wire   [21:0] cmd_demux_001_src5_channel;                                  // cmd_demux_001:src5_channel -> cmd_mux_005:sink1_channel
1381 
        wire          cmd_demux_001_src5_startofpacket;                            // cmd_demux_001:src5_startofpacket -> cmd_mux_005:sink1_startofpacket
1382 
        wire          cmd_demux_001_src5_endofpacket;                              // cmd_demux_001:src5_endofpacket -> cmd_mux_005:sink1_endofpacket
1383 
        wire          cmd_demux_001_src6_valid;                                    // cmd_demux_001:src6_valid -> cmd_mux_006:sink1_valid
1384 
        wire  [128:0] cmd_demux_001_src6_data;                                     // cmd_demux_001:src6_data -> cmd_mux_006:sink1_data
1385 
        wire          cmd_demux_001_src6_ready;                                    // cmd_mux_006:sink1_ready -> cmd_demux_001:src6_ready
1386 
        wire   [21:0] cmd_demux_001_src6_channel;                                  // cmd_demux_001:src6_channel -> cmd_mux_006:sink1_channel
1387 
        wire          cmd_demux_001_src6_startofpacket;                            // cmd_demux_001:src6_startofpacket -> cmd_mux_006:sink1_startofpacket
1388 
        wire          cmd_demux_001_src6_endofpacket;                              // cmd_demux_001:src6_endofpacket -> cmd_mux_006:sink1_endofpacket
1389 
        wire          cmd_demux_001_src7_valid;                                    // cmd_demux_001:src7_valid -> cmd_mux_007:sink1_valid
1390 
        wire  [128:0] cmd_demux_001_src7_data;                                     // cmd_demux_001:src7_data -> cmd_mux_007:sink1_data
1391 
        wire          cmd_demux_001_src7_ready;                                    // cmd_mux_007:sink1_ready -> cmd_demux_001:src7_ready
1392 
        wire   [21:0] cmd_demux_001_src7_channel;                                  // cmd_demux_001:src7_channel -> cmd_mux_007:sink1_channel
1393 
        wire          cmd_demux_001_src7_startofpacket;                            // cmd_demux_001:src7_startofpacket -> cmd_mux_007:sink1_startofpacket
1394 
        wire          cmd_demux_001_src7_endofpacket;                              // cmd_demux_001:src7_endofpacket -> cmd_mux_007:sink1_endofpacket
1395 
        wire          cmd_demux_001_src8_valid;                                    // cmd_demux_001:src8_valid -> cmd_mux_008:sink1_valid
1396 
        wire  [128:0] cmd_demux_001_src8_data;                                     // cmd_demux_001:src8_data -> cmd_mux_008:sink1_data
1397 
        wire          cmd_demux_001_src8_ready;                                    // cmd_mux_008:sink1_ready -> cmd_demux_001:src8_ready
1398 
        wire   [21:0] cmd_demux_001_src8_channel;                                  // cmd_demux_001:src8_channel -> cmd_mux_008:sink1_channel
1399 
        wire          cmd_demux_001_src8_startofpacket;                            // cmd_demux_001:src8_startofpacket -> cmd_mux_008:sink1_startofpacket
1400 
        wire          cmd_demux_001_src8_endofpacket;                              // cmd_demux_001:src8_endofpacket -> cmd_mux_008:sink1_endofpacket
1401 
        wire          cmd_demux_001_src9_valid;                                    // cmd_demux_001:src9_valid -> cmd_mux_009:sink1_valid
1402 
        wire  [128:0] cmd_demux_001_src9_data;                                     // cmd_demux_001:src9_data -> cmd_mux_009:sink1_data
1403 
        wire          cmd_demux_001_src9_ready;                                    // cmd_mux_009:sink1_ready -> cmd_demux_001:src9_ready
1404 
        wire   [21:0] cmd_demux_001_src9_channel;                                  // cmd_demux_001:src9_channel -> cmd_mux_009:sink1_channel
1405 
        wire          cmd_demux_001_src9_startofpacket;                            // cmd_demux_001:src9_startofpacket -> cmd_mux_009:sink1_startofpacket
1406 
        wire          cmd_demux_001_src9_endofpacket;                              // cmd_demux_001:src9_endofpacket -> cmd_mux_009:sink1_endofpacket
1407 
        wire          cmd_demux_001_src10_valid;                                   // cmd_demux_001:src10_valid -> cmd_mux_010:sink1_valid
1408 
        wire  [128:0] cmd_demux_001_src10_data;                                    // cmd_demux_001:src10_data -> cmd_mux_010:sink1_data
1409 
        wire          cmd_demux_001_src10_ready;                                   // cmd_mux_010:sink1_ready -> cmd_demux_001:src10_ready
1410 
        wire   [21:0] cmd_demux_001_src10_channel;                                 // cmd_demux_001:src10_channel -> cmd_mux_010:sink1_channel
1411 
        wire          cmd_demux_001_src10_startofpacket;                           // cmd_demux_001:src10_startofpacket -> cmd_mux_010:sink1_startofpacket
1412 
        wire          cmd_demux_001_src10_endofpacket;                             // cmd_demux_001:src10_endofpacket -> cmd_mux_010:sink1_endofpacket
1413 
        wire          cmd_demux_001_src11_valid;                                   // cmd_demux_001:src11_valid -> cmd_mux_011:sink1_valid
1414 
        wire  [128:0] cmd_demux_001_src11_data;                                    // cmd_demux_001:src11_data -> cmd_mux_011:sink1_data
1415 
        wire          cmd_demux_001_src11_ready;                                   // cmd_mux_011:sink1_ready -> cmd_demux_001:src11_ready
1416 
        wire   [21:0] cmd_demux_001_src11_channel;                                 // cmd_demux_001:src11_channel -> cmd_mux_011:sink1_channel
1417 
        wire          cmd_demux_001_src11_startofpacket;                           // cmd_demux_001:src11_startofpacket -> cmd_mux_011:sink1_startofpacket
1418 
        wire          cmd_demux_001_src11_endofpacket;                             // cmd_demux_001:src11_endofpacket -> cmd_mux_011:sink1_endofpacket
1419 
        wire          cmd_demux_001_src12_valid;                                   // cmd_demux_001:src12_valid -> cmd_mux_012:sink1_valid
1420 
        wire  [128:0] cmd_demux_001_src12_data;                                    // cmd_demux_001:src12_data -> cmd_mux_012:sink1_data
1421 
        wire          cmd_demux_001_src12_ready;                                   // cmd_mux_012:sink1_ready -> cmd_demux_001:src12_ready
1422 
        wire   [21:0] cmd_demux_001_src12_channel;                                 // cmd_demux_001:src12_channel -> cmd_mux_012:sink1_channel
1423 
        wire          cmd_demux_001_src12_startofpacket;                           // cmd_demux_001:src12_startofpacket -> cmd_mux_012:sink1_startofpacket
1424 
        wire          cmd_demux_001_src12_endofpacket;                             // cmd_demux_001:src12_endofpacket -> cmd_mux_012:sink1_endofpacket
1425 
        wire          cmd_demux_001_src13_valid;                                   // cmd_demux_001:src13_valid -> cmd_mux_013:sink1_valid
1426 
        wire  [128:0] cmd_demux_001_src13_data;                                    // cmd_demux_001:src13_data -> cmd_mux_013:sink1_data
1427 
        wire          cmd_demux_001_src13_ready;                                   // cmd_mux_013:sink1_ready -> cmd_demux_001:src13_ready
1428 
        wire   [21:0] cmd_demux_001_src13_channel;                                 // cmd_demux_001:src13_channel -> cmd_mux_013:sink1_channel
1429 
        wire          cmd_demux_001_src13_startofpacket;                           // cmd_demux_001:src13_startofpacket -> cmd_mux_013:sink1_startofpacket
1430 
        wire          cmd_demux_001_src13_endofpacket;                             // cmd_demux_001:src13_endofpacket -> cmd_mux_013:sink1_endofpacket
1431 
        wire          cmd_demux_001_src14_valid;                                   // cmd_demux_001:src14_valid -> cmd_mux_014:sink1_valid
1432 
        wire  [128:0] cmd_demux_001_src14_data;                                    // cmd_demux_001:src14_data -> cmd_mux_014:sink1_data
1433 
        wire          cmd_demux_001_src14_ready;                                   // cmd_mux_014:sink1_ready -> cmd_demux_001:src14_ready
1434 
        wire   [21:0] cmd_demux_001_src14_channel;                                 // cmd_demux_001:src14_channel -> cmd_mux_014:sink1_channel
1435 
        wire          cmd_demux_001_src14_startofpacket;                           // cmd_demux_001:src14_startofpacket -> cmd_mux_014:sink1_startofpacket
1436 
        wire          cmd_demux_001_src14_endofpacket;                             // cmd_demux_001:src14_endofpacket -> cmd_mux_014:sink1_endofpacket
1437 
        wire          cmd_demux_001_src15_valid;                                   // cmd_demux_001:src15_valid -> cmd_mux_015:sink1_valid
1438 
        wire  [128:0] cmd_demux_001_src15_data;                                    // cmd_demux_001:src15_data -> cmd_mux_015:sink1_data
1439 
        wire          cmd_demux_001_src15_ready;                                   // cmd_mux_015:sink1_ready -> cmd_demux_001:src15_ready
1440 
        wire   [21:0] cmd_demux_001_src15_channel;                                 // cmd_demux_001:src15_channel -> cmd_mux_015:sink1_channel
1441 
        wire          cmd_demux_001_src15_startofpacket;                           // cmd_demux_001:src15_startofpacket -> cmd_mux_015:sink1_startofpacket
1442 
        wire          cmd_demux_001_src15_endofpacket;                             // cmd_demux_001:src15_endofpacket -> cmd_mux_015:sink1_endofpacket
1443 
        wire          cmd_demux_001_src16_valid;                                   // cmd_demux_001:src16_valid -> cmd_mux_016:sink1_valid
1444 
        wire  [128:0] cmd_demux_001_src16_data;                                    // cmd_demux_001:src16_data -> cmd_mux_016:sink1_data
1445 
        wire          cmd_demux_001_src16_ready;                                   // cmd_mux_016:sink1_ready -> cmd_demux_001:src16_ready
1446 
        wire   [21:0] cmd_demux_001_src16_channel;                                 // cmd_demux_001:src16_channel -> cmd_mux_016:sink1_channel
1447 
        wire          cmd_demux_001_src16_startofpacket;                           // cmd_demux_001:src16_startofpacket -> cmd_mux_016:sink1_startofpacket
1448 
        wire          cmd_demux_001_src16_endofpacket;                             // cmd_demux_001:src16_endofpacket -> cmd_mux_016:sink1_endofpacket
1449 
        wire          cmd_demux_001_src17_valid;                                   // cmd_demux_001:src17_valid -> cmd_mux_017:sink1_valid
1450 
        wire  [128:0] cmd_demux_001_src17_data;                                    // cmd_demux_001:src17_data -> cmd_mux_017:sink1_data
1451 
        wire          cmd_demux_001_src17_ready;                                   // cmd_mux_017:sink1_ready -> cmd_demux_001:src17_ready
1452 
        wire   [21:0] cmd_demux_001_src17_channel;                                 // cmd_demux_001:src17_channel -> cmd_mux_017:sink1_channel
1453 
        wire          cmd_demux_001_src17_startofpacket;                           // cmd_demux_001:src17_startofpacket -> cmd_mux_017:sink1_startofpacket
1454 
        wire          cmd_demux_001_src17_endofpacket;                             // cmd_demux_001:src17_endofpacket -> cmd_mux_017:sink1_endofpacket
1455 
        wire          cmd_demux_001_src18_valid;                                   // cmd_demux_001:src18_valid -> cmd_mux_018:sink1_valid
1456 
        wire  [128:0] cmd_demux_001_src18_data;                                    // cmd_demux_001:src18_data -> cmd_mux_018:sink1_data
1457 
        wire          cmd_demux_001_src18_ready;                                   // cmd_mux_018:sink1_ready -> cmd_demux_001:src18_ready
1458 
        wire   [21:0] cmd_demux_001_src18_channel;                                 // cmd_demux_001:src18_channel -> cmd_mux_018:sink1_channel
1459 
        wire          cmd_demux_001_src18_startofpacket;                           // cmd_demux_001:src18_startofpacket -> cmd_mux_018:sink1_startofpacket
1460 
        wire          cmd_demux_001_src18_endofpacket;                             // cmd_demux_001:src18_endofpacket -> cmd_mux_018:sink1_endofpacket
1461 
        wire          cmd_demux_001_src19_valid;                                   // cmd_demux_001:src19_valid -> cmd_mux_019:sink1_valid
1462 
        wire  [128:0] cmd_demux_001_src19_data;                                    // cmd_demux_001:src19_data -> cmd_mux_019:sink1_data
1463 
        wire          cmd_demux_001_src19_ready;                                   // cmd_mux_019:sink1_ready -> cmd_demux_001:src19_ready
1464 
        wire   [21:0] cmd_demux_001_src19_channel;                                 // cmd_demux_001:src19_channel -> cmd_mux_019:sink1_channel
1465 
        wire          cmd_demux_001_src19_startofpacket;                           // cmd_demux_001:src19_startofpacket -> cmd_mux_019:sink1_startofpacket
1466 
        wire          cmd_demux_001_src19_endofpacket;                             // cmd_demux_001:src19_endofpacket -> cmd_mux_019:sink1_endofpacket
1467 
        wire          cmd_demux_001_src20_valid;                                   // cmd_demux_001:src20_valid -> cmd_mux_020:sink1_valid
1468 
        wire  [128:0] cmd_demux_001_src20_data;                                    // cmd_demux_001:src20_data -> cmd_mux_020:sink1_data
1469 
        wire          cmd_demux_001_src20_ready;                                   // cmd_mux_020:sink1_ready -> cmd_demux_001:src20_ready
1470 
        wire   [21:0] cmd_demux_001_src20_channel;                                 // cmd_demux_001:src20_channel -> cmd_mux_020:sink1_channel
1471 
        wire          cmd_demux_001_src20_startofpacket;                           // cmd_demux_001:src20_startofpacket -> cmd_mux_020:sink1_startofpacket
1472 
        wire          cmd_demux_001_src20_endofpacket;                             // cmd_demux_001:src20_endofpacket -> cmd_mux_020:sink1_endofpacket
1473 
        wire          cmd_demux_001_src21_valid;                                   // cmd_demux_001:src21_valid -> cmd_mux_021:sink1_valid
1474 
        wire  [128:0] cmd_demux_001_src21_data;                                    // cmd_demux_001:src21_data -> cmd_mux_021:sink1_data
1475 
        wire          cmd_demux_001_src21_ready;                                   // cmd_mux_021:sink1_ready -> cmd_demux_001:src21_ready
1476 
        wire   [21:0] cmd_demux_001_src21_channel;                                 // cmd_demux_001:src21_channel -> cmd_mux_021:sink1_channel
1477 
        wire          cmd_demux_001_src21_startofpacket;                           // cmd_demux_001:src21_startofpacket -> cmd_mux_021:sink1_startofpacket
1478 
        wire          cmd_demux_001_src21_endofpacket;                             // cmd_demux_001:src21_endofpacket -> cmd_mux_021:sink1_endofpacket
1479 
        wire          rsp_demux_src0_valid;                                        // rsp_demux:src0_valid -> rsp_mux:sink0_valid
1480 
        wire  [128:0] rsp_demux_src0_data;                                         // rsp_demux:src0_data -> rsp_mux:sink0_data
1481 
        wire          rsp_demux_src0_ready;                                        // rsp_mux:sink0_ready -> rsp_demux:src0_ready
1482 
        wire   [21:0] rsp_demux_src0_channel;                                      // rsp_demux:src0_channel -> rsp_mux:sink0_channel
1483 
        wire          rsp_demux_src0_startofpacket;                                // rsp_demux:src0_startofpacket -> rsp_mux:sink0_startofpacket
1484 
        wire          rsp_demux_src0_endofpacket;                                  // rsp_demux:src0_endofpacket -> rsp_mux:sink0_endofpacket
1485 
        wire          rsp_demux_src1_valid;                                        // rsp_demux:src1_valid -> rsp_mux_001:sink0_valid
1486 
        wire  [128:0] rsp_demux_src1_data;                                         // rsp_demux:src1_data -> rsp_mux_001:sink0_data
1487 
        wire          rsp_demux_src1_ready;                                        // rsp_mux_001:sink0_ready -> rsp_demux:src1_ready
1488 
        wire   [21:0] rsp_demux_src1_channel;                                      // rsp_demux:src1_channel -> rsp_mux_001:sink0_channel
1489 
        wire          rsp_demux_src1_startofpacket;                                // rsp_demux:src1_startofpacket -> rsp_mux_001:sink0_startofpacket
1490 
        wire          rsp_demux_src1_endofpacket;                                  // rsp_demux:src1_endofpacket -> rsp_mux_001:sink0_endofpacket
1491 
        wire          rsp_demux_001_src0_valid;                                    // rsp_demux_001:src0_valid -> rsp_mux:sink1_valid
1492 
        wire  [128:0] rsp_demux_001_src0_data;                                     // rsp_demux_001:src0_data -> rsp_mux:sink1_data
1493 
        wire          rsp_demux_001_src0_ready;                                    // rsp_mux:sink1_ready -> rsp_demux_001:src0_ready
1494 
        wire   [21:0] rsp_demux_001_src0_channel;                                  // rsp_demux_001:src0_channel -> rsp_mux:sink1_channel
1495 
        wire          rsp_demux_001_src0_startofpacket;                            // rsp_demux_001:src0_startofpacket -> rsp_mux:sink1_startofpacket
1496 
        wire          rsp_demux_001_src0_endofpacket;                              // rsp_demux_001:src0_endofpacket -> rsp_mux:sink1_endofpacket
1497 
        wire          rsp_demux_001_src1_valid;                                    // rsp_demux_001:src1_valid -> rsp_mux_001:sink1_valid
1498 
        wire  [128:0] rsp_demux_001_src1_data;                                     // rsp_demux_001:src1_data -> rsp_mux_001:sink1_data
1499 
        wire          rsp_demux_001_src1_ready;                                    // rsp_mux_001:sink1_ready -> rsp_demux_001:src1_ready
1500 
        wire   [21:0] rsp_demux_001_src1_channel;                                  // rsp_demux_001:src1_channel -> rsp_mux_001:sink1_channel
1501 
        wire          rsp_demux_001_src1_startofpacket;                            // rsp_demux_001:src1_startofpacket -> rsp_mux_001:sink1_startofpacket
1502 
        wire          rsp_demux_001_src1_endofpacket;                              // rsp_demux_001:src1_endofpacket -> rsp_mux_001:sink1_endofpacket
1503 
        wire          rsp_demux_002_src0_valid;                                    // rsp_demux_002:src0_valid -> rsp_mux:sink2_valid
1504 
        wire  [128:0] rsp_demux_002_src0_data;                                     // rsp_demux_002:src0_data -> rsp_mux:sink2_data
1505 
        wire          rsp_demux_002_src0_ready;                                    // rsp_mux:sink2_ready -> rsp_demux_002:src0_ready
1506 
        wire   [21:0] rsp_demux_002_src0_channel;                                  // rsp_demux_002:src0_channel -> rsp_mux:sink2_channel
1507 
        wire          rsp_demux_002_src0_startofpacket;                            // rsp_demux_002:src0_startofpacket -> rsp_mux:sink2_startofpacket
1508 
        wire          rsp_demux_002_src0_endofpacket;                              // rsp_demux_002:src0_endofpacket -> rsp_mux:sink2_endofpacket
1509 
        wire          rsp_demux_002_src1_valid;                                    // rsp_demux_002:src1_valid -> rsp_mux_001:sink2_valid
1510 
        wire  [128:0] rsp_demux_002_src1_data;                                     // rsp_demux_002:src1_data -> rsp_mux_001:sink2_data
1511 
        wire          rsp_demux_002_src1_ready;                                    // rsp_mux_001:sink2_ready -> rsp_demux_002:src1_ready
1512 
        wire   [21:0] rsp_demux_002_src1_channel;                                  // rsp_demux_002:src1_channel -> rsp_mux_001:sink2_channel
1513 
        wire          rsp_demux_002_src1_startofpacket;                            // rsp_demux_002:src1_startofpacket -> rsp_mux_001:sink2_startofpacket
1514 
        wire          rsp_demux_002_src1_endofpacket;                              // rsp_demux_002:src1_endofpacket -> rsp_mux_001:sink2_endofpacket
1515 
        wire          rsp_demux_003_src0_valid;                                    // rsp_demux_003:src0_valid -> rsp_mux:sink3_valid
1516 
        wire  [128:0] rsp_demux_003_src0_data;                                     // rsp_demux_003:src0_data -> rsp_mux:sink3_data
1517 
        wire          rsp_demux_003_src0_ready;                                    // rsp_mux:sink3_ready -> rsp_demux_003:src0_ready
1518 
        wire   [21:0] rsp_demux_003_src0_channel;                                  // rsp_demux_003:src0_channel -> rsp_mux:sink3_channel
1519 
        wire          rsp_demux_003_src0_startofpacket;                            // rsp_demux_003:src0_startofpacket -> rsp_mux:sink3_startofpacket
1520 
        wire          rsp_demux_003_src0_endofpacket;                              // rsp_demux_003:src0_endofpacket -> rsp_mux:sink3_endofpacket
1521 
        wire          rsp_demux_003_src1_valid;                                    // rsp_demux_003:src1_valid -> rsp_mux_001:sink3_valid
1522 
        wire  [128:0] rsp_demux_003_src1_data;                                     // rsp_demux_003:src1_data -> rsp_mux_001:sink3_data
1523 
        wire          rsp_demux_003_src1_ready;                                    // rsp_mux_001:sink3_ready -> rsp_demux_003:src1_ready
1524 
        wire   [21:0] rsp_demux_003_src1_channel;                                  // rsp_demux_003:src1_channel -> rsp_mux_001:sink3_channel
1525 
        wire          rsp_demux_003_src1_startofpacket;                            // rsp_demux_003:src1_startofpacket -> rsp_mux_001:sink3_startofpacket
1526 
        wire          rsp_demux_003_src1_endofpacket;                              // rsp_demux_003:src1_endofpacket -> rsp_mux_001:sink3_endofpacket
1527 
        wire          rsp_demux_004_src0_valid;                                    // rsp_demux_004:src0_valid -> rsp_mux:sink4_valid
1528 
        wire  [128:0] rsp_demux_004_src0_data;                                     // rsp_demux_004:src0_data -> rsp_mux:sink4_data
1529 
        wire          rsp_demux_004_src0_ready;                                    // rsp_mux:sink4_ready -> rsp_demux_004:src0_ready
1530 
        wire   [21:0] rsp_demux_004_src0_channel;                                  // rsp_demux_004:src0_channel -> rsp_mux:sink4_channel
1531 
        wire          rsp_demux_004_src0_startofpacket;                            // rsp_demux_004:src0_startofpacket -> rsp_mux:sink4_startofpacket
1532 
        wire          rsp_demux_004_src0_endofpacket;                              // rsp_demux_004:src0_endofpacket -> rsp_mux:sink4_endofpacket
1533 
        wire          rsp_demux_004_src1_valid;                                    // rsp_demux_004:src1_valid -> rsp_mux_001:sink4_valid
1534 
        wire  [128:0] rsp_demux_004_src1_data;                                     // rsp_demux_004:src1_data -> rsp_mux_001:sink4_data
1535 
        wire          rsp_demux_004_src1_ready;                                    // rsp_mux_001:sink4_ready -> rsp_demux_004:src1_ready
1536 
        wire   [21:0] rsp_demux_004_src1_channel;                                  // rsp_demux_004:src1_channel -> rsp_mux_001:sink4_channel
1537 
        wire          rsp_demux_004_src1_startofpacket;                            // rsp_demux_004:src1_startofpacket -> rsp_mux_001:sink4_startofpacket
1538 
        wire          rsp_demux_004_src1_endofpacket;                              // rsp_demux_004:src1_endofpacket -> rsp_mux_001:sink4_endofpacket
1539 
        wire          rsp_demux_005_src0_valid;                                    // rsp_demux_005:src0_valid -> rsp_mux:sink5_valid
1540 
        wire  [128:0] rsp_demux_005_src0_data;                                     // rsp_demux_005:src0_data -> rsp_mux:sink5_data
1541 
        wire          rsp_demux_005_src0_ready;                                    // rsp_mux:sink5_ready -> rsp_demux_005:src0_ready
1542 
        wire   [21:0] rsp_demux_005_src0_channel;                                  // rsp_demux_005:src0_channel -> rsp_mux:sink5_channel
1543 
        wire          rsp_demux_005_src0_startofpacket;                            // rsp_demux_005:src0_startofpacket -> rsp_mux:sink5_startofpacket
1544 
        wire          rsp_demux_005_src0_endofpacket;                              // rsp_demux_005:src0_endofpacket -> rsp_mux:sink5_endofpacket
1545 
        wire          rsp_demux_005_src1_valid;                                    // rsp_demux_005:src1_valid -> rsp_mux_001:sink5_valid
1546 
        wire  [128:0] rsp_demux_005_src1_data;                                     // rsp_demux_005:src1_data -> rsp_mux_001:sink5_data
1547 
        wire          rsp_demux_005_src1_ready;                                    // rsp_mux_001:sink5_ready -> rsp_demux_005:src1_ready
1548 
        wire   [21:0] rsp_demux_005_src1_channel;                                  // rsp_demux_005:src1_channel -> rsp_mux_001:sink5_channel
1549 
        wire          rsp_demux_005_src1_startofpacket;                            // rsp_demux_005:src1_startofpacket -> rsp_mux_001:sink5_startofpacket
1550 
        wire          rsp_demux_005_src1_endofpacket;                              // rsp_demux_005:src1_endofpacket -> rsp_mux_001:sink5_endofpacket
1551 
        wire          rsp_demux_006_src0_valid;                                    // rsp_demux_006:src0_valid -> rsp_mux:sink6_valid
1552 
        wire  [128:0] rsp_demux_006_src0_data;                                     // rsp_demux_006:src0_data -> rsp_mux:sink6_data
1553 
        wire          rsp_demux_006_src0_ready;                                    // rsp_mux:sink6_ready -> rsp_demux_006:src0_ready
1554 
        wire   [21:0] rsp_demux_006_src0_channel;                                  // rsp_demux_006:src0_channel -> rsp_mux:sink6_channel
1555 
        wire          rsp_demux_006_src0_startofpacket;                            // rsp_demux_006:src0_startofpacket -> rsp_mux:sink6_startofpacket
1556 
        wire          rsp_demux_006_src0_endofpacket;                              // rsp_demux_006:src0_endofpacket -> rsp_mux:sink6_endofpacket
1557 
        wire          rsp_demux_006_src1_valid;                                    // rsp_demux_006:src1_valid -> rsp_mux_001:sink6_valid
1558 
        wire  [128:0] rsp_demux_006_src1_data;                                     // rsp_demux_006:src1_data -> rsp_mux_001:sink6_data
1559 
        wire          rsp_demux_006_src1_ready;                                    // rsp_mux_001:sink6_ready -> rsp_demux_006:src1_ready
1560 
        wire   [21:0] rsp_demux_006_src1_channel;                                  // rsp_demux_006:src1_channel -> rsp_mux_001:sink6_channel
1561 
        wire          rsp_demux_006_src1_startofpacket;                            // rsp_demux_006:src1_startofpacket -> rsp_mux_001:sink6_startofpacket
1562 
        wire          rsp_demux_006_src1_endofpacket;                              // rsp_demux_006:src1_endofpacket -> rsp_mux_001:sink6_endofpacket
1563 
        wire          rsp_demux_007_src0_valid;                                    // rsp_demux_007:src0_valid -> rsp_mux:sink7_valid
1564 
        wire  [128:0] rsp_demux_007_src0_data;                                     // rsp_demux_007:src0_data -> rsp_mux:sink7_data
1565 
        wire          rsp_demux_007_src0_ready;                                    // rsp_mux:sink7_ready -> rsp_demux_007:src0_ready
1566 
        wire   [21:0] rsp_demux_007_src0_channel;                                  // rsp_demux_007:src0_channel -> rsp_mux:sink7_channel
1567 
        wire          rsp_demux_007_src0_startofpacket;                            // rsp_demux_007:src0_startofpacket -> rsp_mux:sink7_startofpacket
1568 
        wire          rsp_demux_007_src0_endofpacket;                              // rsp_demux_007:src0_endofpacket -> rsp_mux:sink7_endofpacket
1569 
        wire          rsp_demux_007_src1_valid;                                    // rsp_demux_007:src1_valid -> rsp_mux_001:sink7_valid
1570 
        wire  [128:0] rsp_demux_007_src1_data;                                     // rsp_demux_007:src1_data -> rsp_mux_001:sink7_data
1571 
        wire          rsp_demux_007_src1_ready;                                    // rsp_mux_001:sink7_ready -> rsp_demux_007:src1_ready
1572 
        wire   [21:0] rsp_demux_007_src1_channel;                                  // rsp_demux_007:src1_channel -> rsp_mux_001:sink7_channel
1573 
        wire          rsp_demux_007_src1_startofpacket;                            // rsp_demux_007:src1_startofpacket -> rsp_mux_001:sink7_startofpacket
1574 
        wire          rsp_demux_007_src1_endofpacket;                              // rsp_demux_007:src1_endofpacket -> rsp_mux_001:sink7_endofpacket
1575 
        wire          rsp_demux_008_src0_valid;                                    // rsp_demux_008:src0_valid -> rsp_mux:sink8_valid
1576 
        wire  [128:0] rsp_demux_008_src0_data;                                     // rsp_demux_008:src0_data -> rsp_mux:sink8_data
1577 
        wire          rsp_demux_008_src0_ready;                                    // rsp_mux:sink8_ready -> rsp_demux_008:src0_ready
1578 
        wire   [21:0] rsp_demux_008_src0_channel;                                  // rsp_demux_008:src0_channel -> rsp_mux:sink8_channel
1579 
        wire          rsp_demux_008_src0_startofpacket;                            // rsp_demux_008:src0_startofpacket -> rsp_mux:sink8_startofpacket
1580 
        wire          rsp_demux_008_src0_endofpacket;                              // rsp_demux_008:src0_endofpacket -> rsp_mux:sink8_endofpacket
1581 
        wire          rsp_demux_008_src1_valid;                                    // rsp_demux_008:src1_valid -> rsp_mux_001:sink8_valid
1582 
        wire  [128:0] rsp_demux_008_src1_data;                                     // rsp_demux_008:src1_data -> rsp_mux_001:sink8_data
1583 
        wire          rsp_demux_008_src1_ready;                                    // rsp_mux_001:sink8_ready -> rsp_demux_008:src1_ready
1584 
        wire   [21:0] rsp_demux_008_src1_channel;                                  // rsp_demux_008:src1_channel -> rsp_mux_001:sink8_channel
1585 
        wire          rsp_demux_008_src1_startofpacket;                            // rsp_demux_008:src1_startofpacket -> rsp_mux_001:sink8_startofpacket
1586 
        wire          rsp_demux_008_src1_endofpacket;                              // rsp_demux_008:src1_endofpacket -> rsp_mux_001:sink8_endofpacket
1587 
        wire          rsp_demux_009_src0_valid;                                    // rsp_demux_009:src0_valid -> rsp_mux:sink9_valid
1588 
        wire  [128:0] rsp_demux_009_src0_data;                                     // rsp_demux_009:src0_data -> rsp_mux:sink9_data
1589 
        wire          rsp_demux_009_src0_ready;                                    // rsp_mux:sink9_ready -> rsp_demux_009:src0_ready
1590 
        wire   [21:0] rsp_demux_009_src0_channel;                                  // rsp_demux_009:src0_channel -> rsp_mux:sink9_channel
1591 
        wire          rsp_demux_009_src0_startofpacket;                            // rsp_demux_009:src0_startofpacket -> rsp_mux:sink9_startofpacket
1592 
        wire          rsp_demux_009_src0_endofpacket;                              // rsp_demux_009:src0_endofpacket -> rsp_mux:sink9_endofpacket
1593 
        wire          rsp_demux_009_src1_valid;                                    // rsp_demux_009:src1_valid -> rsp_mux_001:sink9_valid
1594 
        wire  [128:0] rsp_demux_009_src1_data;                                     // rsp_demux_009:src1_data -> rsp_mux_001:sink9_data
1595 
        wire          rsp_demux_009_src1_ready;                                    // rsp_mux_001:sink9_ready -> rsp_demux_009:src1_ready
1596 
        wire   [21:0] rsp_demux_009_src1_channel;                                  // rsp_demux_009:src1_channel -> rsp_mux_001:sink9_channel
1597 
        wire          rsp_demux_009_src1_startofpacket;                            // rsp_demux_009:src1_startofpacket -> rsp_mux_001:sink9_startofpacket
1598 
        wire          rsp_demux_009_src1_endofpacket;                              // rsp_demux_009:src1_endofpacket -> rsp_mux_001:sink9_endofpacket
1599 
        wire          rsp_demux_010_src0_valid;                                    // rsp_demux_010:src0_valid -> rsp_mux:sink10_valid
1600 
        wire  [128:0] rsp_demux_010_src0_data;                                     // rsp_demux_010:src0_data -> rsp_mux:sink10_data
1601 
        wire          rsp_demux_010_src0_ready;                                    // rsp_mux:sink10_ready -> rsp_demux_010:src0_ready
1602 
        wire   [21:0] rsp_demux_010_src0_channel;                                  // rsp_demux_010:src0_channel -> rsp_mux:sink10_channel
1603 
        wire          rsp_demux_010_src0_startofpacket;                            // rsp_demux_010:src0_startofpacket -> rsp_mux:sink10_startofpacket
1604 
        wire          rsp_demux_010_src0_endofpacket;                              // rsp_demux_010:src0_endofpacket -> rsp_mux:sink10_endofpacket
1605 
        wire          rsp_demux_010_src1_valid;                                    // rsp_demux_010:src1_valid -> rsp_mux_001:sink10_valid
1606 
        wire  [128:0] rsp_demux_010_src1_data;                                     // rsp_demux_010:src1_data -> rsp_mux_001:sink10_data
1607 
        wire          rsp_demux_010_src1_ready;                                    // rsp_mux_001:sink10_ready -> rsp_demux_010:src1_ready
1608 
        wire   [21:0] rsp_demux_010_src1_channel;                                  // rsp_demux_010:src1_channel -> rsp_mux_001:sink10_channel
1609 
        wire          rsp_demux_010_src1_startofpacket;                            // rsp_demux_010:src1_startofpacket -> rsp_mux_001:sink10_startofpacket
1610 
        wire          rsp_demux_010_src1_endofpacket;                              // rsp_demux_010:src1_endofpacket -> rsp_mux_001:sink10_endofpacket
1611 
        wire          rsp_demux_011_src0_valid;                                    // rsp_demux_011:src0_valid -> rsp_mux:sink11_valid
1612 
        wire  [128:0] rsp_demux_011_src0_data;                                     // rsp_demux_011:src0_data -> rsp_mux:sink11_data
1613 
        wire          rsp_demux_011_src0_ready;                                    // rsp_mux:sink11_ready -> rsp_demux_011:src0_ready
1614 
        wire   [21:0] rsp_demux_011_src0_channel;                                  // rsp_demux_011:src0_channel -> rsp_mux:sink11_channel
1615 
        wire          rsp_demux_011_src0_startofpacket;                            // rsp_demux_011:src0_startofpacket -> rsp_mux:sink11_startofpacket
1616 
        wire          rsp_demux_011_src0_endofpacket;                              // rsp_demux_011:src0_endofpacket -> rsp_mux:sink11_endofpacket
1617 
        wire          rsp_demux_011_src1_valid;                                    // rsp_demux_011:src1_valid -> rsp_mux_001:sink11_valid
1618 
        wire  [128:0] rsp_demux_011_src1_data;                                     // rsp_demux_011:src1_data -> rsp_mux_001:sink11_data
1619 
        wire          rsp_demux_011_src1_ready;                                    // rsp_mux_001:sink11_ready -> rsp_demux_011:src1_ready
1620 
        wire   [21:0] rsp_demux_011_src1_channel;                                  // rsp_demux_011:src1_channel -> rsp_mux_001:sink11_channel
1621 
        wire          rsp_demux_011_src1_startofpacket;                            // rsp_demux_011:src1_startofpacket -> rsp_mux_001:sink11_startofpacket
1622 
        wire          rsp_demux_011_src1_endofpacket;                              // rsp_demux_011:src1_endofpacket -> rsp_mux_001:sink11_endofpacket
1623 
        wire          rsp_demux_012_src0_valid;                                    // rsp_demux_012:src0_valid -> rsp_mux:sink12_valid
1624 
        wire  [128:0] rsp_demux_012_src0_data;                                     // rsp_demux_012:src0_data -> rsp_mux:sink12_data
1625 
        wire          rsp_demux_012_src0_ready;                                    // rsp_mux:sink12_ready -> rsp_demux_012:src0_ready
1626 
        wire   [21:0] rsp_demux_012_src0_channel;                                  // rsp_demux_012:src0_channel -> rsp_mux:sink12_channel
1627 
        wire          rsp_demux_012_src0_startofpacket;                            // rsp_demux_012:src0_startofpacket -> rsp_mux:sink12_startofpacket
1628 
        wire          rsp_demux_012_src0_endofpacket;                              // rsp_demux_012:src0_endofpacket -> rsp_mux:sink12_endofpacket
1629 
        wire          rsp_demux_012_src1_valid;                                    // rsp_demux_012:src1_valid -> rsp_mux_001:sink12_valid
1630 
        wire  [128:0] rsp_demux_012_src1_data;                                     // rsp_demux_012:src1_data -> rsp_mux_001:sink12_data
1631 
        wire          rsp_demux_012_src1_ready;                                    // rsp_mux_001:sink12_ready -> rsp_demux_012:src1_ready
1632 
        wire   [21:0] rsp_demux_012_src1_channel;                                  // rsp_demux_012:src1_channel -> rsp_mux_001:sink12_channel
1633 
        wire          rsp_demux_012_src1_startofpacket;                            // rsp_demux_012:src1_startofpacket -> rsp_mux_001:sink12_startofpacket
1634 
        wire          rsp_demux_012_src1_endofpacket;                              // rsp_demux_012:src1_endofpacket -> rsp_mux_001:sink12_endofpacket
1635 
        wire          rsp_demux_013_src0_valid;                                    // rsp_demux_013:src0_valid -> rsp_mux:sink13_valid
1636 
        wire  [128:0] rsp_demux_013_src0_data;                                     // rsp_demux_013:src0_data -> rsp_mux:sink13_data
1637 
        wire          rsp_demux_013_src0_ready;                                    // rsp_mux:sink13_ready -> rsp_demux_013:src0_ready
1638 
        wire   [21:0] rsp_demux_013_src0_channel;                                  // rsp_demux_013:src0_channel -> rsp_mux:sink13_channel
1639 
        wire          rsp_demux_013_src0_startofpacket;                            // rsp_demux_013:src0_startofpacket -> rsp_mux:sink13_startofpacket
1640 
        wire          rsp_demux_013_src0_endofpacket;                              // rsp_demux_013:src0_endofpacket -> rsp_mux:sink13_endofpacket
1641 
        wire          rsp_demux_013_src1_valid;                                    // rsp_demux_013:src1_valid -> rsp_mux_001:sink13_valid
1642 
        wire  [128:0] rsp_demux_013_src1_data;                                     // rsp_demux_013:src1_data -> rsp_mux_001:sink13_data
1643 
        wire          rsp_demux_013_src1_ready;                                    // rsp_mux_001:sink13_ready -> rsp_demux_013:src1_ready
1644 
        wire   [21:0] rsp_demux_013_src1_channel;                                  // rsp_demux_013:src1_channel -> rsp_mux_001:sink13_channel
1645 
        wire          rsp_demux_013_src1_startofpacket;                            // rsp_demux_013:src1_startofpacket -> rsp_mux_001:sink13_startofpacket
1646 
        wire          rsp_demux_013_src1_endofpacket;                              // rsp_demux_013:src1_endofpacket -> rsp_mux_001:sink13_endofpacket
1647 
        wire          rsp_demux_014_src0_valid;                                    // rsp_demux_014:src0_valid -> rsp_mux:sink14_valid
1648 
        wire  [128:0] rsp_demux_014_src0_data;                                     // rsp_demux_014:src0_data -> rsp_mux:sink14_data
1649 
        wire          rsp_demux_014_src0_ready;                                    // rsp_mux:sink14_ready -> rsp_demux_014:src0_ready
1650 
        wire   [21:0] rsp_demux_014_src0_channel;                                  // rsp_demux_014:src0_channel -> rsp_mux:sink14_channel
1651 
        wire          rsp_demux_014_src0_startofpacket;                            // rsp_demux_014:src0_startofpacket -> rsp_mux:sink14_startofpacket
1652 
        wire          rsp_demux_014_src0_endofpacket;                              // rsp_demux_014:src0_endofpacket -> rsp_mux:sink14_endofpacket
1653 
        wire          rsp_demux_014_src1_valid;                                    // rsp_demux_014:src1_valid -> rsp_mux_001:sink14_valid
1654 
        wire  [128:0] rsp_demux_014_src1_data;                                     // rsp_demux_014:src1_data -> rsp_mux_001:sink14_data
1655 
        wire          rsp_demux_014_src1_ready;                                    // rsp_mux_001:sink14_ready -> rsp_demux_014:src1_ready
1656 
        wire   [21:0] rsp_demux_014_src1_channel;                                  // rsp_demux_014:src1_channel -> rsp_mux_001:sink14_channel
1657 
        wire          rsp_demux_014_src1_startofpacket;                            // rsp_demux_014:src1_startofpacket -> rsp_mux_001:sink14_startofpacket
1658 
        wire          rsp_demux_014_src1_endofpacket;                              // rsp_demux_014:src1_endofpacket -> rsp_mux_001:sink14_endofpacket
1659 
        wire          rsp_demux_015_src0_valid;                                    // rsp_demux_015:src0_valid -> rsp_mux:sink15_valid
1660 
        wire  [128:0] rsp_demux_015_src0_data;                                     // rsp_demux_015:src0_data -> rsp_mux:sink15_data
1661 
        wire          rsp_demux_015_src0_ready;                                    // rsp_mux:sink15_ready -> rsp_demux_015:src0_ready
1662 
        wire   [21:0] rsp_demux_015_src0_channel;                                  // rsp_demux_015:src0_channel -> rsp_mux:sink15_channel
1663 
        wire          rsp_demux_015_src0_startofpacket;                            // rsp_demux_015:src0_startofpacket -> rsp_mux:sink15_startofpacket
1664 
        wire          rsp_demux_015_src0_endofpacket;                              // rsp_demux_015:src0_endofpacket -> rsp_mux:sink15_endofpacket
1665 
        wire          rsp_demux_015_src1_valid;                                    // rsp_demux_015:src1_valid -> rsp_mux_001:sink15_valid
1666 
        wire  [128:0] rsp_demux_015_src1_data;                                     // rsp_demux_015:src1_data -> rsp_mux_001:sink15_data
1667 
        wire          rsp_demux_015_src1_ready;                                    // rsp_mux_001:sink15_ready -> rsp_demux_015:src1_ready
1668 
        wire   [21:0] rsp_demux_015_src1_channel;                                  // rsp_demux_015:src1_channel -> rsp_mux_001:sink15_channel
1669 
        wire          rsp_demux_015_src1_startofpacket;                            // rsp_demux_015:src1_startofpacket -> rsp_mux_001:sink15_startofpacket
1670 
        wire          rsp_demux_015_src1_endofpacket;                              // rsp_demux_015:src1_endofpacket -> rsp_mux_001:sink15_endofpacket
1671 
        wire          rsp_demux_016_src0_valid;                                    // rsp_demux_016:src0_valid -> rsp_mux:sink16_valid
1672 
        wire  [128:0] rsp_demux_016_src0_data;                                     // rsp_demux_016:src0_data -> rsp_mux:sink16_data
1673 
        wire          rsp_demux_016_src0_ready;                                    // rsp_mux:sink16_ready -> rsp_demux_016:src0_ready
1674 
        wire   [21:0] rsp_demux_016_src0_channel;                                  // rsp_demux_016:src0_channel -> rsp_mux:sink16_channel
1675 
        wire          rsp_demux_016_src0_startofpacket;                            // rsp_demux_016:src0_startofpacket -> rsp_mux:sink16_startofpacket
1676 
        wire          rsp_demux_016_src0_endofpacket;                              // rsp_demux_016:src0_endofpacket -> rsp_mux:sink16_endofpacket
1677 
        wire          rsp_demux_016_src1_valid;                                    // rsp_demux_016:src1_valid -> rsp_mux_001:sink16_valid
1678 
        wire  [128:0] rsp_demux_016_src1_data;                                     // rsp_demux_016:src1_data -> rsp_mux_001:sink16_data
1679 
        wire          rsp_demux_016_src1_ready;                                    // rsp_mux_001:sink16_ready -> rsp_demux_016:src1_ready
1680 
        wire   [21:0] rsp_demux_016_src1_channel;                                  // rsp_demux_016:src1_channel -> rsp_mux_001:sink16_channel
1681 
        wire          rsp_demux_016_src1_startofpacket;                            // rsp_demux_016:src1_startofpacket -> rsp_mux_001:sink16_startofpacket
1682 
        wire          rsp_demux_016_src1_endofpacket;                              // rsp_demux_016:src1_endofpacket -> rsp_mux_001:sink16_endofpacket
1683 
        wire          rsp_demux_017_src0_valid;                                    // rsp_demux_017:src0_valid -> rsp_mux:sink17_valid
1684 
        wire  [128:0] rsp_demux_017_src0_data;                                     // rsp_demux_017:src0_data -> rsp_mux:sink17_data
1685 
        wire          rsp_demux_017_src0_ready;                                    // rsp_mux:sink17_ready -> rsp_demux_017:src0_ready
1686 
        wire   [21:0] rsp_demux_017_src0_channel;                                  // rsp_demux_017:src0_channel -> rsp_mux:sink17_channel
1687 
        wire          rsp_demux_017_src0_startofpacket;                            // rsp_demux_017:src0_startofpacket -> rsp_mux:sink17_startofpacket
1688 
        wire          rsp_demux_017_src0_endofpacket;                              // rsp_demux_017:src0_endofpacket -> rsp_mux:sink17_endofpacket
1689 
        wire          rsp_demux_017_src1_valid;                                    // rsp_demux_017:src1_valid -> rsp_mux_001:sink17_valid
1690 
        wire  [128:0] rsp_demux_017_src1_data;                                     // rsp_demux_017:src1_data -> rsp_mux_001:sink17_data
1691 
        wire          rsp_demux_017_src1_ready;                                    // rsp_mux_001:sink17_ready -> rsp_demux_017:src1_ready
1692 
        wire   [21:0] rsp_demux_017_src1_channel;                                  // rsp_demux_017:src1_channel -> rsp_mux_001:sink17_channel
1693 
        wire          rsp_demux_017_src1_startofpacket;                            // rsp_demux_017:src1_startofpacket -> rsp_mux_001:sink17_startofpacket
1694 
        wire          rsp_demux_017_src1_endofpacket;                              // rsp_demux_017:src1_endofpacket -> rsp_mux_001:sink17_endofpacket
1695 
        wire          rsp_demux_018_src0_valid;                                    // rsp_demux_018:src0_valid -> rsp_mux:sink18_valid
1696 
        wire  [128:0] rsp_demux_018_src0_data;                                     // rsp_demux_018:src0_data -> rsp_mux:sink18_data
1697 
        wire          rsp_demux_018_src0_ready;                                    // rsp_mux:sink18_ready -> rsp_demux_018:src0_ready
1698 
        wire   [21:0] rsp_demux_018_src0_channel;                                  // rsp_demux_018:src0_channel -> rsp_mux:sink18_channel
1699 
        wire          rsp_demux_018_src0_startofpacket;                            // rsp_demux_018:src0_startofpacket -> rsp_mux:sink18_startofpacket
1700 
        wire          rsp_demux_018_src0_endofpacket;                              // rsp_demux_018:src0_endofpacket -> rsp_mux:sink18_endofpacket
1701 
        wire          rsp_demux_018_src1_valid;                                    // rsp_demux_018:src1_valid -> rsp_mux_001:sink18_valid
1702 
        wire  [128:0] rsp_demux_018_src1_data;                                     // rsp_demux_018:src1_data -> rsp_mux_001:sink18_data
1703 
        wire          rsp_demux_018_src1_ready;                                    // rsp_mux_001:sink18_ready -> rsp_demux_018:src1_ready
1704 
        wire   [21:0] rsp_demux_018_src1_channel;                                  // rsp_demux_018:src1_channel -> rsp_mux_001:sink18_channel
1705 
        wire          rsp_demux_018_src1_startofpacket;                            // rsp_demux_018:src1_startofpacket -> rsp_mux_001:sink18_startofpacket
1706 
        wire          rsp_demux_018_src1_endofpacket;                              // rsp_demux_018:src1_endofpacket -> rsp_mux_001:sink18_endofpacket
1707 
        wire          rsp_demux_019_src0_valid;                                    // rsp_demux_019:src0_valid -> rsp_mux:sink19_valid
1708 
        wire  [128:0] rsp_demux_019_src0_data;                                     // rsp_demux_019:src0_data -> rsp_mux:sink19_data
1709 
        wire          rsp_demux_019_src0_ready;                                    // rsp_mux:sink19_ready -> rsp_demux_019:src0_ready
1710 
        wire   [21:0] rsp_demux_019_src0_channel;                                  // rsp_demux_019:src0_channel -> rsp_mux:sink19_channel
1711 
        wire          rsp_demux_019_src0_startofpacket;                            // rsp_demux_019:src0_startofpacket -> rsp_mux:sink19_startofpacket
1712 
        wire          rsp_demux_019_src0_endofpacket;                              // rsp_demux_019:src0_endofpacket -> rsp_mux:sink19_endofpacket
1713 
        wire          rsp_demux_019_src1_valid;                                    // rsp_demux_019:src1_valid -> rsp_mux_001:sink19_valid
1714 
        wire  [128:0] rsp_demux_019_src1_data;                                     // rsp_demux_019:src1_data -> rsp_mux_001:sink19_data
1715 
        wire          rsp_demux_019_src1_ready;                                    // rsp_mux_001:sink19_ready -> rsp_demux_019:src1_ready
1716 
        wire   [21:0] rsp_demux_019_src1_channel;                                  // rsp_demux_019:src1_channel -> rsp_mux_001:sink19_channel
1717 
        wire          rsp_demux_019_src1_startofpacket;                            // rsp_demux_019:src1_startofpacket -> rsp_mux_001:sink19_startofpacket
1718 
        wire          rsp_demux_019_src1_endofpacket;                              // rsp_demux_019:src1_endofpacket -> rsp_mux_001:sink19_endofpacket
1719 
        wire          rsp_demux_020_src0_valid;                                    // rsp_demux_020:src0_valid -> rsp_mux:sink20_valid
1720 
        wire  [128:0] rsp_demux_020_src0_data;                                     // rsp_demux_020:src0_data -> rsp_mux:sink20_data
1721 
        wire          rsp_demux_020_src0_ready;                                    // rsp_mux:sink20_ready -> rsp_demux_020:src0_ready
1722 
        wire   [21:0] rsp_demux_020_src0_channel;                                  // rsp_demux_020:src0_channel -> rsp_mux:sink20_channel
1723 
        wire          rsp_demux_020_src0_startofpacket;                            // rsp_demux_020:src0_startofpacket -> rsp_mux:sink20_startofpacket
1724 
        wire          rsp_demux_020_src0_endofpacket;                              // rsp_demux_020:src0_endofpacket -> rsp_mux:sink20_endofpacket
1725 
        wire          rsp_demux_020_src1_valid;                                    // rsp_demux_020:src1_valid -> rsp_mux_001:sink20_valid
1726 
        wire  [128:0] rsp_demux_020_src1_data;                                     // rsp_demux_020:src1_data -> rsp_mux_001:sink20_data
1727 
        wire          rsp_demux_020_src1_ready;                                    // rsp_mux_001:sink20_ready -> rsp_demux_020:src1_ready
1728 
        wire   [21:0] rsp_demux_020_src1_channel;                                  // rsp_demux_020:src1_channel -> rsp_mux_001:sink20_channel
1729 
        wire          rsp_demux_020_src1_startofpacket;                            // rsp_demux_020:src1_startofpacket -> rsp_mux_001:sink20_startofpacket
1730 
        wire          rsp_demux_020_src1_endofpacket;                              // rsp_demux_020:src1_endofpacket -> rsp_mux_001:sink20_endofpacket
1731 
        wire          rsp_demux_021_src0_valid;                                    // rsp_demux_021:src0_valid -> rsp_mux:sink21_valid
1732 
        wire  [128:0] rsp_demux_021_src0_data;                                     // rsp_demux_021:src0_data -> rsp_mux:sink21_data
1733 
        wire          rsp_demux_021_src0_ready;                                    // rsp_mux:sink21_ready -> rsp_demux_021:src0_ready
1734 
        wire   [21:0] rsp_demux_021_src0_channel;                                  // rsp_demux_021:src0_channel -> rsp_mux:sink21_channel
1735 
        wire          rsp_demux_021_src0_startofpacket;                            // rsp_demux_021:src0_startofpacket -> rsp_mux:sink21_startofpacket
1736 
        wire          rsp_demux_021_src0_endofpacket;                              // rsp_demux_021:src0_endofpacket -> rsp_mux:sink21_endofpacket
1737 
        wire          rsp_demux_021_src1_valid;                                    // rsp_demux_021:src1_valid -> rsp_mux_001:sink21_valid
1738 
        wire  [128:0] rsp_demux_021_src1_data;                                     // rsp_demux_021:src1_data -> rsp_mux_001:sink21_data
1739 
        wire          rsp_demux_021_src1_ready;                                    // rsp_mux_001:sink21_ready -> rsp_demux_021:src1_ready
1740 
        wire   [21:0] rsp_demux_021_src1_channel;                                  // rsp_demux_021:src1_channel -> rsp_mux_001:sink21_channel
1741 
        wire          rsp_demux_021_src1_startofpacket;                            // rsp_demux_021:src1_startofpacket -> rsp_mux_001:sink21_startofpacket
1742 
        wire          rsp_demux_021_src1_endofpacket;                              // rsp_demux_021:src1_endofpacket -> rsp_mux_001:sink21_endofpacket
1743 
        wire   [21:0] hps_0_h2f_axi_master_wr_limiter_cmd_valid_data;              // hps_0_h2f_axi_master_wr_limiter:cmd_src_valid -> cmd_demux:sink_valid
1744 
        wire   [21:0] hps_0_h2f_axi_master_rd_limiter_cmd_valid_data;              // hps_0_h2f_axi_master_rd_limiter:cmd_src_valid -> cmd_demux_001:sink_valid
1745 
        wire          led_pio_test_s1_agent_rdata_fifo_out_valid;                  // led_pio_test_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter:in_0_valid
1746 
        wire   [33:0] led_pio_test_s1_agent_rdata_fifo_out_data;                   // led_pio_test_s1_agent_rdata_fifo:out_data -> avalon_st_adapter:in_0_data
1747 
        wire          led_pio_test_s1_agent_rdata_fifo_out_ready;                  // avalon_st_adapter:in_0_ready -> led_pio_test_s1_agent_rdata_fifo:out_ready
1748 
        wire          avalon_st_adapter_out_0_valid;                               // avalon_st_adapter:out_0_valid -> led_pio_test_s1_agent:rdata_fifo_sink_valid
1749 
        wire   [33:0] avalon_st_adapter_out_0_data;                                // avalon_st_adapter:out_0_data -> led_pio_test_s1_agent:rdata_fifo_sink_data
1750 
        wire          avalon_st_adapter_out_0_ready;                               // led_pio_test_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter:out_0_ready
1751 
        wire    [0:0] avalon_st_adapter_out_0_error;                               // avalon_st_adapter:out_0_error -> led_pio_test_s1_agent:rdata_fifo_sink_error
1752 
        wire          timecode_rx_s1_agent_rdata_fifo_out_valid;                   // timecode_rx_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_001:in_0_valid
1753 
        wire   [33:0] timecode_rx_s1_agent_rdata_fifo_out_data;                    // timecode_rx_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_001:in_0_data
1754 
        wire          timecode_rx_s1_agent_rdata_fifo_out_ready;                   // avalon_st_adapter_001:in_0_ready -> timecode_rx_s1_agent_rdata_fifo:out_ready
1755 
        wire          avalon_st_adapter_001_out_0_valid;                           // avalon_st_adapter_001:out_0_valid -> timecode_rx_s1_agent:rdata_fifo_sink_valid
1756 
        wire   [33:0] avalon_st_adapter_001_out_0_data;                            // avalon_st_adapter_001:out_0_data -> timecode_rx_s1_agent:rdata_fifo_sink_data
1757 
        wire          avalon_st_adapter_001_out_0_ready;                           // timecode_rx_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_001:out_0_ready
1758 
        wire    [0:0] avalon_st_adapter_001_out_0_error;                           // avalon_st_adapter_001:out_0_error -> timecode_rx_s1_agent:rdata_fifo_sink_error
1759 
        wire          timecode_ready_rx_s1_agent_rdata_fifo_out_valid;             // timecode_ready_rx_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_002:in_0_valid
1760 
        wire   [33:0] timecode_ready_rx_s1_agent_rdata_fifo_out_data;              // timecode_ready_rx_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_002:in_0_data
1761 
        wire          timecode_ready_rx_s1_agent_rdata_fifo_out_ready;             // avalon_st_adapter_002:in_0_ready -> timecode_ready_rx_s1_agent_rdata_fifo:out_ready
1762 
        wire          avalon_st_adapter_002_out_0_valid;                           // avalon_st_adapter_002:out_0_valid -> timecode_ready_rx_s1_agent:rdata_fifo_sink_valid
1763 
        wire   [33:0] avalon_st_adapter_002_out_0_data;                            // avalon_st_adapter_002:out_0_data -> timecode_ready_rx_s1_agent:rdata_fifo_sink_data
1764 
        wire          avalon_st_adapter_002_out_0_ready;                           // timecode_ready_rx_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_002:out_0_ready
1765 
        wire    [0:0] avalon_st_adapter_002_out_0_error;                           // avalon_st_adapter_002:out_0_error -> timecode_ready_rx_s1_agent:rdata_fifo_sink_error
1766 
        wire          data_flag_rx_s1_agent_rdata_fifo_out_valid;                  // data_flag_rx_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_003:in_0_valid
1767 
        wire   [33:0] data_flag_rx_s1_agent_rdata_fifo_out_data;                   // data_flag_rx_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_003:in_0_data
1768 
        wire          data_flag_rx_s1_agent_rdata_fifo_out_ready;                  // avalon_st_adapter_003:in_0_ready -> data_flag_rx_s1_agent_rdata_fifo:out_ready
1769 
        wire          avalon_st_adapter_003_out_0_valid;                           // avalon_st_adapter_003:out_0_valid -> data_flag_rx_s1_agent:rdata_fifo_sink_valid
1770 
        wire   [33:0] avalon_st_adapter_003_out_0_data;                            // avalon_st_adapter_003:out_0_data -> data_flag_rx_s1_agent:rdata_fifo_sink_data
1771 
        wire          avalon_st_adapter_003_out_0_ready;                           // data_flag_rx_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_003:out_0_ready
1772 
        wire    [0:0] avalon_st_adapter_003_out_0_error;                           // avalon_st_adapter_003:out_0_error -> data_flag_rx_s1_agent:rdata_fifo_sink_error
1773 
        wire          data_read_en_rx_s1_agent_rdata_fifo_out_valid;               // data_read_en_rx_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_004:in_0_valid
1774 
        wire   [33:0] data_read_en_rx_s1_agent_rdata_fifo_out_data;                // data_read_en_rx_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_004:in_0_data
1775 
        wire          data_read_en_rx_s1_agent_rdata_fifo_out_ready;               // avalon_st_adapter_004:in_0_ready -> data_read_en_rx_s1_agent_rdata_fifo:out_ready
1776 
        wire          avalon_st_adapter_004_out_0_valid;                           // avalon_st_adapter_004:out_0_valid -> data_read_en_rx_s1_agent:rdata_fifo_sink_valid
1777 
        wire   [33:0] avalon_st_adapter_004_out_0_data;                            // avalon_st_adapter_004:out_0_data -> data_read_en_rx_s1_agent:rdata_fifo_sink_data
1778 
        wire          avalon_st_adapter_004_out_0_ready;                           // data_read_en_rx_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_004:out_0_ready
1779 
        wire    [0:0] avalon_st_adapter_004_out_0_error;                           // avalon_st_adapter_004:out_0_error -> data_read_en_rx_s1_agent:rdata_fifo_sink_error
1780 
        wire          fifo_full_rx_status_s1_agent_rdata_fifo_out_valid;           // fifo_full_rx_status_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_005:in_0_valid
1781 
        wire   [33:0] fifo_full_rx_status_s1_agent_rdata_fifo_out_data;            // fifo_full_rx_status_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_005:in_0_data
1782 
        wire          fifo_full_rx_status_s1_agent_rdata_fifo_out_ready;           // avalon_st_adapter_005:in_0_ready -> fifo_full_rx_status_s1_agent_rdata_fifo:out_ready
1783 
        wire          avalon_st_adapter_005_out_0_valid;                           // avalon_st_adapter_005:out_0_valid -> fifo_full_rx_status_s1_agent:rdata_fifo_sink_valid
1784 
        wire   [33:0] avalon_st_adapter_005_out_0_data;                            // avalon_st_adapter_005:out_0_data -> fifo_full_rx_status_s1_agent:rdata_fifo_sink_data
1785 
        wire          avalon_st_adapter_005_out_0_ready;                           // fifo_full_rx_status_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_005:out_0_ready
1786 
        wire    [0:0] avalon_st_adapter_005_out_0_error;                           // avalon_st_adapter_005:out_0_error -> fifo_full_rx_status_s1_agent:rdata_fifo_sink_error
1787 
        wire          fifo_empty_rx_status_s1_agent_rdata_fifo_out_valid;          // fifo_empty_rx_status_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_006:in_0_valid
1788 
        wire   [33:0] fifo_empty_rx_status_s1_agent_rdata_fifo_out_data;           // fifo_empty_rx_status_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_006:in_0_data
1789 
        wire          fifo_empty_rx_status_s1_agent_rdata_fifo_out_ready;          // avalon_st_adapter_006:in_0_ready -> fifo_empty_rx_status_s1_agent_rdata_fifo:out_ready
1790 
        wire          avalon_st_adapter_006_out_0_valid;                           // avalon_st_adapter_006:out_0_valid -> fifo_empty_rx_status_s1_agent:rdata_fifo_sink_valid
1791 
        wire   [33:0] avalon_st_adapter_006_out_0_data;                            // avalon_st_adapter_006:out_0_data -> fifo_empty_rx_status_s1_agent:rdata_fifo_sink_data
1792 
        wire          avalon_st_adapter_006_out_0_ready;                           // fifo_empty_rx_status_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_006:out_0_ready
1793 
        wire    [0:0] avalon_st_adapter_006_out_0_error;                           // avalon_st_adapter_006:out_0_error -> fifo_empty_rx_status_s1_agent:rdata_fifo_sink_error
1794 
        wire          link_start_s1_agent_rdata_fifo_out_valid;                    // link_start_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_007:in_0_valid
1795 
        wire   [33:0] link_start_s1_agent_rdata_fifo_out_data;                     // link_start_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_007:in_0_data
1796 
        wire          link_start_s1_agent_rdata_fifo_out_ready;                    // avalon_st_adapter_007:in_0_ready -> link_start_s1_agent_rdata_fifo:out_ready
1797 
        wire          avalon_st_adapter_007_out_0_valid;                           // avalon_st_adapter_007:out_0_valid -> link_start_s1_agent:rdata_fifo_sink_valid
1798 
        wire   [33:0] avalon_st_adapter_007_out_0_data;                            // avalon_st_adapter_007:out_0_data -> link_start_s1_agent:rdata_fifo_sink_data
1799 
        wire          avalon_st_adapter_007_out_0_ready;                           // link_start_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_007:out_0_ready
1800 
        wire    [0:0] avalon_st_adapter_007_out_0_error;                           // avalon_st_adapter_007:out_0_error -> link_start_s1_agent:rdata_fifo_sink_error
1801 
        wire          auto_start_s1_agent_rdata_fifo_out_valid;                    // auto_start_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_008:in_0_valid
1802 
        wire   [33:0] auto_start_s1_agent_rdata_fifo_out_data;                     // auto_start_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_008:in_0_data
1803 
        wire          auto_start_s1_agent_rdata_fifo_out_ready;                    // avalon_st_adapter_008:in_0_ready -> auto_start_s1_agent_rdata_fifo:out_ready
1804 
        wire          avalon_st_adapter_008_out_0_valid;                           // avalon_st_adapter_008:out_0_valid -> auto_start_s1_agent:rdata_fifo_sink_valid
1805 
        wire   [33:0] avalon_st_adapter_008_out_0_data;                            // avalon_st_adapter_008:out_0_data -> auto_start_s1_agent:rdata_fifo_sink_data
1806 
        wire          avalon_st_adapter_008_out_0_ready;                           // auto_start_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_008:out_0_ready
1807 
        wire    [0:0] avalon_st_adapter_008_out_0_error;                           // avalon_st_adapter_008:out_0_error -> auto_start_s1_agent:rdata_fifo_sink_error
1808 
        wire          link_disable_s1_agent_rdata_fifo_out_valid;                  // link_disable_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_009:in_0_valid
1809 
        wire   [33:0] link_disable_s1_agent_rdata_fifo_out_data;                   // link_disable_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_009:in_0_data
1810 
        wire          link_disable_s1_agent_rdata_fifo_out_ready;                  // avalon_st_adapter_009:in_0_ready -> link_disable_s1_agent_rdata_fifo:out_ready
1811 
        wire          avalon_st_adapter_009_out_0_valid;                           // avalon_st_adapter_009:out_0_valid -> link_disable_s1_agent:rdata_fifo_sink_valid
1812 
        wire   [33:0] avalon_st_adapter_009_out_0_data;                            // avalon_st_adapter_009:out_0_data -> link_disable_s1_agent:rdata_fifo_sink_data
1813 
        wire          avalon_st_adapter_009_out_0_ready;                           // link_disable_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_009:out_0_ready
1814 
        wire    [0:0] avalon_st_adapter_009_out_0_error;                           // avalon_st_adapter_009:out_0_error -> link_disable_s1_agent:rdata_fifo_sink_error
1815 
        wire          write_data_fifo_tx_s1_agent_rdata_fifo_out_valid;            // write_data_fifo_tx_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_010:in_0_valid
1816 
        wire   [33:0] write_data_fifo_tx_s1_agent_rdata_fifo_out_data;             // write_data_fifo_tx_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_010:in_0_data
1817 
        wire          write_data_fifo_tx_s1_agent_rdata_fifo_out_ready;            // avalon_st_adapter_010:in_0_ready -> write_data_fifo_tx_s1_agent_rdata_fifo:out_ready
1818 
        wire          avalon_st_adapter_010_out_0_valid;                           // avalon_st_adapter_010:out_0_valid -> write_data_fifo_tx_s1_agent:rdata_fifo_sink_valid
1819 
        wire   [33:0] avalon_st_adapter_010_out_0_data;                            // avalon_st_adapter_010:out_0_data -> write_data_fifo_tx_s1_agent:rdata_fifo_sink_data
1820 
        wire          avalon_st_adapter_010_out_0_ready;                           // write_data_fifo_tx_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_010:out_0_ready
1821 
        wire    [0:0] avalon_st_adapter_010_out_0_error;                           // avalon_st_adapter_010:out_0_error -> write_data_fifo_tx_s1_agent:rdata_fifo_sink_error
1822 
        wire          write_en_tx_s1_agent_rdata_fifo_out_valid;                   // write_en_tx_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_011:in_0_valid
1823 
        wire   [33:0] write_en_tx_s1_agent_rdata_fifo_out_data;                    // write_en_tx_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_011:in_0_data
1824 
        wire          write_en_tx_s1_agent_rdata_fifo_out_ready;                   // avalon_st_adapter_011:in_0_ready -> write_en_tx_s1_agent_rdata_fifo:out_ready
1825 
        wire          avalon_st_adapter_011_out_0_valid;                           // avalon_st_adapter_011:out_0_valid -> write_en_tx_s1_agent:rdata_fifo_sink_valid
1826 
        wire   [33:0] avalon_st_adapter_011_out_0_data;                            // avalon_st_adapter_011:out_0_data -> write_en_tx_s1_agent:rdata_fifo_sink_data
1827 
        wire          avalon_st_adapter_011_out_0_ready;                           // write_en_tx_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_011:out_0_ready
1828 
        wire    [0:0] avalon_st_adapter_011_out_0_error;                           // avalon_st_adapter_011:out_0_error -> write_en_tx_s1_agent:rdata_fifo_sink_error
1829 
        wire          fifo_full_tx_status_s1_agent_rdata_fifo_out_valid;           // fifo_full_tx_status_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_012:in_0_valid
1830 
        wire   [33:0] fifo_full_tx_status_s1_agent_rdata_fifo_out_data;            // fifo_full_tx_status_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_012:in_0_data
1831 
        wire          fifo_full_tx_status_s1_agent_rdata_fifo_out_ready;           // avalon_st_adapter_012:in_0_ready -> fifo_full_tx_status_s1_agent_rdata_fifo:out_ready
1832 
        wire          avalon_st_adapter_012_out_0_valid;                           // avalon_st_adapter_012:out_0_valid -> fifo_full_tx_status_s1_agent:rdata_fifo_sink_valid
1833 
        wire   [33:0] avalon_st_adapter_012_out_0_data;                            // avalon_st_adapter_012:out_0_data -> fifo_full_tx_status_s1_agent:rdata_fifo_sink_data
1834 
        wire          avalon_st_adapter_012_out_0_ready;                           // fifo_full_tx_status_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_012:out_0_ready
1835 
        wire    [0:0] avalon_st_adapter_012_out_0_error;                           // avalon_st_adapter_012:out_0_error -> fifo_full_tx_status_s1_agent:rdata_fifo_sink_error
1836 
        wire          fifo_empty_tx_status_s1_agent_rdata_fifo_out_valid;          // fifo_empty_tx_status_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_013:in_0_valid
1837 
        wire   [33:0] fifo_empty_tx_status_s1_agent_rdata_fifo_out_data;           // fifo_empty_tx_status_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_013:in_0_data
1838 
        wire          fifo_empty_tx_status_s1_agent_rdata_fifo_out_ready;          // avalon_st_adapter_013:in_0_ready -> fifo_empty_tx_status_s1_agent_rdata_fifo:out_ready
1839 
        wire          avalon_st_adapter_013_out_0_valid;                           // avalon_st_adapter_013:out_0_valid -> fifo_empty_tx_status_s1_agent:rdata_fifo_sink_valid
1840 
        wire   [33:0] avalon_st_adapter_013_out_0_data;                            // avalon_st_adapter_013:out_0_data -> fifo_empty_tx_status_s1_agent:rdata_fifo_sink_data
1841 
        wire          avalon_st_adapter_013_out_0_ready;                           // fifo_empty_tx_status_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_013:out_0_ready
1842 
        wire    [0:0] avalon_st_adapter_013_out_0_error;                           // avalon_st_adapter_013:out_0_error -> fifo_empty_tx_status_s1_agent:rdata_fifo_sink_error
1843 
        wire          timecode_tx_data_s1_agent_rdata_fifo_out_valid;              // timecode_tx_data_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_014:in_0_valid
1844 
        wire   [33:0] timecode_tx_data_s1_agent_rdata_fifo_out_data;               // timecode_tx_data_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_014:in_0_data
1845 
        wire          timecode_tx_data_s1_agent_rdata_fifo_out_ready;              // avalon_st_adapter_014:in_0_ready -> timecode_tx_data_s1_agent_rdata_fifo:out_ready
1846 
        wire          avalon_st_adapter_014_out_0_valid;                           // avalon_st_adapter_014:out_0_valid -> timecode_tx_data_s1_agent:rdata_fifo_sink_valid
1847 
        wire   [33:0] avalon_st_adapter_014_out_0_data;                            // avalon_st_adapter_014:out_0_data -> timecode_tx_data_s1_agent:rdata_fifo_sink_data
1848 
        wire          avalon_st_adapter_014_out_0_ready;                           // timecode_tx_data_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_014:out_0_ready
1849 
        wire    [0:0] avalon_st_adapter_014_out_0_error;                           // avalon_st_adapter_014:out_0_error -> timecode_tx_data_s1_agent:rdata_fifo_sink_error
1850 
        wire          timecode_tx_enable_s1_agent_rdata_fifo_out_valid;            // timecode_tx_enable_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_015:in_0_valid
1851 
        wire   [33:0] timecode_tx_enable_s1_agent_rdata_fifo_out_data;             // timecode_tx_enable_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_015:in_0_data
1852 
        wire          timecode_tx_enable_s1_agent_rdata_fifo_out_ready;            // avalon_st_adapter_015:in_0_ready -> timecode_tx_enable_s1_agent_rdata_fifo:out_ready
1853 
        wire          avalon_st_adapter_015_out_0_valid;                           // avalon_st_adapter_015:out_0_valid -> timecode_tx_enable_s1_agent:rdata_fifo_sink_valid
1854 
        wire   [33:0] avalon_st_adapter_015_out_0_data;                            // avalon_st_adapter_015:out_0_data -> timecode_tx_enable_s1_agent:rdata_fifo_sink_data
1855 
        wire          avalon_st_adapter_015_out_0_ready;                           // timecode_tx_enable_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_015:out_0_ready
1856 
        wire    [0:0] avalon_st_adapter_015_out_0_error;                           // avalon_st_adapter_015:out_0_error -> timecode_tx_enable_s1_agent:rdata_fifo_sink_error
1857 
        wire          timecode_tx_ready_s1_agent_rdata_fifo_out_valid;             // timecode_tx_ready_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_016:in_0_valid
1858 
        wire   [33:0] timecode_tx_ready_s1_agent_rdata_fifo_out_data;              // timecode_tx_ready_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_016:in_0_data
1859 
        wire          timecode_tx_ready_s1_agent_rdata_fifo_out_ready;             // avalon_st_adapter_016:in_0_ready -> timecode_tx_ready_s1_agent_rdata_fifo:out_ready
1860 
        wire          avalon_st_adapter_016_out_0_valid;                           // avalon_st_adapter_016:out_0_valid -> timecode_tx_ready_s1_agent:rdata_fifo_sink_valid
1861 
        wire   [33:0] avalon_st_adapter_016_out_0_data;                            // avalon_st_adapter_016:out_0_data -> timecode_tx_ready_s1_agent:rdata_fifo_sink_data
1862 
        wire          avalon_st_adapter_016_out_0_ready;                           // timecode_tx_ready_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_016:out_0_ready
1863 
        wire    [0:0] avalon_st_adapter_016_out_0_error;                           // avalon_st_adapter_016:out_0_error -> timecode_tx_ready_s1_agent:rdata_fifo_sink_error
1864 
        wire          data_info_s1_agent_rdata_fifo_out_valid;                     // data_info_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_017:in_0_valid
1865 
        wire   [33:0] data_info_s1_agent_rdata_fifo_out_data;                      // data_info_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_017:in_0_data
1866 
        wire          data_info_s1_agent_rdata_fifo_out_ready;                     // avalon_st_adapter_017:in_0_ready -> data_info_s1_agent_rdata_fifo:out_ready
1867 
        wire          avalon_st_adapter_017_out_0_valid;                           // avalon_st_adapter_017:out_0_valid -> data_info_s1_agent:rdata_fifo_sink_valid
1868 
        wire   [33:0] avalon_st_adapter_017_out_0_data;                            // avalon_st_adapter_017:out_0_data -> data_info_s1_agent:rdata_fifo_sink_data
1869 
        wire          avalon_st_adapter_017_out_0_ready;                           // data_info_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_017:out_0_ready
1870 
        wire    [0:0] avalon_st_adapter_017_out_0_error;                           // avalon_st_adapter_017:out_0_error -> data_info_s1_agent:rdata_fifo_sink_error
1871 
        wire          clock_sel_s1_agent_rdata_fifo_out_valid;                     // clock_sel_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_018:in_0_valid
1872 
        wire   [33:0] clock_sel_s1_agent_rdata_fifo_out_data;                      // clock_sel_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_018:in_0_data
1873 
        wire          clock_sel_s1_agent_rdata_fifo_out_ready;                     // avalon_st_adapter_018:in_0_ready -> clock_sel_s1_agent_rdata_fifo:out_ready
1874 
        wire          avalon_st_adapter_018_out_0_valid;                           // avalon_st_adapter_018:out_0_valid -> clock_sel_s1_agent:rdata_fifo_sink_valid
1875 
        wire   [33:0] avalon_st_adapter_018_out_0_data;                            // avalon_st_adapter_018:out_0_data -> clock_sel_s1_agent:rdata_fifo_sink_data
1876 
        wire          avalon_st_adapter_018_out_0_ready;                           // clock_sel_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_018:out_0_ready
1877 
        wire    [0:0] avalon_st_adapter_018_out_0_error;                           // avalon_st_adapter_018:out_0_error -> clock_sel_s1_agent:rdata_fifo_sink_error
1878 
        wire          fsm_info_s1_agent_rdata_fifo_out_valid;                      // fsm_info_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_019:in_0_valid
1879 
        wire   [33:0] fsm_info_s1_agent_rdata_fifo_out_data;                       // fsm_info_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_019:in_0_data
1880 
        wire          fsm_info_s1_agent_rdata_fifo_out_ready;                      // avalon_st_adapter_019:in_0_ready -> fsm_info_s1_agent_rdata_fifo:out_ready
1881 
        wire          avalon_st_adapter_019_out_0_valid;                           // avalon_st_adapter_019:out_0_valid -> fsm_info_s1_agent:rdata_fifo_sink_valid
1882 
        wire   [33:0] avalon_st_adapter_019_out_0_data;                            // avalon_st_adapter_019:out_0_data -> fsm_info_s1_agent:rdata_fifo_sink_data
1883 
        wire          avalon_st_adapter_019_out_0_ready;                           // fsm_info_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_019:out_0_ready
1884 
        wire    [0:0] avalon_st_adapter_019_out_0_error;                           // avalon_st_adapter_019:out_0_error -> fsm_info_s1_agent:rdata_fifo_sink_error
1885 
        wire          counter_tx_fifo_s1_agent_rdata_fifo_out_valid;               // counter_tx_fifo_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_020:in_0_valid
1886 
        wire   [33:0] counter_tx_fifo_s1_agent_rdata_fifo_out_data;                // counter_tx_fifo_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_020:in_0_data
1887 
        wire          counter_tx_fifo_s1_agent_rdata_fifo_out_ready;               // avalon_st_adapter_020:in_0_ready -> counter_tx_fifo_s1_agent_rdata_fifo:out_ready
1888 
        wire          avalon_st_adapter_020_out_0_valid;                           // avalon_st_adapter_020:out_0_valid -> counter_tx_fifo_s1_agent:rdata_fifo_sink_valid
1889 
        wire   [33:0] avalon_st_adapter_020_out_0_data;                            // avalon_st_adapter_020:out_0_data -> counter_tx_fifo_s1_agent:rdata_fifo_sink_data
1890 
        wire          avalon_st_adapter_020_out_0_ready;                           // counter_tx_fifo_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_020:out_0_ready
1891 
        wire    [0:0] avalon_st_adapter_020_out_0_error;                           // avalon_st_adapter_020:out_0_error -> counter_tx_fifo_s1_agent:rdata_fifo_sink_error
1892 
        wire          counter_rx_fifo_s1_agent_rdata_fifo_out_valid;               // counter_rx_fifo_s1_agent_rdata_fifo:out_valid -> avalon_st_adapter_021:in_0_valid
1893 
        wire   [33:0] counter_rx_fifo_s1_agent_rdata_fifo_out_data;                // counter_rx_fifo_s1_agent_rdata_fifo:out_data -> avalon_st_adapter_021:in_0_data
1894 
        wire          counter_rx_fifo_s1_agent_rdata_fifo_out_ready;               // avalon_st_adapter_021:in_0_ready -> counter_rx_fifo_s1_agent_rdata_fifo:out_ready
1895 
        wire          avalon_st_adapter_021_out_0_valid;                           // avalon_st_adapter_021:out_0_valid -> counter_rx_fifo_s1_agent:rdata_fifo_sink_valid
1896 
        wire   [33:0] avalon_st_adapter_021_out_0_data;                            // avalon_st_adapter_021:out_0_data -> counter_rx_fifo_s1_agent:rdata_fifo_sink_data
1897 
        wire          avalon_st_adapter_021_out_0_ready;                           // counter_rx_fifo_s1_agent:rdata_fifo_sink_ready -> avalon_st_adapter_021:out_0_ready
1898 
        wire    [0:0] avalon_st_adapter_021_out_0_error;                           // avalon_st_adapter_021:out_0_error -> counter_rx_fifo_s1_agent:rdata_fifo_sink_error
1899 
 
1900 
        altera_merlin_slave_translator #(
1901 
                .AV_ADDRESS_W                   (2),
1902 
                .AV_DATA_W                      (32),
1903 
                .UAV_DATA_W                     (32),
1904 
                .AV_BURSTCOUNT_W                (1),
1905 
                .AV_BYTEENABLE_W                (1),
1906 
                .UAV_BYTEENABLE_W               (4),
1907 
                .UAV_ADDRESS_W                  (30),
1908 
                .UAV_BURSTCOUNT_W               (3),
1909 
                .AV_READLATENCY                 (0),
1910 
                .USE_READDATAVALID              (0),
1911 
                .USE_WAITREQUEST                (0),
1912 
                .USE_UAV_CLKEN                  (0),
1913 
                .USE_READRESPONSE               (0),
1914 
                .USE_WRITERESPONSE              (0),
1915 
                .AV_SYMBOLS_PER_WORD            (4),
1916 
                .AV_ADDRESS_SYMBOLS             (0),
1917 
                .AV_BURSTCOUNT_SYMBOLS          (0),
1918 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
1919 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
1920 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
1921 
                .CHIPSELECT_THROUGH_READLATENCY (0),
1922 
                .AV_READ_WAIT_CYCLES            (1),
1923 
                .AV_WRITE_WAIT_CYCLES           (0),
1924 
                .AV_SETUP_WAIT_CYCLES           (0),
1925 
                .AV_DATA_HOLD_CYCLES            (0)
1926 
        ) led_pio_test_s1_translator (
1927 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
1928 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
1929 
                .uav_address            (led_pio_test_s1_agent_m0_address),               // avalon_universal_slave_0.address
1930 
                .uav_burstcount         (led_pio_test_s1_agent_m0_burstcount),            //                         .burstcount
1931 
                .uav_read               (led_pio_test_s1_agent_m0_read),                  //                         .read
1932 
                .uav_write              (led_pio_test_s1_agent_m0_write),                 //                         .write
1933 
                .uav_waitrequest        (led_pio_test_s1_agent_m0_waitrequest),           //                         .waitrequest
1934 
                .uav_readdatavalid      (led_pio_test_s1_agent_m0_readdatavalid),         //                         .readdatavalid
1935 
                .uav_byteenable         (led_pio_test_s1_agent_m0_byteenable),            //                         .byteenable
1936 
                .uav_readdata           (led_pio_test_s1_agent_m0_readdata),              //                         .readdata
1937 
                .uav_writedata          (led_pio_test_s1_agent_m0_writedata),             //                         .writedata
1938 
                .uav_lock               (led_pio_test_s1_agent_m0_lock),                  //                         .lock
1939 
                .uav_debugaccess        (led_pio_test_s1_agent_m0_debugaccess),           //                         .debugaccess
1940 
                .av_address             (led_pio_test_s1_address),                        //      avalon_anti_slave_0.address
1941 
                .av_write               (led_pio_test_s1_write),                          //                         .write
1942 
                .av_readdata            (led_pio_test_s1_readdata),                       //                         .readdata
1943 
                .av_writedata           (led_pio_test_s1_writedata),                      //                         .writedata
1944 
                .av_chipselect          (led_pio_test_s1_chipselect),                     //                         .chipselect
1945 
                .av_read                (),                                               //              (terminated)
1946 
                .av_begintransfer       (),                                               //              (terminated)
1947 
                .av_beginbursttransfer  (),                                               //              (terminated)
1948 
                .av_burstcount          (),                                               //              (terminated)
1949 
                .av_byteenable          (),                                               //              (terminated)
1950 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
1951 
                .av_waitrequest         (1'b0),                                           //              (terminated)
1952 
                .av_writebyteenable     (),                                               //              (terminated)
1953 
                .av_lock                (),                                               //              (terminated)
1954 
                .av_clken               (),                                               //              (terminated)
1955 
                .uav_clken              (1'b0),                                           //              (terminated)
1956 
                .av_debugaccess         (),                                               //              (terminated)
1957 
                .av_outputenable        (),                                               //              (terminated)
1958 
                .uav_response           (),                                               //              (terminated)
1959 
                .av_response            (2'b00),                                          //              (terminated)
1960 
                .uav_writeresponsevalid (),                                               //              (terminated)
1961 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
1962 
        );
1963 
 
1964 
        altera_merlin_slave_translator #(
1965 
                .AV_ADDRESS_W                   (2),
1966 
                .AV_DATA_W                      (32),
1967 
                .UAV_DATA_W                     (32),
1968 
                .AV_BURSTCOUNT_W                (1),
1969 
                .AV_BYTEENABLE_W                (1),
1970 
                .UAV_BYTEENABLE_W               (4),
1971 
                .UAV_ADDRESS_W                  (30),
1972 
                .UAV_BURSTCOUNT_W               (3),
1973 
                .AV_READLATENCY                 (0),
1974 
                .USE_READDATAVALID              (0),
1975 
                .USE_WAITREQUEST                (0),
1976 
                .USE_UAV_CLKEN                  (0),
1977 
                .USE_READRESPONSE               (0),
1978 
                .USE_WRITERESPONSE              (0),
1979 
                .AV_SYMBOLS_PER_WORD            (4),
1980 
                .AV_ADDRESS_SYMBOLS             (0),
1981 
                .AV_BURSTCOUNT_SYMBOLS          (0),
1982 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
1983 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
1984 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
1985 
                .CHIPSELECT_THROUGH_READLATENCY (0),
1986 
                .AV_READ_WAIT_CYCLES            (1),
1987 
                .AV_WRITE_WAIT_CYCLES           (0),
1988 
                .AV_SETUP_WAIT_CYCLES           (0),
1989 
                .AV_DATA_HOLD_CYCLES            (0)
1990 
        ) timecode_rx_s1_translator (
1991 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
1992 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
1993 
                .uav_address            (timecode_rx_s1_agent_m0_address),                // avalon_universal_slave_0.address
1994 
                .uav_burstcount         (timecode_rx_s1_agent_m0_burstcount),             //                         .burstcount
1995 
                .uav_read               (timecode_rx_s1_agent_m0_read),                   //                         .read
1996 
                .uav_write              (timecode_rx_s1_agent_m0_write),                  //                         .write
1997 
                .uav_waitrequest        (timecode_rx_s1_agent_m0_waitrequest),            //                         .waitrequest
1998 
                .uav_readdatavalid      (timecode_rx_s1_agent_m0_readdatavalid),          //                         .readdatavalid
1999 
                .uav_byteenable         (timecode_rx_s1_agent_m0_byteenable),             //                         .byteenable
2000 
                .uav_readdata           (timecode_rx_s1_agent_m0_readdata),               //                         .readdata
2001 
                .uav_writedata          (timecode_rx_s1_agent_m0_writedata),              //                         .writedata
2002 
                .uav_lock               (timecode_rx_s1_agent_m0_lock),                   //                         .lock
2003 
                .uav_debugaccess        (timecode_rx_s1_agent_m0_debugaccess),            //                         .debugaccess
2004 
                .av_address             (timecode_rx_s1_address),                         //      avalon_anti_slave_0.address
2005 
                .av_readdata            (timecode_rx_s1_readdata),                        //                         .readdata
2006 
                .av_write               (),                                               //              (terminated)
2007 
                .av_read                (),                                               //              (terminated)
2008 
                .av_writedata           (),                                               //              (terminated)
2009 
                .av_begintransfer       (),                                               //              (terminated)
2010 
                .av_beginbursttransfer  (),                                               //              (terminated)
2011 
                .av_burstcount          (),                                               //              (terminated)
2012 
                .av_byteenable          (),                                               //              (terminated)
2013 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
2014 
                .av_waitrequest         (1'b0),                                           //              (terminated)
2015 
                .av_writebyteenable     (),                                               //              (terminated)
2016 
                .av_lock                (),                                               //              (terminated)
2017 
                .av_chipselect          (),                                               //              (terminated)
2018 
                .av_clken               (),                                               //              (terminated)
2019 
                .uav_clken              (1'b0),                                           //              (terminated)
2020 
                .av_debugaccess         (),                                               //              (terminated)
2021 
                .av_outputenable        (),                                               //              (terminated)
2022 
                .uav_response           (),                                               //              (terminated)
2023 
                .av_response            (2'b00),                                          //              (terminated)
2024 
                .uav_writeresponsevalid (),                                               //              (terminated)
2025 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
2026 
        );
2027 
 
2028 
        altera_merlin_slave_translator #(
2029 
                .AV_ADDRESS_W                   (2),
2030 
                .AV_DATA_W                      (32),
2031 
                .UAV_DATA_W                     (32),
2032 
                .AV_BURSTCOUNT_W                (1),
2033 
                .AV_BYTEENABLE_W                (1),
2034 
                .UAV_BYTEENABLE_W               (4),
2035 
                .UAV_ADDRESS_W                  (30),
2036 
                .UAV_BURSTCOUNT_W               (3),
2037 
                .AV_READLATENCY                 (0),
2038 
                .USE_READDATAVALID              (0),
2039 
                .USE_WAITREQUEST                (0),
2040 
                .USE_UAV_CLKEN                  (0),
2041 
                .USE_READRESPONSE               (0),
2042 
                .USE_WRITERESPONSE              (0),
2043 
                .AV_SYMBOLS_PER_WORD            (4),
2044 
                .AV_ADDRESS_SYMBOLS             (0),
2045 
                .AV_BURSTCOUNT_SYMBOLS          (0),
2046 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
2047 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
2048 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
2049 
                .CHIPSELECT_THROUGH_READLATENCY (0),
2050 
                .AV_READ_WAIT_CYCLES            (1),
2051 
                .AV_WRITE_WAIT_CYCLES           (0),
2052 
                .AV_SETUP_WAIT_CYCLES           (0),
2053 
                .AV_DATA_HOLD_CYCLES            (0)
2054 
        ) timecode_ready_rx_s1_translator (
2055 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
2056 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
2057 
                .uav_address            (timecode_ready_rx_s1_agent_m0_address),          // avalon_universal_slave_0.address
2058 
                .uav_burstcount         (timecode_ready_rx_s1_agent_m0_burstcount),       //                         .burstcount
2059 
                .uav_read               (timecode_ready_rx_s1_agent_m0_read),             //                         .read
2060 
                .uav_write              (timecode_ready_rx_s1_agent_m0_write),            //                         .write
2061 
                .uav_waitrequest        (timecode_ready_rx_s1_agent_m0_waitrequest),      //                         .waitrequest
2062 
                .uav_readdatavalid      (timecode_ready_rx_s1_agent_m0_readdatavalid),    //                         .readdatavalid
2063 
                .uav_byteenable         (timecode_ready_rx_s1_agent_m0_byteenable),       //                         .byteenable
2064 
                .uav_readdata           (timecode_ready_rx_s1_agent_m0_readdata),         //                         .readdata
2065 
                .uav_writedata          (timecode_ready_rx_s1_agent_m0_writedata),        //                         .writedata
2066 
                .uav_lock               (timecode_ready_rx_s1_agent_m0_lock),             //                         .lock
2067 
                .uav_debugaccess        (timecode_ready_rx_s1_agent_m0_debugaccess),      //                         .debugaccess
2068 
                .av_address             (timecode_ready_rx_s1_address),                   //      avalon_anti_slave_0.address
2069 
                .av_readdata            (timecode_ready_rx_s1_readdata),                  //                         .readdata
2070 
                .av_write               (),                                               //              (terminated)
2071 
                .av_read                (),                                               //              (terminated)
2072 
                .av_writedata           (),                                               //              (terminated)
2073 
                .av_begintransfer       (),                                               //              (terminated)
2074 
                .av_beginbursttransfer  (),                                               //              (terminated)
2075 
                .av_burstcount          (),                                               //              (terminated)
2076 
                .av_byteenable          (),                                               //              (terminated)
2077 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
2078 
                .av_waitrequest         (1'b0),                                           //              (terminated)
2079 
                .av_writebyteenable     (),                                               //              (terminated)
2080 
                .av_lock                (),                                               //              (terminated)
2081 
                .av_chipselect          (),                                               //              (terminated)
2082 
                .av_clken               (),                                               //              (terminated)
2083 
                .uav_clken              (1'b0),                                           //              (terminated)
2084 
                .av_debugaccess         (),                                               //              (terminated)
2085 
                .av_outputenable        (),                                               //              (terminated)
2086 
                .uav_response           (),                                               //              (terminated)
2087 
                .av_response            (2'b00),                                          //              (terminated)
2088 
                .uav_writeresponsevalid (),                                               //              (terminated)
2089 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
2090 
        );
2091 
 
2092 
        altera_merlin_slave_translator #(
2093 
                .AV_ADDRESS_W                   (2),
2094 
                .AV_DATA_W                      (32),
2095 
                .UAV_DATA_W                     (32),
2096 
                .AV_BURSTCOUNT_W                (1),
2097 
                .AV_BYTEENABLE_W                (1),
2098 
                .UAV_BYTEENABLE_W               (4),
2099 
                .UAV_ADDRESS_W                  (30),
2100 
                .UAV_BURSTCOUNT_W               (3),
2101 
                .AV_READLATENCY                 (0),
2102 
                .USE_READDATAVALID              (0),
2103 
                .USE_WAITREQUEST                (0),
2104 
                .USE_UAV_CLKEN                  (0),
2105 
                .USE_READRESPONSE               (0),
2106 
                .USE_WRITERESPONSE              (0),
2107 
                .AV_SYMBOLS_PER_WORD            (4),
2108 
                .AV_ADDRESS_SYMBOLS             (0),
2109 
                .AV_BURSTCOUNT_SYMBOLS          (0),
2110 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
2111 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
2112 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
2113 
                .CHIPSELECT_THROUGH_READLATENCY (0),
2114 
                .AV_READ_WAIT_CYCLES            (1),
2115 
                .AV_WRITE_WAIT_CYCLES           (0),
2116 
                .AV_SETUP_WAIT_CYCLES           (0),
2117 
                .AV_DATA_HOLD_CYCLES            (0)
2118 
        ) data_flag_rx_s1_translator (
2119 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
2120 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
2121 
                .uav_address            (data_flag_rx_s1_agent_m0_address),               // avalon_universal_slave_0.address
2122 
                .uav_burstcount         (data_flag_rx_s1_agent_m0_burstcount),            //                         .burstcount
2123 
                .uav_read               (data_flag_rx_s1_agent_m0_read),                  //                         .read
2124 
                .uav_write              (data_flag_rx_s1_agent_m0_write),                 //                         .write
2125 
                .uav_waitrequest        (data_flag_rx_s1_agent_m0_waitrequest),           //                         .waitrequest
2126 
                .uav_readdatavalid      (data_flag_rx_s1_agent_m0_readdatavalid),         //                         .readdatavalid
2127 
                .uav_byteenable         (data_flag_rx_s1_agent_m0_byteenable),            //                         .byteenable
2128 
                .uav_readdata           (data_flag_rx_s1_agent_m0_readdata),              //                         .readdata
2129 
                .uav_writedata          (data_flag_rx_s1_agent_m0_writedata),             //                         .writedata
2130 
                .uav_lock               (data_flag_rx_s1_agent_m0_lock),                  //                         .lock
2131 
                .uav_debugaccess        (data_flag_rx_s1_agent_m0_debugaccess),           //                         .debugaccess
2132 
                .av_address             (data_flag_rx_s1_address),                        //      avalon_anti_slave_0.address
2133 
                .av_readdata            (data_flag_rx_s1_readdata),                       //                         .readdata
2134 
                .av_write               (),                                               //              (terminated)
2135 
                .av_read                (),                                               //              (terminated)
2136 
                .av_writedata           (),                                               //              (terminated)
2137 
                .av_begintransfer       (),                                               //              (terminated)
2138 
                .av_beginbursttransfer  (),                                               //              (terminated)
2139 
                .av_burstcount          (),                                               //              (terminated)
2140 
                .av_byteenable          (),                                               //              (terminated)
2141 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
2142 
                .av_waitrequest         (1'b0),                                           //              (terminated)
2143 
                .av_writebyteenable     (),                                               //              (terminated)
2144 
                .av_lock                (),                                               //              (terminated)
2145 
                .av_chipselect          (),                                               //              (terminated)
2146 
                .av_clken               (),                                               //              (terminated)
2147 
                .uav_clken              (1'b0),                                           //              (terminated)
2148 
                .av_debugaccess         (),                                               //              (terminated)
2149 
                .av_outputenable        (),                                               //              (terminated)
2150 
                .uav_response           (),                                               //              (terminated)
2151 
                .av_response            (2'b00),                                          //              (terminated)
2152 
                .uav_writeresponsevalid (),                                               //              (terminated)
2153 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
2154 
        );
2155 
 
2156 
        altera_merlin_slave_translator #(
2157 
                .AV_ADDRESS_W                   (2),
2158 
                .AV_DATA_W                      (32),
2159 
                .UAV_DATA_W                     (32),
2160 
                .AV_BURSTCOUNT_W                (1),
2161 
                .AV_BYTEENABLE_W                (1),
2162 
                .UAV_BYTEENABLE_W               (4),
2163 
                .UAV_ADDRESS_W                  (30),
2164 
                .UAV_BURSTCOUNT_W               (3),
2165 
                .AV_READLATENCY                 (0),
2166 
                .USE_READDATAVALID              (0),
2167 
                .USE_WAITREQUEST                (0),
2168 
                .USE_UAV_CLKEN                  (0),
2169 
                .USE_READRESPONSE               (0),
2170 
                .USE_WRITERESPONSE              (0),
2171 
                .AV_SYMBOLS_PER_WORD            (4),
2172 
                .AV_ADDRESS_SYMBOLS             (0),
2173 
                .AV_BURSTCOUNT_SYMBOLS          (0),
2174 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
2175 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
2176 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
2177 
                .CHIPSELECT_THROUGH_READLATENCY (0),
2178 
                .AV_READ_WAIT_CYCLES            (1),
2179 
                .AV_WRITE_WAIT_CYCLES           (0),
2180 
                .AV_SETUP_WAIT_CYCLES           (0),
2181 
                .AV_DATA_HOLD_CYCLES            (0)
2182 
        ) data_read_en_rx_s1_translator (
2183 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
2184 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
2185 
                .uav_address            (data_read_en_rx_s1_agent_m0_address),            // avalon_universal_slave_0.address
2186 
                .uav_burstcount         (data_read_en_rx_s1_agent_m0_burstcount),         //                         .burstcount
2187 
                .uav_read               (data_read_en_rx_s1_agent_m0_read),               //                         .read
2188 
                .uav_write              (data_read_en_rx_s1_agent_m0_write),              //                         .write
2189 
                .uav_waitrequest        (data_read_en_rx_s1_agent_m0_waitrequest),        //                         .waitrequest
2190 
                .uav_readdatavalid      (data_read_en_rx_s1_agent_m0_readdatavalid),      //                         .readdatavalid
2191 
                .uav_byteenable         (data_read_en_rx_s1_agent_m0_byteenable),         //                         .byteenable
2192 
                .uav_readdata           (data_read_en_rx_s1_agent_m0_readdata),           //                         .readdata
2193 
                .uav_writedata          (data_read_en_rx_s1_agent_m0_writedata),          //                         .writedata
2194 
                .uav_lock               (data_read_en_rx_s1_agent_m0_lock),               //                         .lock
2195 
                .uav_debugaccess        (data_read_en_rx_s1_agent_m0_debugaccess),        //                         .debugaccess
2196 
                .av_address             (data_read_en_rx_s1_address),                     //      avalon_anti_slave_0.address
2197 
                .av_write               (data_read_en_rx_s1_write),                       //                         .write
2198 
                .av_readdata            (data_read_en_rx_s1_readdata),                    //                         .readdata
2199 
                .av_writedata           (data_read_en_rx_s1_writedata),                   //                         .writedata
2200 
                .av_chipselect          (data_read_en_rx_s1_chipselect),                  //                         .chipselect
2201 
                .av_read                (),                                               //              (terminated)
2202 
                .av_begintransfer       (),                                               //              (terminated)
2203 
                .av_beginbursttransfer  (),                                               //              (terminated)
2204 
                .av_burstcount          (),                                               //              (terminated)
2205 
                .av_byteenable          (),                                               //              (terminated)
2206 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
2207 
                .av_waitrequest         (1'b0),                                           //              (terminated)
2208 
                .av_writebyteenable     (),                                               //              (terminated)
2209 
                .av_lock                (),                                               //              (terminated)
2210 
                .av_clken               (),                                               //              (terminated)
2211 
                .uav_clken              (1'b0),                                           //              (terminated)
2212 
                .av_debugaccess         (),                                               //              (terminated)
2213 
                .av_outputenable        (),                                               //              (terminated)
2214 
                .uav_response           (),                                               //              (terminated)
2215 
                .av_response            (2'b00),                                          //              (terminated)
2216 
                .uav_writeresponsevalid (),                                               //              (terminated)
2217 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
2218 
        );
2219 
 
2220 
        altera_merlin_slave_translator #(
2221 
                .AV_ADDRESS_W                   (2),
2222 
                .AV_DATA_W                      (32),
2223 
                .UAV_DATA_W                     (32),
2224 
                .AV_BURSTCOUNT_W                (1),
2225 
                .AV_BYTEENABLE_W                (1),
2226 
                .UAV_BYTEENABLE_W               (4),
2227 
                .UAV_ADDRESS_W                  (30),
2228 
                .UAV_BURSTCOUNT_W               (3),
2229 
                .AV_READLATENCY                 (0),
2230 
                .USE_READDATAVALID              (0),
2231 
                .USE_WAITREQUEST                (0),
2232 
                .USE_UAV_CLKEN                  (0),
2233 
                .USE_READRESPONSE               (0),
2234 
                .USE_WRITERESPONSE              (0),
2235 
                .AV_SYMBOLS_PER_WORD            (4),
2236 
                .AV_ADDRESS_SYMBOLS             (0),
2237 
                .AV_BURSTCOUNT_SYMBOLS          (0),
2238 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
2239 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
2240 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
2241 
                .CHIPSELECT_THROUGH_READLATENCY (0),
2242 
                .AV_READ_WAIT_CYCLES            (1),
2243 
                .AV_WRITE_WAIT_CYCLES           (0),
2244 
                .AV_SETUP_WAIT_CYCLES           (0),
2245 
                .AV_DATA_HOLD_CYCLES            (0)
2246 
        ) fifo_full_rx_status_s1_translator (
2247 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
2248 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
2249 
                .uav_address            (fifo_full_rx_status_s1_agent_m0_address),        // avalon_universal_slave_0.address
2250 
                .uav_burstcount         (fifo_full_rx_status_s1_agent_m0_burstcount),     //                         .burstcount
2251 
                .uav_read               (fifo_full_rx_status_s1_agent_m0_read),           //                         .read
2252 
                .uav_write              (fifo_full_rx_status_s1_agent_m0_write),          //                         .write
2253 
                .uav_waitrequest        (fifo_full_rx_status_s1_agent_m0_waitrequest),    //                         .waitrequest
2254 
                .uav_readdatavalid      (fifo_full_rx_status_s1_agent_m0_readdatavalid),  //                         .readdatavalid
2255 
                .uav_byteenable         (fifo_full_rx_status_s1_agent_m0_byteenable),     //                         .byteenable
2256 
                .uav_readdata           (fifo_full_rx_status_s1_agent_m0_readdata),       //                         .readdata
2257 
                .uav_writedata          (fifo_full_rx_status_s1_agent_m0_writedata),      //                         .writedata
2258 
                .uav_lock               (fifo_full_rx_status_s1_agent_m0_lock),           //                         .lock
2259 
                .uav_debugaccess        (fifo_full_rx_status_s1_agent_m0_debugaccess),    //                         .debugaccess
2260 
                .av_address             (fifo_full_rx_status_s1_address),                 //      avalon_anti_slave_0.address
2261 
                .av_readdata            (fifo_full_rx_status_s1_readdata),                //                         .readdata
2262 
                .av_write               (),                                               //              (terminated)
2263 
                .av_read                (),                                               //              (terminated)
2264 
                .av_writedata           (),                                               //              (terminated)
2265 
                .av_begintransfer       (),                                               //              (terminated)
2266 
                .av_beginbursttransfer  (),                                               //              (terminated)
2267 
                .av_burstcount          (),                                               //              (terminated)
2268 
                .av_byteenable          (),                                               //              (terminated)
2269 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
2270 
                .av_waitrequest         (1'b0),                                           //              (terminated)
2271 
                .av_writebyteenable     (),                                               //              (terminated)
2272 
                .av_lock                (),                                               //              (terminated)
2273 
                .av_chipselect          (),                                               //              (terminated)
2274 
                .av_clken               (),                                               //              (terminated)
2275 
                .uav_clken              (1'b0),                                           //              (terminated)
2276 
                .av_debugaccess         (),                                               //              (terminated)
2277 
                .av_outputenable        (),                                               //              (terminated)
2278 
                .uav_response           (),                                               //              (terminated)
2279 
                .av_response            (2'b00),                                          //              (terminated)
2280 
                .uav_writeresponsevalid (),                                               //              (terminated)
2281 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
2282 
        );
2283 
 
2284 
        altera_merlin_slave_translator #(
2285 
                .AV_ADDRESS_W                   (2),
2286 
                .AV_DATA_W                      (32),
2287 
                .UAV_DATA_W                     (32),
2288 
                .AV_BURSTCOUNT_W                (1),
2289 
                .AV_BYTEENABLE_W                (1),
2290 
                .UAV_BYTEENABLE_W               (4),
2291 
                .UAV_ADDRESS_W                  (30),
2292 
                .UAV_BURSTCOUNT_W               (3),
2293 
                .AV_READLATENCY                 (0),
2294 
                .USE_READDATAVALID              (0),
2295 
                .USE_WAITREQUEST                (0),
2296 
                .USE_UAV_CLKEN                  (0),
2297 
                .USE_READRESPONSE               (0),
2298 
                .USE_WRITERESPONSE              (0),
2299 
                .AV_SYMBOLS_PER_WORD            (4),
2300 
                .AV_ADDRESS_SYMBOLS             (0),
2301 
                .AV_BURSTCOUNT_SYMBOLS          (0),
2302 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
2303 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
2304 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
2305 
                .CHIPSELECT_THROUGH_READLATENCY (0),
2306 
                .AV_READ_WAIT_CYCLES            (1),
2307 
                .AV_WRITE_WAIT_CYCLES           (0),
2308 
                .AV_SETUP_WAIT_CYCLES           (0),
2309 
                .AV_DATA_HOLD_CYCLES            (0)
2310 
        ) fifo_empty_rx_status_s1_translator (
2311 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
2312 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
2313 
                .uav_address            (fifo_empty_rx_status_s1_agent_m0_address),       // avalon_universal_slave_0.address
2314 
                .uav_burstcount         (fifo_empty_rx_status_s1_agent_m0_burstcount),    //                         .burstcount
2315 
                .uav_read               (fifo_empty_rx_status_s1_agent_m0_read),          //                         .read
2316 
                .uav_write              (fifo_empty_rx_status_s1_agent_m0_write),         //                         .write
2317 
                .uav_waitrequest        (fifo_empty_rx_status_s1_agent_m0_waitrequest),   //                         .waitrequest
2318 
                .uav_readdatavalid      (fifo_empty_rx_status_s1_agent_m0_readdatavalid), //                         .readdatavalid
2319 
                .uav_byteenable         (fifo_empty_rx_status_s1_agent_m0_byteenable),    //                         .byteenable
2320 
                .uav_readdata           (fifo_empty_rx_status_s1_agent_m0_readdata),      //                         .readdata
2321 
                .uav_writedata          (fifo_empty_rx_status_s1_agent_m0_writedata),     //                         .writedata
2322 
                .uav_lock               (fifo_empty_rx_status_s1_agent_m0_lock),          //                         .lock
2323 
                .uav_debugaccess        (fifo_empty_rx_status_s1_agent_m0_debugaccess),   //                         .debugaccess
2324 
                .av_address             (fifo_empty_rx_status_s1_address),                //      avalon_anti_slave_0.address
2325 
                .av_readdata            (fifo_empty_rx_status_s1_readdata),               //                         .readdata
2326 
                .av_write               (),                                               //              (terminated)
2327 
                .av_read                (),                                               //              (terminated)
2328 
                .av_writedata           (),                                               //              (terminated)
2329 
                .av_begintransfer       (),                                               //              (terminated)
2330 
                .av_beginbursttransfer  (),                                               //              (terminated)
2331 
                .av_burstcount          (),                                               //              (terminated)
2332 
                .av_byteenable          (),                                               //              (terminated)
2333 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
2334 
                .av_waitrequest         (1'b0),                                           //              (terminated)
2335 
                .av_writebyteenable     (),                                               //              (terminated)
2336 
                .av_lock                (),                                               //              (terminated)
2337 
                .av_chipselect          (),                                               //              (terminated)
2338 
                .av_clken               (),                                               //              (terminated)
2339 
                .uav_clken              (1'b0),                                           //              (terminated)
2340 
                .av_debugaccess         (),                                               //              (terminated)
2341 
                .av_outputenable        (),                                               //              (terminated)
2342 
                .uav_response           (),                                               //              (terminated)
2343 
                .av_response            (2'b00),                                          //              (terminated)
2344 
                .uav_writeresponsevalid (),                                               //              (terminated)
2345 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
2346 
        );
2347 
 
2348 
        altera_merlin_slave_translator #(
2349 
                .AV_ADDRESS_W                   (2),
2350 
                .AV_DATA_W                      (32),
2351 
                .UAV_DATA_W                     (32),
2352 
                .AV_BURSTCOUNT_W                (1),
2353 
                .AV_BYTEENABLE_W                (1),
2354 
                .UAV_BYTEENABLE_W               (4),
2355 
                .UAV_ADDRESS_W                  (30),
2356 
                .UAV_BURSTCOUNT_W               (3),
2357 
                .AV_READLATENCY                 (0),
2358 
                .USE_READDATAVALID              (0),
2359 
                .USE_WAITREQUEST                (0),
2360 
                .USE_UAV_CLKEN                  (0),
2361 
                .USE_READRESPONSE               (0),
2362 
                .USE_WRITERESPONSE              (0),
2363 
                .AV_SYMBOLS_PER_WORD            (4),
2364 
                .AV_ADDRESS_SYMBOLS             (0),
2365 
                .AV_BURSTCOUNT_SYMBOLS          (0),
2366 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
2367 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
2368 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
2369 
                .CHIPSELECT_THROUGH_READLATENCY (0),
2370 
                .AV_READ_WAIT_CYCLES            (1),
2371 
                .AV_WRITE_WAIT_CYCLES           (0),
2372 
                .AV_SETUP_WAIT_CYCLES           (0),
2373 
                .AV_DATA_HOLD_CYCLES            (0)
2374 
        ) link_start_s1_translator (
2375 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
2376 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
2377 
                .uav_address            (link_start_s1_agent_m0_address),                 // avalon_universal_slave_0.address
2378 
                .uav_burstcount         (link_start_s1_agent_m0_burstcount),              //                         .burstcount
2379 
                .uav_read               (link_start_s1_agent_m0_read),                    //                         .read
2380 
                .uav_write              (link_start_s1_agent_m0_write),                   //                         .write
2381 
                .uav_waitrequest        (link_start_s1_agent_m0_waitrequest),             //                         .waitrequest
2382 
                .uav_readdatavalid      (link_start_s1_agent_m0_readdatavalid),           //                         .readdatavalid
2383 
                .uav_byteenable         (link_start_s1_agent_m0_byteenable),              //                         .byteenable
2384 
                .uav_readdata           (link_start_s1_agent_m0_readdata),                //                         .readdata
2385 
                .uav_writedata          (link_start_s1_agent_m0_writedata),               //                         .writedata
2386 
                .uav_lock               (link_start_s1_agent_m0_lock),                    //                         .lock
2387 
                .uav_debugaccess        (link_start_s1_agent_m0_debugaccess),             //                         .debugaccess
2388 
                .av_address             (link_start_s1_address),                          //      avalon_anti_slave_0.address
2389 
                .av_write               (link_start_s1_write),                            //                         .write
2390 
                .av_readdata            (link_start_s1_readdata),                         //                         .readdata
2391 
                .av_writedata           (link_start_s1_writedata),                        //                         .writedata
2392 
                .av_chipselect          (link_start_s1_chipselect),                       //                         .chipselect
2393 
                .av_read                (),                                               //              (terminated)
2394 
                .av_begintransfer       (),                                               //              (terminated)
2395 
                .av_beginbursttransfer  (),                                               //              (terminated)
2396 
                .av_burstcount          (),                                               //              (terminated)
2397 
                .av_byteenable          (),                                               //              (terminated)
2398 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
2399 
                .av_waitrequest         (1'b0),                                           //              (terminated)
2400 
                .av_writebyteenable     (),                                               //              (terminated)
2401 
                .av_lock                (),                                               //              (terminated)
2402 
                .av_clken               (),                                               //              (terminated)
2403 
                .uav_clken              (1'b0),                                           //              (terminated)
2404 
                .av_debugaccess         (),                                               //              (terminated)
2405 
                .av_outputenable        (),                                               //              (terminated)
2406 
                .uav_response           (),                                               //              (terminated)
2407 
                .av_response            (2'b00),                                          //              (terminated)
2408 
                .uav_writeresponsevalid (),                                               //              (terminated)
2409 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
2410 
        );
2411 
 
2412 
        altera_merlin_slave_translator #(
2413 
                .AV_ADDRESS_W                   (2),
2414 
                .AV_DATA_W                      (32),
2415 
                .UAV_DATA_W                     (32),
2416 
                .AV_BURSTCOUNT_W                (1),
2417 
                .AV_BYTEENABLE_W                (1),
2418 
                .UAV_BYTEENABLE_W               (4),
2419 
                .UAV_ADDRESS_W                  (30),
2420 
                .UAV_BURSTCOUNT_W               (3),
2421 
                .AV_READLATENCY                 (0),
2422 
                .USE_READDATAVALID              (0),
2423 
                .USE_WAITREQUEST                (0),
2424 
                .USE_UAV_CLKEN                  (0),
2425 
                .USE_READRESPONSE               (0),
2426 
                .USE_WRITERESPONSE              (0),
2427 
                .AV_SYMBOLS_PER_WORD            (4),
2428 
                .AV_ADDRESS_SYMBOLS             (0),
2429 
                .AV_BURSTCOUNT_SYMBOLS          (0),
2430 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
2431 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
2432 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
2433 
                .CHIPSELECT_THROUGH_READLATENCY (0),
2434 
                .AV_READ_WAIT_CYCLES            (1),
2435 
                .AV_WRITE_WAIT_CYCLES           (0),
2436 
                .AV_SETUP_WAIT_CYCLES           (0),
2437 
                .AV_DATA_HOLD_CYCLES            (0)
2438 
        ) auto_start_s1_translator (
2439 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
2440 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
2441 
                .uav_address            (auto_start_s1_agent_m0_address),                 // avalon_universal_slave_0.address
2442 
                .uav_burstcount         (auto_start_s1_agent_m0_burstcount),              //                         .burstcount
2443 
                .uav_read               (auto_start_s1_agent_m0_read),                    //                         .read
2444 
                .uav_write              (auto_start_s1_agent_m0_write),                   //                         .write
2445 
                .uav_waitrequest        (auto_start_s1_agent_m0_waitrequest),             //                         .waitrequest
2446 
                .uav_readdatavalid      (auto_start_s1_agent_m0_readdatavalid),           //                         .readdatavalid
2447 
                .uav_byteenable         (auto_start_s1_agent_m0_byteenable),              //                         .byteenable
2448 
                .uav_readdata           (auto_start_s1_agent_m0_readdata),                //                         .readdata
2449 
                .uav_writedata          (auto_start_s1_agent_m0_writedata),               //                         .writedata
2450 
                .uav_lock               (auto_start_s1_agent_m0_lock),                    //                         .lock
2451 
                .uav_debugaccess        (auto_start_s1_agent_m0_debugaccess),             //                         .debugaccess
2452 
                .av_address             (auto_start_s1_address),                          //      avalon_anti_slave_0.address
2453 
                .av_write               (auto_start_s1_write),                            //                         .write
2454 
                .av_readdata            (auto_start_s1_readdata),                         //                         .readdata
2455 
                .av_writedata           (auto_start_s1_writedata),                        //                         .writedata
2456 
                .av_chipselect          (auto_start_s1_chipselect),                       //                         .chipselect
2457 
                .av_read                (),                                               //              (terminated)
2458 
                .av_begintransfer       (),                                               //              (terminated)
2459 
                .av_beginbursttransfer  (),                                               //              (terminated)
2460 
                .av_burstcount          (),                                               //              (terminated)
2461 
                .av_byteenable          (),                                               //              (terminated)
2462 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
2463 
                .av_waitrequest         (1'b0),                                           //              (terminated)
2464 
                .av_writebyteenable     (),                                               //              (terminated)
2465 
                .av_lock                (),                                               //              (terminated)
2466 
                .av_clken               (),                                               //              (terminated)
2467 
                .uav_clken              (1'b0),                                           //              (terminated)
2468 
                .av_debugaccess         (),                                               //              (terminated)
2469 
                .av_outputenable        (),                                               //              (terminated)
2470 
                .uav_response           (),                                               //              (terminated)
2471 
                .av_response            (2'b00),                                          //              (terminated)
2472 
                .uav_writeresponsevalid (),                                               //              (terminated)
2473 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
2474 
        );
2475 
 
2476 
        altera_merlin_slave_translator #(
2477 
                .AV_ADDRESS_W                   (2),
2478 
                .AV_DATA_W                      (32),
2479 
                .UAV_DATA_W                     (32),
2480 
                .AV_BURSTCOUNT_W                (1),
2481 
                .AV_BYTEENABLE_W                (1),
2482 
                .UAV_BYTEENABLE_W               (4),
2483 
                .UAV_ADDRESS_W                  (30),
2484 
                .UAV_BURSTCOUNT_W               (3),
2485 
                .AV_READLATENCY                 (0),
2486 
                .USE_READDATAVALID              (0),
2487 
                .USE_WAITREQUEST                (0),
2488 
                .USE_UAV_CLKEN                  (0),
2489 
                .USE_READRESPONSE               (0),
2490 
                .USE_WRITERESPONSE              (0),
2491 
                .AV_SYMBOLS_PER_WORD            (4),
2492 
                .AV_ADDRESS_SYMBOLS             (0),
2493 
                .AV_BURSTCOUNT_SYMBOLS          (0),
2494 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
2495 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
2496 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
2497 
                .CHIPSELECT_THROUGH_READLATENCY (0),
2498 
                .AV_READ_WAIT_CYCLES            (1),
2499 
                .AV_WRITE_WAIT_CYCLES           (0),
2500 
                .AV_SETUP_WAIT_CYCLES           (0),
2501 
                .AV_DATA_HOLD_CYCLES            (0)
2502 
        ) link_disable_s1_translator (
2503 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
2504 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
2505 
                .uav_address            (link_disable_s1_agent_m0_address),               // avalon_universal_slave_0.address
2506 
                .uav_burstcount         (link_disable_s1_agent_m0_burstcount),            //                         .burstcount
2507 
                .uav_read               (link_disable_s1_agent_m0_read),                  //                         .read
2508 
                .uav_write              (link_disable_s1_agent_m0_write),                 //                         .write
2509 
                .uav_waitrequest        (link_disable_s1_agent_m0_waitrequest),           //                         .waitrequest
2510 
                .uav_readdatavalid      (link_disable_s1_agent_m0_readdatavalid),         //                         .readdatavalid
2511 
                .uav_byteenable         (link_disable_s1_agent_m0_byteenable),            //                         .byteenable
2512 
                .uav_readdata           (link_disable_s1_agent_m0_readdata),              //                         .readdata
2513 
                .uav_writedata          (link_disable_s1_agent_m0_writedata),             //                         .writedata
2514 
                .uav_lock               (link_disable_s1_agent_m0_lock),                  //                         .lock
2515 
                .uav_debugaccess        (link_disable_s1_agent_m0_debugaccess),           //                         .debugaccess
2516 
                .av_address             (link_disable_s1_address),                        //      avalon_anti_slave_0.address
2517 
                .av_write               (link_disable_s1_write),                          //                         .write
2518 
                .av_readdata            (link_disable_s1_readdata),                       //                         .readdata
2519 
                .av_writedata           (link_disable_s1_writedata),                      //                         .writedata
2520 
                .av_chipselect          (link_disable_s1_chipselect),                     //                         .chipselect
2521 
                .av_read                (),                                               //              (terminated)
2522 
                .av_begintransfer       (),                                               //              (terminated)
2523 
                .av_beginbursttransfer  (),                                               //              (terminated)
2524 
                .av_burstcount          (),                                               //              (terminated)
2525 
                .av_byteenable          (),                                               //              (terminated)
2526 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
2527 
                .av_waitrequest         (1'b0),                                           //              (terminated)
2528 
                .av_writebyteenable     (),                                               //              (terminated)
2529 
                .av_lock                (),                                               //              (terminated)
2530 
                .av_clken               (),                                               //              (terminated)
2531 
                .uav_clken              (1'b0),                                           //              (terminated)
2532 
                .av_debugaccess         (),                                               //              (terminated)
2533 
                .av_outputenable        (),                                               //              (terminated)
2534 
                .uav_response           (),                                               //              (terminated)
2535 
                .av_response            (2'b00),                                          //              (terminated)
2536 
                .uav_writeresponsevalid (),                                               //              (terminated)
2537 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
2538 
        );
2539 
 
2540 
        altera_merlin_slave_translator #(
2541 
                .AV_ADDRESS_W                   (2),
2542 
                .AV_DATA_W                      (32),
2543 
                .UAV_DATA_W                     (32),
2544 
                .AV_BURSTCOUNT_W                (1),
2545 
                .AV_BYTEENABLE_W                (1),
2546 
                .UAV_BYTEENABLE_W               (4),
2547 
                .UAV_ADDRESS_W                  (30),
2548 
                .UAV_BURSTCOUNT_W               (3),
2549 
                .AV_READLATENCY                 (0),
2550 
                .USE_READDATAVALID              (0),
2551 
                .USE_WAITREQUEST                (0),
2552 
                .USE_UAV_CLKEN                  (0),
2553 
                .USE_READRESPONSE               (0),
2554 
                .USE_WRITERESPONSE              (0),
2555 
                .AV_SYMBOLS_PER_WORD            (4),
2556 
                .AV_ADDRESS_SYMBOLS             (0),
2557 
                .AV_BURSTCOUNT_SYMBOLS          (0),
2558 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
2559 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
2560 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
2561 
                .CHIPSELECT_THROUGH_READLATENCY (0),
2562 
                .AV_READ_WAIT_CYCLES            (1),
2563 
                .AV_WRITE_WAIT_CYCLES           (0),
2564 
                .AV_SETUP_WAIT_CYCLES           (0),
2565 
                .AV_DATA_HOLD_CYCLES            (0)
2566 
        ) write_data_fifo_tx_s1_translator (
2567 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
2568 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
2569 
                .uav_address            (write_data_fifo_tx_s1_agent_m0_address),         // avalon_universal_slave_0.address
2570 
                .uav_burstcount         (write_data_fifo_tx_s1_agent_m0_burstcount),      //                         .burstcount
2571 
                .uav_read               (write_data_fifo_tx_s1_agent_m0_read),            //                         .read
2572 
                .uav_write              (write_data_fifo_tx_s1_agent_m0_write),           //                         .write
2573 
                .uav_waitrequest        (write_data_fifo_tx_s1_agent_m0_waitrequest),     //                         .waitrequest
2574 
                .uav_readdatavalid      (write_data_fifo_tx_s1_agent_m0_readdatavalid),   //                         .readdatavalid
2575 
                .uav_byteenable         (write_data_fifo_tx_s1_agent_m0_byteenable),      //                         .byteenable
2576 
                .uav_readdata           (write_data_fifo_tx_s1_agent_m0_readdata),        //                         .readdata
2577 
                .uav_writedata          (write_data_fifo_tx_s1_agent_m0_writedata),       //                         .writedata
2578 
                .uav_lock               (write_data_fifo_tx_s1_agent_m0_lock),            //                         .lock
2579 
                .uav_debugaccess        (write_data_fifo_tx_s1_agent_m0_debugaccess),     //                         .debugaccess
2580 
                .av_address             (write_data_fifo_tx_s1_address),                  //      avalon_anti_slave_0.address
2581 
                .av_write               (write_data_fifo_tx_s1_write),                    //                         .write
2582 
                .av_readdata            (write_data_fifo_tx_s1_readdata),                 //                         .readdata
2583 
                .av_writedata           (write_data_fifo_tx_s1_writedata),                //                         .writedata
2584 
                .av_chipselect          (write_data_fifo_tx_s1_chipselect),               //                         .chipselect
2585 
                .av_read                (),                                               //              (terminated)
2586 
                .av_begintransfer       (),                                               //              (terminated)
2587 
                .av_beginbursttransfer  (),                                               //              (terminated)
2588 
                .av_burstcount          (),                                               //              (terminated)
2589 
                .av_byteenable          (),                                               //              (terminated)
2590 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
2591 
                .av_waitrequest         (1'b0),                                           //              (terminated)
2592 
                .av_writebyteenable     (),                                               //              (terminated)
2593 
                .av_lock                (),                                               //              (terminated)
2594 
                .av_clken               (),                                               //              (terminated)
2595 
                .uav_clken              (1'b0),                                           //              (terminated)
2596 
                .av_debugaccess         (),                                               //              (terminated)
2597 
                .av_outputenable        (),                                               //              (terminated)
2598 
                .uav_response           (),                                               //              (terminated)
2599 
                .av_response            (2'b00),                                          //              (terminated)
2600 
                .uav_writeresponsevalid (),                                               //              (terminated)
2601 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
2602 
        );
2603 
 
2604 
        altera_merlin_slave_translator #(
2605 
                .AV_ADDRESS_W                   (2),
2606 
                .AV_DATA_W                      (32),
2607 
                .UAV_DATA_W                     (32),
2608 
                .AV_BURSTCOUNT_W                (1),
2609 
                .AV_BYTEENABLE_W                (1),
2610 
                .UAV_BYTEENABLE_W               (4),
2611 
                .UAV_ADDRESS_W                  (30),
2612 
                .UAV_BURSTCOUNT_W               (3),
2613 
                .AV_READLATENCY                 (0),
2614 
                .USE_READDATAVALID              (0),
2615 
                .USE_WAITREQUEST                (0),
2616 
                .USE_UAV_CLKEN                  (0),
2617 
                .USE_READRESPONSE               (0),
2618 
                .USE_WRITERESPONSE              (0),
2619 
                .AV_SYMBOLS_PER_WORD            (4),
2620 
                .AV_ADDRESS_SYMBOLS             (0),
2621 
                .AV_BURSTCOUNT_SYMBOLS          (0),
2622 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
2623 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
2624 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
2625 
                .CHIPSELECT_THROUGH_READLATENCY (0),
2626 
                .AV_READ_WAIT_CYCLES            (1),
2627 
                .AV_WRITE_WAIT_CYCLES           (0),
2628 
                .AV_SETUP_WAIT_CYCLES           (0),
2629 
                .AV_DATA_HOLD_CYCLES            (0)
2630 
        ) write_en_tx_s1_translator (
2631 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
2632 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
2633 
                .uav_address            (write_en_tx_s1_agent_m0_address),                // avalon_universal_slave_0.address
2634 
                .uav_burstcount         (write_en_tx_s1_agent_m0_burstcount),             //                         .burstcount
2635 
                .uav_read               (write_en_tx_s1_agent_m0_read),                   //                         .read
2636 
                .uav_write              (write_en_tx_s1_agent_m0_write),                  //                         .write
2637 
                .uav_waitrequest        (write_en_tx_s1_agent_m0_waitrequest),            //                         .waitrequest
2638 
                .uav_readdatavalid      (write_en_tx_s1_agent_m0_readdatavalid),          //                         .readdatavalid
2639 
                .uav_byteenable         (write_en_tx_s1_agent_m0_byteenable),             //                         .byteenable
2640 
                .uav_readdata           (write_en_tx_s1_agent_m0_readdata),               //                         .readdata
2641 
                .uav_writedata          (write_en_tx_s1_agent_m0_writedata),              //                         .writedata
2642 
                .uav_lock               (write_en_tx_s1_agent_m0_lock),                   //                         .lock
2643 
                .uav_debugaccess        (write_en_tx_s1_agent_m0_debugaccess),            //                         .debugaccess
2644 
                .av_address             (write_en_tx_s1_address),                         //      avalon_anti_slave_0.address
2645 
                .av_write               (write_en_tx_s1_write),                           //                         .write
2646 
                .av_readdata            (write_en_tx_s1_readdata),                        //                         .readdata
2647 
                .av_writedata           (write_en_tx_s1_writedata),                       //                         .writedata
2648 
                .av_chipselect          (write_en_tx_s1_chipselect),                      //                         .chipselect
2649 
                .av_read                (),                                               //              (terminated)
2650 
                .av_begintransfer       (),                                               //              (terminated)
2651 
                .av_beginbursttransfer  (),                                               //              (terminated)
2652 
                .av_burstcount          (),                                               //              (terminated)
2653 
                .av_byteenable          (),                                               //              (terminated)
2654 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
2655 
                .av_waitrequest         (1'b0),                                           //              (terminated)
2656 
                .av_writebyteenable     (),                                               //              (terminated)
2657 
                .av_lock                (),                                               //              (terminated)
2658 
                .av_clken               (),                                               //              (terminated)
2659 
                .uav_clken              (1'b0),                                           //              (terminated)
2660 
                .av_debugaccess         (),                                               //              (terminated)
2661 
                .av_outputenable        (),                                               //              (terminated)
2662 
                .uav_response           (),                                               //              (terminated)
2663 
                .av_response            (2'b00),                                          //              (terminated)
2664 
                .uav_writeresponsevalid (),                                               //              (terminated)
2665 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
2666 
        );
2667 
 
2668 
        altera_merlin_slave_translator #(
2669 
                .AV_ADDRESS_W                   (2),
2670 
                .AV_DATA_W                      (32),
2671 
                .UAV_DATA_W                     (32),
2672 
                .AV_BURSTCOUNT_W                (1),
2673 
                .AV_BYTEENABLE_W                (1),
2674 
                .UAV_BYTEENABLE_W               (4),
2675 
                .UAV_ADDRESS_W                  (30),
2676 
                .UAV_BURSTCOUNT_W               (3),
2677 
                .AV_READLATENCY                 (0),
2678 
                .USE_READDATAVALID              (0),
2679 
                .USE_WAITREQUEST                (0),
2680 
                .USE_UAV_CLKEN                  (0),
2681 
                .USE_READRESPONSE               (0),
2682 
                .USE_WRITERESPONSE              (0),
2683 
                .AV_SYMBOLS_PER_WORD            (4),
2684 
                .AV_ADDRESS_SYMBOLS             (0),
2685 
                .AV_BURSTCOUNT_SYMBOLS          (0),
2686 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
2687 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
2688 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
2689 
                .CHIPSELECT_THROUGH_READLATENCY (0),
2690 
                .AV_READ_WAIT_CYCLES            (1),
2691 
                .AV_WRITE_WAIT_CYCLES           (0),
2692 
                .AV_SETUP_WAIT_CYCLES           (0),
2693 
                .AV_DATA_HOLD_CYCLES            (0)
2694 
        ) fifo_full_tx_status_s1_translator (
2695 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
2696 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
2697 
                .uav_address            (fifo_full_tx_status_s1_agent_m0_address),        // avalon_universal_slave_0.address
2698 
                .uav_burstcount         (fifo_full_tx_status_s1_agent_m0_burstcount),     //                         .burstcount
2699 
                .uav_read               (fifo_full_tx_status_s1_agent_m0_read),           //                         .read
2700 
                .uav_write              (fifo_full_tx_status_s1_agent_m0_write),          //                         .write
2701 
                .uav_waitrequest        (fifo_full_tx_status_s1_agent_m0_waitrequest),    //                         .waitrequest
2702 
                .uav_readdatavalid      (fifo_full_tx_status_s1_agent_m0_readdatavalid),  //                         .readdatavalid
2703 
                .uav_byteenable         (fifo_full_tx_status_s1_agent_m0_byteenable),     //                         .byteenable
2704 
                .uav_readdata           (fifo_full_tx_status_s1_agent_m0_readdata),       //                         .readdata
2705 
                .uav_writedata          (fifo_full_tx_status_s1_agent_m0_writedata),      //                         .writedata
2706 
                .uav_lock               (fifo_full_tx_status_s1_agent_m0_lock),           //                         .lock
2707 
                .uav_debugaccess        (fifo_full_tx_status_s1_agent_m0_debugaccess),    //                         .debugaccess
2708 
                .av_address             (fifo_full_tx_status_s1_address),                 //      avalon_anti_slave_0.address
2709 
                .av_readdata            (fifo_full_tx_status_s1_readdata),                //                         .readdata
2710 
                .av_write               (),                                               //              (terminated)
2711 
                .av_read                (),                                               //              (terminated)
2712 
                .av_writedata           (),                                               //              (terminated)
2713 
                .av_begintransfer       (),                                               //              (terminated)
2714 
                .av_beginbursttransfer  (),                                               //              (terminated)
2715 
                .av_burstcount          (),                                               //              (terminated)
2716 
                .av_byteenable          (),                                               //              (terminated)
2717 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
2718 
                .av_waitrequest         (1'b0),                                           //              (terminated)
2719 
                .av_writebyteenable     (),                                               //              (terminated)
2720 
                .av_lock                (),                                               //              (terminated)
2721 
                .av_chipselect          (),                                               //              (terminated)
2722 
                .av_clken               (),                                               //              (terminated)
2723 
                .uav_clken              (1'b0),                                           //              (terminated)
2724 
                .av_debugaccess         (),                                               //              (terminated)
2725 
                .av_outputenable        (),                                               //              (terminated)
2726 
                .uav_response           (),                                               //              (terminated)
2727 
                .av_response            (2'b00),                                          //              (terminated)
2728 
                .uav_writeresponsevalid (),                                               //              (terminated)
2729 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
2730 
        );
2731 
 
2732 
        altera_merlin_slave_translator #(
2733 
                .AV_ADDRESS_W                   (2),
2734 
                .AV_DATA_W                      (32),
2735 
                .UAV_DATA_W                     (32),
2736 
                .AV_BURSTCOUNT_W                (1),
2737 
                .AV_BYTEENABLE_W                (1),
2738 
                .UAV_BYTEENABLE_W               (4),
2739 
                .UAV_ADDRESS_W                  (30),
2740 
                .UAV_BURSTCOUNT_W               (3),
2741 
                .AV_READLATENCY                 (0),
2742 
                .USE_READDATAVALID              (0),
2743 
                .USE_WAITREQUEST                (0),
2744 
                .USE_UAV_CLKEN                  (0),
2745 
                .USE_READRESPONSE               (0),
2746 
                .USE_WRITERESPONSE              (0),
2747 
                .AV_SYMBOLS_PER_WORD            (4),
2748 
                .AV_ADDRESS_SYMBOLS             (0),
2749 
                .AV_BURSTCOUNT_SYMBOLS          (0),
2750 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
2751 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
2752 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
2753 
                .CHIPSELECT_THROUGH_READLATENCY (0),
2754 
                .AV_READ_WAIT_CYCLES            (1),
2755 
                .AV_WRITE_WAIT_CYCLES           (0),
2756 
                .AV_SETUP_WAIT_CYCLES           (0),
2757 
                .AV_DATA_HOLD_CYCLES            (0)
2758 
        ) fifo_empty_tx_status_s1_translator (
2759 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
2760 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
2761 
                .uav_address            (fifo_empty_tx_status_s1_agent_m0_address),       // avalon_universal_slave_0.address
2762 
                .uav_burstcount         (fifo_empty_tx_status_s1_agent_m0_burstcount),    //                         .burstcount
2763 
                .uav_read               (fifo_empty_tx_status_s1_agent_m0_read),          //                         .read
2764 
                .uav_write              (fifo_empty_tx_status_s1_agent_m0_write),         //                         .write
2765 
                .uav_waitrequest        (fifo_empty_tx_status_s1_agent_m0_waitrequest),   //                         .waitrequest
2766 
                .uav_readdatavalid      (fifo_empty_tx_status_s1_agent_m0_readdatavalid), //                         .readdatavalid
2767 
                .uav_byteenable         (fifo_empty_tx_status_s1_agent_m0_byteenable),    //                         .byteenable
2768 
                .uav_readdata           (fifo_empty_tx_status_s1_agent_m0_readdata),      //                         .readdata
2769 
                .uav_writedata          (fifo_empty_tx_status_s1_agent_m0_writedata),     //                         .writedata
2770 
                .uav_lock               (fifo_empty_tx_status_s1_agent_m0_lock),          //                         .lock
2771 
                .uav_debugaccess        (fifo_empty_tx_status_s1_agent_m0_debugaccess),   //                         .debugaccess
2772 
                .av_address             (fifo_empty_tx_status_s1_address),                //      avalon_anti_slave_0.address
2773 
                .av_readdata            (fifo_empty_tx_status_s1_readdata),               //                         .readdata
2774 
                .av_write               (),                                               //              (terminated)
2775 
                .av_read                (),                                               //              (terminated)
2776 
                .av_writedata           (),                                               //              (terminated)
2777 
                .av_begintransfer       (),                                               //              (terminated)
2778 
                .av_beginbursttransfer  (),                                               //              (terminated)
2779 
                .av_burstcount          (),                                               //              (terminated)
2780 
                .av_byteenable          (),                                               //              (terminated)
2781 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
2782 
                .av_waitrequest         (1'b0),                                           //              (terminated)
2783 
                .av_writebyteenable     (),                                               //              (terminated)
2784 
                .av_lock                (),                                               //              (terminated)
2785 
                .av_chipselect          (),                                               //              (terminated)
2786 
                .av_clken               (),                                               //              (terminated)
2787 
                .uav_clken              (1'b0),                                           //              (terminated)
2788 
                .av_debugaccess         (),                                               //              (terminated)
2789 
                .av_outputenable        (),                                               //              (terminated)
2790 
                .uav_response           (),                                               //              (terminated)
2791 
                .av_response            (2'b00),                                          //              (terminated)
2792 
                .uav_writeresponsevalid (),                                               //              (terminated)
2793 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
2794 
        );
2795 
 
2796 
        altera_merlin_slave_translator #(
2797 
                .AV_ADDRESS_W                   (2),
2798 
                .AV_DATA_W                      (32),
2799 
                .UAV_DATA_W                     (32),
2800 
                .AV_BURSTCOUNT_W                (1),
2801 
                .AV_BYTEENABLE_W                (1),
2802 
                .UAV_BYTEENABLE_W               (4),
2803 
                .UAV_ADDRESS_W                  (30),
2804 
                .UAV_BURSTCOUNT_W               (3),
2805 
                .AV_READLATENCY                 (0),
2806 
                .USE_READDATAVALID              (0),
2807 
                .USE_WAITREQUEST                (0),
2808 
                .USE_UAV_CLKEN                  (0),
2809 
                .USE_READRESPONSE               (0),
2810 
                .USE_WRITERESPONSE              (0),
2811 
                .AV_SYMBOLS_PER_WORD            (4),
2812 
                .AV_ADDRESS_SYMBOLS             (0),
2813 
                .AV_BURSTCOUNT_SYMBOLS          (0),
2814 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
2815 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
2816 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
2817 
                .CHIPSELECT_THROUGH_READLATENCY (0),
2818 
                .AV_READ_WAIT_CYCLES            (1),
2819 
                .AV_WRITE_WAIT_CYCLES           (0),
2820 
                .AV_SETUP_WAIT_CYCLES           (0),
2821 
                .AV_DATA_HOLD_CYCLES            (0)
2822 
        ) timecode_tx_data_s1_translator (
2823 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
2824 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
2825 
                .uav_address            (timecode_tx_data_s1_agent_m0_address),           // avalon_universal_slave_0.address
2826 
                .uav_burstcount         (timecode_tx_data_s1_agent_m0_burstcount),        //                         .burstcount
2827 
                .uav_read               (timecode_tx_data_s1_agent_m0_read),              //                         .read
2828 
                .uav_write              (timecode_tx_data_s1_agent_m0_write),             //                         .write
2829 
                .uav_waitrequest        (timecode_tx_data_s1_agent_m0_waitrequest),       //                         .waitrequest
2830 
                .uav_readdatavalid      (timecode_tx_data_s1_agent_m0_readdatavalid),     //                         .readdatavalid
2831 
                .uav_byteenable         (timecode_tx_data_s1_agent_m0_byteenable),        //                         .byteenable
2832 
                .uav_readdata           (timecode_tx_data_s1_agent_m0_readdata),          //                         .readdata
2833 
                .uav_writedata          (timecode_tx_data_s1_agent_m0_writedata),         //                         .writedata
2834 
                .uav_lock               (timecode_tx_data_s1_agent_m0_lock),              //                         .lock
2835 
                .uav_debugaccess        (timecode_tx_data_s1_agent_m0_debugaccess),       //                         .debugaccess
2836 
                .av_address             (timecode_tx_data_s1_address),                    //      avalon_anti_slave_0.address
2837 
                .av_write               (timecode_tx_data_s1_write),                      //                         .write
2838 
                .av_readdata            (timecode_tx_data_s1_readdata),                   //                         .readdata
2839 
                .av_writedata           (timecode_tx_data_s1_writedata),                  //                         .writedata
2840 
                .av_chipselect          (timecode_tx_data_s1_chipselect),                 //                         .chipselect
2841 
                .av_read                (),                                               //              (terminated)
2842 
                .av_begintransfer       (),                                               //              (terminated)
2843 
                .av_beginbursttransfer  (),                                               //              (terminated)
2844 
                .av_burstcount          (),                                               //              (terminated)
2845 
                .av_byteenable          (),                                               //              (terminated)
2846 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
2847 
                .av_waitrequest         (1'b0),                                           //              (terminated)
2848 
                .av_writebyteenable     (),                                               //              (terminated)
2849 
                .av_lock                (),                                               //              (terminated)
2850 
                .av_clken               (),                                               //              (terminated)
2851 
                .uav_clken              (1'b0),                                           //              (terminated)
2852 
                .av_debugaccess         (),                                               //              (terminated)
2853 
                .av_outputenable        (),                                               //              (terminated)
2854 
                .uav_response           (),                                               //              (terminated)
2855 
                .av_response            (2'b00),                                          //              (terminated)
2856 
                .uav_writeresponsevalid (),                                               //              (terminated)
2857 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
2858 
        );
2859 
 
2860 
        altera_merlin_slave_translator #(
2861 
                .AV_ADDRESS_W                   (2),
2862 
                .AV_DATA_W                      (32),
2863 
                .UAV_DATA_W                     (32),
2864 
                .AV_BURSTCOUNT_W                (1),
2865 
                .AV_BYTEENABLE_W                (1),
2866 
                .UAV_BYTEENABLE_W               (4),
2867 
                .UAV_ADDRESS_W                  (30),
2868 
                .UAV_BURSTCOUNT_W               (3),
2869 
                .AV_READLATENCY                 (0),
2870 
                .USE_READDATAVALID              (0),
2871 
                .USE_WAITREQUEST                (0),
2872 
                .USE_UAV_CLKEN                  (0),
2873 
                .USE_READRESPONSE               (0),
2874 
                .USE_WRITERESPONSE              (0),
2875 
                .AV_SYMBOLS_PER_WORD            (4),
2876 
                .AV_ADDRESS_SYMBOLS             (0),
2877 
                .AV_BURSTCOUNT_SYMBOLS          (0),
2878 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
2879 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
2880 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
2881 
                .CHIPSELECT_THROUGH_READLATENCY (0),
2882 
                .AV_READ_WAIT_CYCLES            (1),
2883 
                .AV_WRITE_WAIT_CYCLES           (0),
2884 
                .AV_SETUP_WAIT_CYCLES           (0),
2885 
                .AV_DATA_HOLD_CYCLES            (0)
2886 
        ) timecode_tx_enable_s1_translator (
2887 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
2888 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
2889 
                .uav_address            (timecode_tx_enable_s1_agent_m0_address),         // avalon_universal_slave_0.address
2890 
                .uav_burstcount         (timecode_tx_enable_s1_agent_m0_burstcount),      //                         .burstcount
2891 
                .uav_read               (timecode_tx_enable_s1_agent_m0_read),            //                         .read
2892 
                .uav_write              (timecode_tx_enable_s1_agent_m0_write),           //                         .write
2893 
                .uav_waitrequest        (timecode_tx_enable_s1_agent_m0_waitrequest),     //                         .waitrequest
2894 
                .uav_readdatavalid      (timecode_tx_enable_s1_agent_m0_readdatavalid),   //                         .readdatavalid
2895 
                .uav_byteenable         (timecode_tx_enable_s1_agent_m0_byteenable),      //                         .byteenable
2896 
                .uav_readdata           (timecode_tx_enable_s1_agent_m0_readdata),        //                         .readdata
2897 
                .uav_writedata          (timecode_tx_enable_s1_agent_m0_writedata),       //                         .writedata
2898 
                .uav_lock               (timecode_tx_enable_s1_agent_m0_lock),            //                         .lock
2899 
                .uav_debugaccess        (timecode_tx_enable_s1_agent_m0_debugaccess),     //                         .debugaccess
2900 
                .av_address             (timecode_tx_enable_s1_address),                  //      avalon_anti_slave_0.address
2901 
                .av_write               (timecode_tx_enable_s1_write),                    //                         .write
2902 
                .av_readdata            (timecode_tx_enable_s1_readdata),                 //                         .readdata
2903 
                .av_writedata           (timecode_tx_enable_s1_writedata),                //                         .writedata
2904 
                .av_chipselect          (timecode_tx_enable_s1_chipselect),               //                         .chipselect
2905 
                .av_read                (),                                               //              (terminated)
2906 
                .av_begintransfer       (),                                               //              (terminated)
2907 
                .av_beginbursttransfer  (),                                               //              (terminated)
2908 
                .av_burstcount          (),                                               //              (terminated)
2909 
                .av_byteenable          (),                                               //              (terminated)
2910 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
2911 
                .av_waitrequest         (1'b0),                                           //              (terminated)
2912 
                .av_writebyteenable     (),                                               //              (terminated)
2913 
                .av_lock                (),                                               //              (terminated)
2914 
                .av_clken               (),                                               //              (terminated)
2915 
                .uav_clken              (1'b0),                                           //              (terminated)
2916 
                .av_debugaccess         (),                                               //              (terminated)
2917 
                .av_outputenable        (),                                               //              (terminated)
2918 
                .uav_response           (),                                               //              (terminated)
2919 
                .av_response            (2'b00),                                          //              (terminated)
2920 
                .uav_writeresponsevalid (),                                               //              (terminated)
2921 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
2922 
        );
2923 
 
2924 
        altera_merlin_slave_translator #(
2925 
                .AV_ADDRESS_W                   (2),
2926 
                .AV_DATA_W                      (32),
2927 
                .UAV_DATA_W                     (32),
2928 
                .AV_BURSTCOUNT_W                (1),
2929 
                .AV_BYTEENABLE_W                (1),
2930 
                .UAV_BYTEENABLE_W               (4),
2931 
                .UAV_ADDRESS_W                  (30),
2932 
                .UAV_BURSTCOUNT_W               (3),
2933 
                .AV_READLATENCY                 (0),
2934 
                .USE_READDATAVALID              (0),
2935 
                .USE_WAITREQUEST                (0),
2936 
                .USE_UAV_CLKEN                  (0),
2937 
                .USE_READRESPONSE               (0),
2938 
                .USE_WRITERESPONSE              (0),
2939 
                .AV_SYMBOLS_PER_WORD            (4),
2940 
                .AV_ADDRESS_SYMBOLS             (0),
2941 
                .AV_BURSTCOUNT_SYMBOLS          (0),
2942 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
2943 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
2944 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
2945 
                .CHIPSELECT_THROUGH_READLATENCY (0),
2946 
                .AV_READ_WAIT_CYCLES            (1),
2947 
                .AV_WRITE_WAIT_CYCLES           (0),
2948 
                .AV_SETUP_WAIT_CYCLES           (0),
2949 
                .AV_DATA_HOLD_CYCLES            (0)
2950 
        ) timecode_tx_ready_s1_translator (
2951 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
2952 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
2953 
                .uav_address            (timecode_tx_ready_s1_agent_m0_address),          // avalon_universal_slave_0.address
2954 
                .uav_burstcount         (timecode_tx_ready_s1_agent_m0_burstcount),       //                         .burstcount
2955 
                .uav_read               (timecode_tx_ready_s1_agent_m0_read),             //                         .read
2956 
                .uav_write              (timecode_tx_ready_s1_agent_m0_write),            //                         .write
2957 
                .uav_waitrequest        (timecode_tx_ready_s1_agent_m0_waitrequest),      //                         .waitrequest
2958 
                .uav_readdatavalid      (timecode_tx_ready_s1_agent_m0_readdatavalid),    //                         .readdatavalid
2959 
                .uav_byteenable         (timecode_tx_ready_s1_agent_m0_byteenable),       //                         .byteenable
2960 
                .uav_readdata           (timecode_tx_ready_s1_agent_m0_readdata),         //                         .readdata
2961 
                .uav_writedata          (timecode_tx_ready_s1_agent_m0_writedata),        //                         .writedata
2962 
                .uav_lock               (timecode_tx_ready_s1_agent_m0_lock),             //                         .lock
2963 
                .uav_debugaccess        (timecode_tx_ready_s1_agent_m0_debugaccess),      //                         .debugaccess
2964 
                .av_address             (timecode_tx_ready_s1_address),                   //      avalon_anti_slave_0.address
2965 
                .av_readdata            (timecode_tx_ready_s1_readdata),                  //                         .readdata
2966 
                .av_write               (),                                               //              (terminated)
2967 
                .av_read                (),                                               //              (terminated)
2968 
                .av_writedata           (),                                               //              (terminated)
2969 
                .av_begintransfer       (),                                               //              (terminated)
2970 
                .av_beginbursttransfer  (),                                               //              (terminated)
2971 
                .av_burstcount          (),                                               //              (terminated)
2972 
                .av_byteenable          (),                                               //              (terminated)
2973 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
2974 
                .av_waitrequest         (1'b0),                                           //              (terminated)
2975 
                .av_writebyteenable     (),                                               //              (terminated)
2976 
                .av_lock                (),                                               //              (terminated)
2977 
                .av_chipselect          (),                                               //              (terminated)
2978 
                .av_clken               (),                                               //              (terminated)
2979 
                .uav_clken              (1'b0),                                           //              (terminated)
2980 
                .av_debugaccess         (),                                               //              (terminated)
2981 
                .av_outputenable        (),                                               //              (terminated)
2982 
                .uav_response           (),                                               //              (terminated)
2983 
                .av_response            (2'b00),                                          //              (terminated)
2984 
                .uav_writeresponsevalid (),                                               //              (terminated)
2985 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
2986 
        );
2987 
 
2988 
        altera_merlin_slave_translator #(
2989 
                .AV_ADDRESS_W                   (2),
2990 
                .AV_DATA_W                      (32),
2991 
                .UAV_DATA_W                     (32),
2992 
                .AV_BURSTCOUNT_W                (1),
2993 
                .AV_BYTEENABLE_W                (1),
2994 
                .UAV_BYTEENABLE_W               (4),
2995 
                .UAV_ADDRESS_W                  (30),
2996 
                .UAV_BURSTCOUNT_W               (3),
2997 
                .AV_READLATENCY                 (0),
2998 
                .USE_READDATAVALID              (0),
2999 
                .USE_WAITREQUEST                (0),
3000 
                .USE_UAV_CLKEN                  (0),
3001 
                .USE_READRESPONSE               (0),
3002 
                .USE_WRITERESPONSE              (0),
3003 
                .AV_SYMBOLS_PER_WORD            (4),
3004 
                .AV_ADDRESS_SYMBOLS             (0),
3005 
                .AV_BURSTCOUNT_SYMBOLS          (0),
3006 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
3007 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
3008 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
3009 
                .CHIPSELECT_THROUGH_READLATENCY (0),
3010 
                .AV_READ_WAIT_CYCLES            (1),
3011 
                .AV_WRITE_WAIT_CYCLES           (0),
3012 
                .AV_SETUP_WAIT_CYCLES           (0),
3013 
                .AV_DATA_HOLD_CYCLES            (0)
3014 
        ) data_info_s1_translator (
3015 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
3016 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
3017 
                .uav_address            (data_info_s1_agent_m0_address),                  // avalon_universal_slave_0.address
3018 
                .uav_burstcount         (data_info_s1_agent_m0_burstcount),               //                         .burstcount
3019 
                .uav_read               (data_info_s1_agent_m0_read),                     //                         .read
3020 
                .uav_write              (data_info_s1_agent_m0_write),                    //                         .write
3021 
                .uav_waitrequest        (data_info_s1_agent_m0_waitrequest),              //                         .waitrequest
3022 
                .uav_readdatavalid      (data_info_s1_agent_m0_readdatavalid),            //                         .readdatavalid
3023 
                .uav_byteenable         (data_info_s1_agent_m0_byteenable),               //                         .byteenable
3024 
                .uav_readdata           (data_info_s1_agent_m0_readdata),                 //                         .readdata
3025 
                .uav_writedata          (data_info_s1_agent_m0_writedata),                //                         .writedata
3026 
                .uav_lock               (data_info_s1_agent_m0_lock),                     //                         .lock
3027 
                .uav_debugaccess        (data_info_s1_agent_m0_debugaccess),              //                         .debugaccess
3028 
                .av_address             (data_info_s1_address),                           //      avalon_anti_slave_0.address
3029 
                .av_readdata            (data_info_s1_readdata),                          //                         .readdata
3030 
                .av_write               (),                                               //              (terminated)
3031 
                .av_read                (),                                               //              (terminated)
3032 
                .av_writedata           (),                                               //              (terminated)
3033 
                .av_begintransfer       (),                                               //              (terminated)
3034 
                .av_beginbursttransfer  (),                                               //              (terminated)
3035 
                .av_burstcount          (),                                               //              (terminated)
3036 
                .av_byteenable          (),                                               //              (terminated)
3037 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
3038 
                .av_waitrequest         (1'b0),                                           //              (terminated)
3039 
                .av_writebyteenable     (),                                               //              (terminated)
3040 
                .av_lock                (),                                               //              (terminated)
3041 
                .av_chipselect          (),                                               //              (terminated)
3042 
                .av_clken               (),                                               //              (terminated)
3043 
                .uav_clken              (1'b0),                                           //              (terminated)
3044 
                .av_debugaccess         (),                                               //              (terminated)
3045 
                .av_outputenable        (),                                               //              (terminated)
3046 
                .uav_response           (),                                               //              (terminated)
3047 
                .av_response            (2'b00),                                          //              (terminated)
3048 
                .uav_writeresponsevalid (),                                               //              (terminated)
3049 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
3050 
        );
3051 
 
3052 
        altera_merlin_slave_translator #(
3053 
                .AV_ADDRESS_W                   (2),
3054 
                .AV_DATA_W                      (32),
3055 
                .UAV_DATA_W                     (32),
3056 
                .AV_BURSTCOUNT_W                (1),
3057 
                .AV_BYTEENABLE_W                (1),
3058 
                .UAV_BYTEENABLE_W               (4),
3059 
                .UAV_ADDRESS_W                  (30),
3060 
                .UAV_BURSTCOUNT_W               (3),
3061 
                .AV_READLATENCY                 (0),
3062 
                .USE_READDATAVALID              (0),
3063 
                .USE_WAITREQUEST                (0),
3064 
                .USE_UAV_CLKEN                  (0),
3065 
                .USE_READRESPONSE               (0),
3066 
                .USE_WRITERESPONSE              (0),
3067 
                .AV_SYMBOLS_PER_WORD            (4),
3068 
                .AV_ADDRESS_SYMBOLS             (0),
3069 
                .AV_BURSTCOUNT_SYMBOLS          (0),
3070 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
3071 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
3072 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
3073 
                .CHIPSELECT_THROUGH_READLATENCY (0),
3074 
                .AV_READ_WAIT_CYCLES            (1),
3075 
                .AV_WRITE_WAIT_CYCLES           (0),
3076 
                .AV_SETUP_WAIT_CYCLES           (0),
3077 
                .AV_DATA_HOLD_CYCLES            (0)
3078 
        ) clock_sel_s1_translator (
3079 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
3080 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
3081 
                .uav_address            (clock_sel_s1_agent_m0_address),                  // avalon_universal_slave_0.address
3082 
                .uav_burstcount         (clock_sel_s1_agent_m0_burstcount),               //                         .burstcount
3083 
                .uav_read               (clock_sel_s1_agent_m0_read),                     //                         .read
3084 
                .uav_write              (clock_sel_s1_agent_m0_write),                    //                         .write
3085 
                .uav_waitrequest        (clock_sel_s1_agent_m0_waitrequest),              //                         .waitrequest
3086 
                .uav_readdatavalid      (clock_sel_s1_agent_m0_readdatavalid),            //                         .readdatavalid
3087 
                .uav_byteenable         (clock_sel_s1_agent_m0_byteenable),               //                         .byteenable
3088 
                .uav_readdata           (clock_sel_s1_agent_m0_readdata),                 //                         .readdata
3089 
                .uav_writedata          (clock_sel_s1_agent_m0_writedata),                //                         .writedata
3090 
                .uav_lock               (clock_sel_s1_agent_m0_lock),                     //                         .lock
3091 
                .uav_debugaccess        (clock_sel_s1_agent_m0_debugaccess),              //                         .debugaccess
3092 
                .av_address             (clock_sel_s1_address),                           //      avalon_anti_slave_0.address
3093 
                .av_write               (clock_sel_s1_write),                             //                         .write
3094 
                .av_readdata            (clock_sel_s1_readdata),                          //                         .readdata
3095 
                .av_writedata           (clock_sel_s1_writedata),                         //                         .writedata
3096 
                .av_chipselect          (clock_sel_s1_chipselect),                        //                         .chipselect
3097 
                .av_read                (),                                               //              (terminated)
3098 
                .av_begintransfer       (),                                               //              (terminated)
3099 
                .av_beginbursttransfer  (),                                               //              (terminated)
3100 
                .av_burstcount          (),                                               //              (terminated)
3101 
                .av_byteenable          (),                                               //              (terminated)
3102 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
3103 
                .av_waitrequest         (1'b0),                                           //              (terminated)
3104 
                .av_writebyteenable     (),                                               //              (terminated)
3105 
                .av_lock                (),                                               //              (terminated)
3106 
                .av_clken               (),                                               //              (terminated)
3107 
                .uav_clken              (1'b0),                                           //              (terminated)
3108 
                .av_debugaccess         (),                                               //              (terminated)
3109 
                .av_outputenable        (),                                               //              (terminated)
3110 
                .uav_response           (),                                               //              (terminated)
3111 
                .av_response            (2'b00),                                          //              (terminated)
3112 
                .uav_writeresponsevalid (),                                               //              (terminated)
3113 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
3114 
        );
3115 
 
3116 
        altera_merlin_slave_translator #(
3117 
                .AV_ADDRESS_W                   (2),
3118 
                .AV_DATA_W                      (32),
3119 
                .UAV_DATA_W                     (32),
3120 
                .AV_BURSTCOUNT_W                (1),
3121 
                .AV_BYTEENABLE_W                (1),
3122 
                .UAV_BYTEENABLE_W               (4),
3123 
                .UAV_ADDRESS_W                  (30),
3124 
                .UAV_BURSTCOUNT_W               (3),
3125 
                .AV_READLATENCY                 (0),
3126 
                .USE_READDATAVALID              (0),
3127 
                .USE_WAITREQUEST                (0),
3128 
                .USE_UAV_CLKEN                  (0),
3129 
                .USE_READRESPONSE               (0),
3130 
                .USE_WRITERESPONSE              (0),
3131 
                .AV_SYMBOLS_PER_WORD            (4),
3132 
                .AV_ADDRESS_SYMBOLS             (0),
3133 
                .AV_BURSTCOUNT_SYMBOLS          (0),
3134 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
3135 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
3136 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
3137 
                .CHIPSELECT_THROUGH_READLATENCY (0),
3138 
                .AV_READ_WAIT_CYCLES            (1),
3139 
                .AV_WRITE_WAIT_CYCLES           (0),
3140 
                .AV_SETUP_WAIT_CYCLES           (0),
3141 
                .AV_DATA_HOLD_CYCLES            (0)
3142 
        ) fsm_info_s1_translator (
3143 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
3144 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
3145 
                .uav_address            (fsm_info_s1_agent_m0_address),                   // avalon_universal_slave_0.address
3146 
                .uav_burstcount         (fsm_info_s1_agent_m0_burstcount),                //                         .burstcount
3147 
                .uav_read               (fsm_info_s1_agent_m0_read),                      //                         .read
3148 
                .uav_write              (fsm_info_s1_agent_m0_write),                     //                         .write
3149 
                .uav_waitrequest        (fsm_info_s1_agent_m0_waitrequest),               //                         .waitrequest
3150 
                .uav_readdatavalid      (fsm_info_s1_agent_m0_readdatavalid),             //                         .readdatavalid
3151 
                .uav_byteenable         (fsm_info_s1_agent_m0_byteenable),                //                         .byteenable
3152 
                .uav_readdata           (fsm_info_s1_agent_m0_readdata),                  //                         .readdata
3153 
                .uav_writedata          (fsm_info_s1_agent_m0_writedata),                 //                         .writedata
3154 
                .uav_lock               (fsm_info_s1_agent_m0_lock),                      //                         .lock
3155 
                .uav_debugaccess        (fsm_info_s1_agent_m0_debugaccess),               //                         .debugaccess
3156 
                .av_address             (fsm_info_s1_address),                            //      avalon_anti_slave_0.address
3157 
                .av_readdata            (fsm_info_s1_readdata),                           //                         .readdata
3158 
                .av_write               (),                                               //              (terminated)
3159 
                .av_read                (),                                               //              (terminated)
3160 
                .av_writedata           (),                                               //              (terminated)
3161 
                .av_begintransfer       (),                                               //              (terminated)
3162 
                .av_beginbursttransfer  (),                                               //              (terminated)
3163 
                .av_burstcount          (),                                               //              (terminated)
3164 
                .av_byteenable          (),                                               //              (terminated)
3165 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
3166 
                .av_waitrequest         (1'b0),                                           //              (terminated)
3167 
                .av_writebyteenable     (),                                               //              (terminated)
3168 
                .av_lock                (),                                               //              (terminated)
3169 
                .av_chipselect          (),                                               //              (terminated)
3170 
                .av_clken               (),                                               //              (terminated)
3171 
                .uav_clken              (1'b0),                                           //              (terminated)
3172 
                .av_debugaccess         (),                                               //              (terminated)
3173 
                .av_outputenable        (),                                               //              (terminated)
3174 
                .uav_response           (),                                               //              (terminated)
3175 
                .av_response            (2'b00),                                          //              (terminated)
3176 
                .uav_writeresponsevalid (),                                               //              (terminated)
3177 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
3178 
        );
3179 
 
3180 
        altera_merlin_slave_translator #(
3181 
                .AV_ADDRESS_W                   (2),
3182 
                .AV_DATA_W                      (32),
3183 
                .UAV_DATA_W                     (32),
3184 
                .AV_BURSTCOUNT_W                (1),
3185 
                .AV_BYTEENABLE_W                (1),
3186 
                .UAV_BYTEENABLE_W               (4),
3187 
                .UAV_ADDRESS_W                  (30),
3188 
                .UAV_BURSTCOUNT_W               (3),
3189 
                .AV_READLATENCY                 (0),
3190 
                .USE_READDATAVALID              (0),
3191 
                .USE_WAITREQUEST                (0),
3192 
                .USE_UAV_CLKEN                  (0),
3193 
                .USE_READRESPONSE               (0),
3194 
                .USE_WRITERESPONSE              (0),
3195 
                .AV_SYMBOLS_PER_WORD            (4),
3196 
                .AV_ADDRESS_SYMBOLS             (0),
3197 
                .AV_BURSTCOUNT_SYMBOLS          (0),
3198 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
3199 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
3200 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
3201 
                .CHIPSELECT_THROUGH_READLATENCY (0),
3202 
                .AV_READ_WAIT_CYCLES            (1),
3203 
                .AV_WRITE_WAIT_CYCLES           (0),
3204 
                .AV_SETUP_WAIT_CYCLES           (0),
3205 
                .AV_DATA_HOLD_CYCLES            (0)
3206 
        ) counter_tx_fifo_s1_translator (
3207 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
3208 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
3209 
                .uav_address            (counter_tx_fifo_s1_agent_m0_address),            // avalon_universal_slave_0.address
3210 
                .uav_burstcount         (counter_tx_fifo_s1_agent_m0_burstcount),         //                         .burstcount
3211 
                .uav_read               (counter_tx_fifo_s1_agent_m0_read),               //                         .read
3212 
                .uav_write              (counter_tx_fifo_s1_agent_m0_write),              //                         .write
3213 
                .uav_waitrequest        (counter_tx_fifo_s1_agent_m0_waitrequest),        //                         .waitrequest
3214 
                .uav_readdatavalid      (counter_tx_fifo_s1_agent_m0_readdatavalid),      //                         .readdatavalid
3215 
                .uav_byteenable         (counter_tx_fifo_s1_agent_m0_byteenable),         //                         .byteenable
3216 
                .uav_readdata           (counter_tx_fifo_s1_agent_m0_readdata),           //                         .readdata
3217 
                .uav_writedata          (counter_tx_fifo_s1_agent_m0_writedata),          //                         .writedata
3218 
                .uav_lock               (counter_tx_fifo_s1_agent_m0_lock),               //                         .lock
3219 
                .uav_debugaccess        (counter_tx_fifo_s1_agent_m0_debugaccess),        //                         .debugaccess
3220 
                .av_address             (counter_tx_fifo_s1_address),                     //      avalon_anti_slave_0.address
3221 
                .av_readdata            (counter_tx_fifo_s1_readdata),                    //                         .readdata
3222 
                .av_write               (),                                               //              (terminated)
3223 
                .av_read                (),                                               //              (terminated)
3224 
                .av_writedata           (),                                               //              (terminated)
3225 
                .av_begintransfer       (),                                               //              (terminated)
3226 
                .av_beginbursttransfer  (),                                               //              (terminated)
3227 
                .av_burstcount          (),                                               //              (terminated)
3228 
                .av_byteenable          (),                                               //              (terminated)
3229 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
3230 
                .av_waitrequest         (1'b0),                                           //              (terminated)
3231 
                .av_writebyteenable     (),                                               //              (terminated)
3232 
                .av_lock                (),                                               //              (terminated)
3233 
                .av_chipselect          (),                                               //              (terminated)
3234 
                .av_clken               (),                                               //              (terminated)
3235 
                .uav_clken              (1'b0),                                           //              (terminated)
3236 
                .av_debugaccess         (),                                               //              (terminated)
3237 
                .av_outputenable        (),                                               //              (terminated)
3238 
                .uav_response           (),                                               //              (terminated)
3239 
                .av_response            (2'b00),                                          //              (terminated)
3240 
                .uav_writeresponsevalid (),                                               //              (terminated)
3241 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
3242 
        );
3243 
 
3244 
        altera_merlin_slave_translator #(
3245 
                .AV_ADDRESS_W                   (2),
3246 
                .AV_DATA_W                      (32),
3247 
                .UAV_DATA_W                     (32),
3248 
                .AV_BURSTCOUNT_W                (1),
3249 
                .AV_BYTEENABLE_W                (1),
3250 
                .UAV_BYTEENABLE_W               (4),
3251 
                .UAV_ADDRESS_W                  (30),
3252 
                .UAV_BURSTCOUNT_W               (3),
3253 
                .AV_READLATENCY                 (0),
3254 
                .USE_READDATAVALID              (0),
3255 
                .USE_WAITREQUEST                (0),
3256 
                .USE_UAV_CLKEN                  (0),
3257 
                .USE_READRESPONSE               (0),
3258 
                .USE_WRITERESPONSE              (0),
3259 
                .AV_SYMBOLS_PER_WORD            (4),
3260 
                .AV_ADDRESS_SYMBOLS             (0),
3261 
                .AV_BURSTCOUNT_SYMBOLS          (0),
3262 
                .AV_CONSTANT_BURST_BEHAVIOR     (0),
3263 
                .UAV_CONSTANT_BURST_BEHAVIOR    (0),
3264 
                .AV_REQUIRE_UNALIGNED_ADDRESSES (0),
3265 
                .CHIPSELECT_THROUGH_READLATENCY (0),
3266 
                .AV_READ_WAIT_CYCLES            (1),
3267 
                .AV_WRITE_WAIT_CYCLES           (0),
3268 
                .AV_SETUP_WAIT_CYCLES           (0),
3269 
                .AV_DATA_HOLD_CYCLES            (0)
3270 
        ) counter_rx_fifo_s1_translator (
3271 
                .clk                    (clk_0_clk_clk),                                  //                      clk.clk
3272 
                .reset                  (led_pio_test_reset_reset_bridge_in_reset_reset), //                    reset.reset
3273 
                .uav_address            (counter_rx_fifo_s1_agent_m0_address),            // avalon_universal_slave_0.address
3274 
                .uav_burstcount         (counter_rx_fifo_s1_agent_m0_burstcount),         //                         .burstcount
3275 
                .uav_read               (counter_rx_fifo_s1_agent_m0_read),               //                         .read
3276 
                .uav_write              (counter_rx_fifo_s1_agent_m0_write),              //                         .write
3277 
                .uav_waitrequest        (counter_rx_fifo_s1_agent_m0_waitrequest),        //                         .waitrequest
3278 
                .uav_readdatavalid      (counter_rx_fifo_s1_agent_m0_readdatavalid),      //                         .readdatavalid
3279 
                .uav_byteenable         (counter_rx_fifo_s1_agent_m0_byteenable),         //                         .byteenable
3280 
                .uav_readdata           (counter_rx_fifo_s1_agent_m0_readdata),           //                         .readdata
3281 
                .uav_writedata          (counter_rx_fifo_s1_agent_m0_writedata),          //                         .writedata
3282 
                .uav_lock               (counter_rx_fifo_s1_agent_m0_lock),               //                         .lock
3283 
                .uav_debugaccess        (counter_rx_fifo_s1_agent_m0_debugaccess),        //                         .debugaccess
3284 
                .av_address             (counter_rx_fifo_s1_address),                     //      avalon_anti_slave_0.address
3285 
                .av_readdata            (counter_rx_fifo_s1_readdata),                    //                         .readdata
3286 
                .av_write               (),                                               //              (terminated)
3287 
                .av_read                (),                                               //              (terminated)
3288 
                .av_writedata           (),                                               //              (terminated)
3289 
                .av_begintransfer       (),                                               //              (terminated)
3290 
                .av_beginbursttransfer  (),                                               //              (terminated)
3291 
                .av_burstcount          (),                                               //              (terminated)
3292 
                .av_byteenable          (),                                               //              (terminated)
3293 
                .av_readdatavalid       (1'b0),                                           //              (terminated)
3294 
                .av_waitrequest         (1'b0),                                           //              (terminated)
3295 
                .av_writebyteenable     (),                                               //              (terminated)
3296 
                .av_lock                (),                                               //              (terminated)
3297 
                .av_chipselect          (),                                               //              (terminated)
3298 
                .av_clken               (),                                               //              (terminated)
3299 
                .uav_clken              (1'b0),                                           //              (terminated)
3300 
                .av_debugaccess         (),                                               //              (terminated)
3301 
                .av_outputenable        (),                                               //              (terminated)
3302 
                .uav_response           (),                                               //              (terminated)
3303 
                .av_response            (2'b00),                                          //              (terminated)
3304 
                .uav_writeresponsevalid (),                                               //              (terminated)
3305 
                .av_writeresponsevalid  (1'b0)                                            //              (terminated)
3306 
        );
3307 
 
3308 
        altera_merlin_axi_master_ni #(
3309 
                .ID_WIDTH                  (12),
3310 
                .ADDR_WIDTH                (30),
3311 
                .RDATA_WIDTH               (32),
3312 
                .WDATA_WIDTH               (32),
3313 
                .ADDR_USER_WIDTH           (1),
3314 
                .DATA_USER_WIDTH           (1),
3315 
                .AXI_BURST_LENGTH_WIDTH    (4),
3316 
                .AXI_LOCK_WIDTH            (2),
3317 
                .AXI_VERSION               ("AXI3"),
3318 
                .WRITE_ISSUING_CAPABILITY  (8),
3319 
                .READ_ISSUING_CAPABILITY   (8),
3320 
                .PKT_BEGIN_BURST           (93),
3321 
                .PKT_CACHE_H               (123),
3322 
                .PKT_CACHE_L               (120),
3323 
                .PKT_ADDR_SIDEBAND_H       (91),
3324 
                .PKT_ADDR_SIDEBAND_L       (91),
3325 
                .PKT_PROTECTION_H          (119),
3326 
                .PKT_PROTECTION_L          (117),
3327 
                .PKT_BURST_SIZE_H          (88),
3328 
                .PKT_BURST_SIZE_L          (86),
3329 
                .PKT_BURST_TYPE_H          (90),
3330 
                .PKT_BURST_TYPE_L          (89),
3331 
                .PKT_RESPONSE_STATUS_L     (124),
3332 
                .PKT_RESPONSE_STATUS_H     (125),
3333 
                .PKT_BURSTWRAP_H           (85),
3334 
                .PKT_BURSTWRAP_L           (79),
3335 
                .PKT_BYTE_CNT_H            (78),
3336 
                .PKT_BYTE_CNT_L            (72),
3337 
                .PKT_ADDR_H                (65),
3338 
                .PKT_ADDR_L                (36),
3339 
                .PKT_TRANS_EXCLUSIVE       (71),
3340 
                .PKT_TRANS_LOCK            (70),
3341 
                .PKT_TRANS_COMPRESSED_READ (66),
3342 
                .PKT_TRANS_POSTED          (67),
3343 
                .PKT_TRANS_WRITE           (68),
3344 
                .PKT_TRANS_READ            (69),
3345 
                .PKT_DATA_H                (31),
3346 
                .PKT_DATA_L                (0),
3347 
                .PKT_BYTEEN_H              (35),
3348 
                .PKT_BYTEEN_L              (32),
3349 
                .PKT_SRC_ID_H              (99),
3350 
                .PKT_SRC_ID_L              (95),
3351 
                .PKT_DEST_ID_H             (104),
3352 
                .PKT_DEST_ID_L             (100),
3353 
                .PKT_THREAD_ID_H           (116),
3354 
                .PKT_THREAD_ID_L           (105),
3355 
                .PKT_QOS_L                 (94),
3356 
                .PKT_QOS_H                 (94),
3357 
                .PKT_ORI_BURST_SIZE_L      (126),
3358 
                .PKT_ORI_BURST_SIZE_H      (128),
3359 
                .PKT_DATA_SIDEBAND_H       (92),
3360 
                .PKT_DATA_SIDEBAND_L       (92),
3361 
                .ST_DATA_W                 (129),
3362 
                .ST_CHANNEL_W              (22),
3363 
                .ID                        (0)
3364 
        ) hps_0_h2f_axi_master_agent (
3365 
                .aclk                   (clk_0_clk_clk),                                                     //              clk.clk
3366 
                .aresetn                (~hps_0_h2f_axi_master_agent_clk_reset_reset_bridge_in_reset_reset), //        clk_reset.reset_n
3367 
                .write_cp_valid         (hps_0_h2f_axi_master_agent_write_cp_valid),                         //         write_cp.valid
3368 
                .write_cp_data          (hps_0_h2f_axi_master_agent_write_cp_data),                          //                 .data
3369 
                .write_cp_startofpacket (hps_0_h2f_axi_master_agent_write_cp_startofpacket),                 //                 .startofpacket
3370 
                .write_cp_endofpacket   (hps_0_h2f_axi_master_agent_write_cp_endofpacket),                   //                 .endofpacket
3371 
                .write_cp_ready         (hps_0_h2f_axi_master_agent_write_cp_ready),                         //                 .ready
3372 
                .write_rp_valid         (hps_0_h2f_axi_master_wr_limiter_rsp_src_valid),                     //         write_rp.valid
3373 
                .write_rp_data          (hps_0_h2f_axi_master_wr_limiter_rsp_src_data),                      //                 .data
3374 
                .write_rp_channel       (hps_0_h2f_axi_master_wr_limiter_rsp_src_channel),                   //                 .channel
3375 
                .write_rp_startofpacket (hps_0_h2f_axi_master_wr_limiter_rsp_src_startofpacket),             //                 .startofpacket
3376 
                .write_rp_endofpacket   (hps_0_h2f_axi_master_wr_limiter_rsp_src_endofpacket),               //                 .endofpacket
3377 
                .write_rp_ready         (hps_0_h2f_axi_master_wr_limiter_rsp_src_ready),                     //                 .ready
3378 
                .read_cp_valid          (hps_0_h2f_axi_master_agent_read_cp_valid),                          //          read_cp.valid
3379 
                .read_cp_data           (hps_0_h2f_axi_master_agent_read_cp_data),                           //                 .data
3380 
                .read_cp_startofpacket  (hps_0_h2f_axi_master_agent_read_cp_startofpacket),                  //                 .startofpacket
3381 
                .read_cp_endofpacket    (hps_0_h2f_axi_master_agent_read_cp_endofpacket),                    //                 .endofpacket
3382 
                .read_cp_ready          (hps_0_h2f_axi_master_agent_read_cp_ready),                          //                 .ready
3383 
                .read_rp_valid          (hps_0_h2f_axi_master_rd_limiter_rsp_src_valid),                     //          read_rp.valid
3384 
                .read_rp_data           (hps_0_h2f_axi_master_rd_limiter_rsp_src_data),                      //                 .data
3385 
                .read_rp_channel        (hps_0_h2f_axi_master_rd_limiter_rsp_src_channel),                   //                 .channel
3386 
                .read_rp_startofpacket  (hps_0_h2f_axi_master_rd_limiter_rsp_src_startofpacket),             //                 .startofpacket
3387 
                .read_rp_endofpacket    (hps_0_h2f_axi_master_rd_limiter_rsp_src_endofpacket),               //                 .endofpacket
3388 
                .read_rp_ready          (hps_0_h2f_axi_master_rd_limiter_rsp_src_ready),                     //                 .ready
3389 
                .awid                   (hps_0_h2f_axi_master_awid),                                         // altera_axi_slave.awid
3390 
                .awaddr                 (hps_0_h2f_axi_master_awaddr),                                       //                 .awaddr
3391 
                .awlen                  (hps_0_h2f_axi_master_awlen),                                        //                 .awlen
3392 
                .awsize                 (hps_0_h2f_axi_master_awsize),                                       //                 .awsize
3393 
                .awburst                (hps_0_h2f_axi_master_awburst),                                      //                 .awburst
3394 
                .awlock                 (hps_0_h2f_axi_master_awlock),                                       //                 .awlock
3395 
                .awcache                (hps_0_h2f_axi_master_awcache),                                      //                 .awcache
3396 
                .awprot                 (hps_0_h2f_axi_master_awprot),                                       //                 .awprot
3397 
                .awvalid                (hps_0_h2f_axi_master_awvalid),                                      //                 .awvalid
3398 
                .awready                (hps_0_h2f_axi_master_awready),                                      //                 .awready
3399 
                .wid                    (hps_0_h2f_axi_master_wid),                                          //                 .wid
3400 
                .wdata                  (hps_0_h2f_axi_master_wdata),                                        //                 .wdata
3401 
                .wstrb                  (hps_0_h2f_axi_master_wstrb),                                        //                 .wstrb
3402 
                .wlast                  (hps_0_h2f_axi_master_wlast),                                        //                 .wlast
3403 
                .wvalid                 (hps_0_h2f_axi_master_wvalid),                                       //                 .wvalid
3404 
                .wready                 (hps_0_h2f_axi_master_wready),                                       //                 .wready
3405 
                .bid                    (hps_0_h2f_axi_master_bid),                                          //                 .bid
3406 
                .bresp                  (hps_0_h2f_axi_master_bresp),                                        //                 .bresp
3407 
                .bvalid                 (hps_0_h2f_axi_master_bvalid),                                       //                 .bvalid
3408 
                .bready                 (hps_0_h2f_axi_master_bready),                                       //                 .bready
3409 
                .arid                   (hps_0_h2f_axi_master_arid),                                         //                 .arid
3410 
                .araddr                 (hps_0_h2f_axi_master_araddr),                                       //                 .araddr
3411 
                .arlen                  (hps_0_h2f_axi_master_arlen),                                        //                 .arlen
3412 
                .arsize                 (hps_0_h2f_axi_master_arsize),                                       //                 .arsize
3413 
                .arburst                (hps_0_h2f_axi_master_arburst),                                      //                 .arburst
3414 
                .arlock                 (hps_0_h2f_axi_master_arlock),                                       //                 .arlock
3415 
                .arcache                (hps_0_h2f_axi_master_arcache),                                      //                 .arcache
3416 
                .arprot                 (hps_0_h2f_axi_master_arprot),                                       //                 .arprot
3417 
                .arvalid                (hps_0_h2f_axi_master_arvalid),                                      //                 .arvalid
3418 
                .arready                (hps_0_h2f_axi_master_arready),                                      //                 .arready
3419 
                .rid                    (hps_0_h2f_axi_master_rid),                                          //                 .rid
3420 
                .rdata                  (hps_0_h2f_axi_master_rdata),                                        //                 .rdata
3421 
                .rresp                  (hps_0_h2f_axi_master_rresp),                                        //                 .rresp
3422 
                .rlast                  (hps_0_h2f_axi_master_rlast),                                        //                 .rlast
3423 
                .rvalid                 (hps_0_h2f_axi_master_rvalid),                                       //                 .rvalid
3424 
                .rready                 (hps_0_h2f_axi_master_rready),                                       //                 .rready
3425 
                .awuser                 (1'b0),                                                              //      (terminated)
3426 
                .aruser                 (1'b0),                                                              //      (terminated)
3427 
                .awqos                  (4'b0000),                                                           //      (terminated)
3428 
                .arqos                  (4'b0000),                                                           //      (terminated)
3429 
                .awregion               (4'b0000),                                                           //      (terminated)
3430 
                .arregion               (4'b0000),                                                           //      (terminated)
3431 
                .wuser                  (1'b0),                                                              //      (terminated)
3432 
                .ruser                  (),                                                                  //      (terminated)
3433 
                .buser                  ()                                                                   //      (terminated)
3434 
        );
3435 
 
3436 
        altera_merlin_slave_agent #(
3437 
                .PKT_ORI_BURST_SIZE_H      (128),
3438 
                .PKT_ORI_BURST_SIZE_L      (126),
3439 
                .PKT_RESPONSE_STATUS_H     (125),
3440 
                .PKT_RESPONSE_STATUS_L     (124),
3441 
                .PKT_BURST_SIZE_H          (88),
3442 
                .PKT_BURST_SIZE_L          (86),
3443 
                .PKT_TRANS_LOCK            (70),
3444 
                .PKT_BEGIN_BURST           (93),
3445 
                .PKT_PROTECTION_H          (119),
3446 
                .PKT_PROTECTION_L          (117),
3447 
                .PKT_BURSTWRAP_H           (85),
3448 
                .PKT_BURSTWRAP_L           (79),
3449 
                .PKT_BYTE_CNT_H            (78),
3450 
                .PKT_BYTE_CNT_L            (72),
3451 
                .PKT_ADDR_H                (65),
3452 
                .PKT_ADDR_L                (36),
3453 
                .PKT_TRANS_COMPRESSED_READ (66),
3454 
                .PKT_TRANS_POSTED          (67),
3455 
                .PKT_TRANS_WRITE           (68),
3456 
                .PKT_TRANS_READ            (69),
3457 
                .PKT_DATA_H                (31),
3458 
                .PKT_DATA_L                (0),
3459 
                .PKT_BYTEEN_H              (35),
3460 
                .PKT_BYTEEN_L              (32),
3461 
                .PKT_SRC_ID_H              (99),
3462 
                .PKT_SRC_ID_L              (95),
3463 
                .PKT_DEST_ID_H             (104),
3464 
                .PKT_DEST_ID_L             (100),
3465 
                .PKT_SYMBOL_W              (8),
3466 
                .ST_CHANNEL_W              (22),
3467 
                .ST_DATA_W                 (129),
3468 
                .AVS_BURSTCOUNT_W          (3),
3469 
                .SUPPRESS_0_BYTEEN_CMD     (1),
3470 
                .PREVENT_FIFO_OVERFLOW     (1),
3471 
                .USE_READRESPONSE          (0),
3472 
                .USE_WRITERESPONSE         (0),
3473 
                .ECC_ENABLE                (0)
3474 
        ) led_pio_test_s1_agent (
3475 
                .clk                     (clk_0_clk_clk),                                       //             clk.clk
3476 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),      //       clk_reset.reset
3477 
                .m0_address              (led_pio_test_s1_agent_m0_address),                    //              m0.address
3478 
                .m0_burstcount           (led_pio_test_s1_agent_m0_burstcount),                 //                .burstcount
3479 
                .m0_byteenable           (led_pio_test_s1_agent_m0_byteenable),                 //                .byteenable
3480 
                .m0_debugaccess          (led_pio_test_s1_agent_m0_debugaccess),                //                .debugaccess
3481 
                .m0_lock                 (led_pio_test_s1_agent_m0_lock),                       //                .lock
3482 
                .m0_readdata             (led_pio_test_s1_agent_m0_readdata),                   //                .readdata
3483 
                .m0_readdatavalid        (led_pio_test_s1_agent_m0_readdatavalid),              //                .readdatavalid
3484 
                .m0_read                 (led_pio_test_s1_agent_m0_read),                       //                .read
3485 
                .m0_waitrequest          (led_pio_test_s1_agent_m0_waitrequest),                //                .waitrequest
3486 
                .m0_writedata            (led_pio_test_s1_agent_m0_writedata),                  //                .writedata
3487 
                .m0_write                (led_pio_test_s1_agent_m0_write),                      //                .write
3488 
                .rp_endofpacket          (led_pio_test_s1_agent_rp_endofpacket),                //              rp.endofpacket
3489 
                .rp_ready                (led_pio_test_s1_agent_rp_ready),                      //                .ready
3490 
                .rp_valid                (led_pio_test_s1_agent_rp_valid),                      //                .valid
3491 
                .rp_data                 (led_pio_test_s1_agent_rp_data),                       //                .data
3492 
                .rp_startofpacket        (led_pio_test_s1_agent_rp_startofpacket),              //                .startofpacket
3493 
                .cp_ready                (led_pio_test_s1_burst_adapter_source0_ready),         //              cp.ready
3494 
                .cp_valid                (led_pio_test_s1_burst_adapter_source0_valid),         //                .valid
3495 
                .cp_data                 (led_pio_test_s1_burst_adapter_source0_data),          //                .data
3496 
                .cp_startofpacket        (led_pio_test_s1_burst_adapter_source0_startofpacket), //                .startofpacket
3497 
                .cp_endofpacket          (led_pio_test_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
3498 
                .cp_channel              (led_pio_test_s1_burst_adapter_source0_channel),       //                .channel
3499 
                .rf_sink_ready           (led_pio_test_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
3500 
                .rf_sink_valid           (led_pio_test_s1_agent_rsp_fifo_out_valid),            //                .valid
3501 
                .rf_sink_startofpacket   (led_pio_test_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
3502 
                .rf_sink_endofpacket     (led_pio_test_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
3503 
                .rf_sink_data            (led_pio_test_s1_agent_rsp_fifo_out_data),             //                .data
3504 
                .rf_source_ready         (led_pio_test_s1_agent_rf_source_ready),               //       rf_source.ready
3505 
                .rf_source_valid         (led_pio_test_s1_agent_rf_source_valid),               //                .valid
3506 
                .rf_source_startofpacket (led_pio_test_s1_agent_rf_source_startofpacket),       //                .startofpacket
3507 
                .rf_source_endofpacket   (led_pio_test_s1_agent_rf_source_endofpacket),         //                .endofpacket
3508 
                .rf_source_data          (led_pio_test_s1_agent_rf_source_data),                //                .data
3509 
                .rdata_fifo_sink_ready   (avalon_st_adapter_out_0_ready),                       // rdata_fifo_sink.ready
3510 
                .rdata_fifo_sink_valid   (avalon_st_adapter_out_0_valid),                       //                .valid
3511 
                .rdata_fifo_sink_data    (avalon_st_adapter_out_0_data),                        //                .data
3512 
                .rdata_fifo_sink_error   (avalon_st_adapter_out_0_error),                       //                .error
3513 
                .rdata_fifo_src_ready    (led_pio_test_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
3514 
                .rdata_fifo_src_valid    (led_pio_test_s1_agent_rdata_fifo_src_valid),          //                .valid
3515 
                .rdata_fifo_src_data     (led_pio_test_s1_agent_rdata_fifo_src_data),           //                .data
3516 
                .m0_response             (2'b00),                                               //     (terminated)
3517 
                .m0_writeresponsevalid   (1'b0)                                                 //     (terminated)
3518 
        );
3519 
 
3520 
        altera_avalon_sc_fifo #(
3521 
                .SYMBOLS_PER_BEAT    (1),
3522 
                .BITS_PER_SYMBOL     (130),
3523 
                .FIFO_DEPTH          (2),
3524 
                .CHANNEL_WIDTH       (0),
3525 
                .ERROR_WIDTH         (0),
3526 
                .USE_PACKETS         (1),
3527 
                .USE_FILL_LEVEL      (0),
3528 
                .EMPTY_LATENCY       (1),
3529 
                .USE_MEMORY_BLOCKS   (0),
3530 
                .USE_STORE_FORWARD   (0),
3531 
                .USE_ALMOST_FULL_IF  (0),
3532 
                .USE_ALMOST_EMPTY_IF (0)
3533 
        ) led_pio_test_s1_agent_rsp_fifo (
3534 
                .clk               (clk_0_clk_clk),                                    //       clk.clk
3535 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),   // clk_reset.reset
3536 
                .in_data           (led_pio_test_s1_agent_rf_source_data),             //        in.data
3537 
                .in_valid          (led_pio_test_s1_agent_rf_source_valid),            //          .valid
3538 
                .in_ready          (led_pio_test_s1_agent_rf_source_ready),            //          .ready
3539 
                .in_startofpacket  (led_pio_test_s1_agent_rf_source_startofpacket),    //          .startofpacket
3540 
                .in_endofpacket    (led_pio_test_s1_agent_rf_source_endofpacket),      //          .endofpacket
3541 
                .out_data          (led_pio_test_s1_agent_rsp_fifo_out_data),          //       out.data
3542 
                .out_valid         (led_pio_test_s1_agent_rsp_fifo_out_valid),         //          .valid
3543 
                .out_ready         (led_pio_test_s1_agent_rsp_fifo_out_ready),         //          .ready
3544 
                .out_startofpacket (led_pio_test_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
3545 
                .out_endofpacket   (led_pio_test_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
3546 
                .csr_address       (2'b00),                                            // (terminated)
3547 
                .csr_read          (1'b0),                                             // (terminated)
3548 
                .csr_write         (1'b0),                                             // (terminated)
3549 
                .csr_readdata      (),                                                 // (terminated)
3550 
                .csr_writedata     (32'b00000000000000000000000000000000),             // (terminated)
3551 
                .almost_full_data  (),                                                 // (terminated)
3552 
                .almost_empty_data (),                                                 // (terminated)
3553 
                .in_empty          (1'b0),                                             // (terminated)
3554 
                .out_empty         (),                                                 // (terminated)
3555 
                .in_error          (1'b0),                                             // (terminated)
3556 
                .out_error         (),                                                 // (terminated)
3557 
                .in_channel        (1'b0),                                             // (terminated)
3558 
                .out_channel       ()                                                  // (terminated)
3559 
        );
3560 
 
3561 
        altera_avalon_sc_fifo #(
3562 
                .SYMBOLS_PER_BEAT    (1),
3563 
                .BITS_PER_SYMBOL     (34),
3564 
                .FIFO_DEPTH          (2),
3565 
                .CHANNEL_WIDTH       (0),
3566 
                .ERROR_WIDTH         (0),
3567 
                .USE_PACKETS         (0),
3568 
                .USE_FILL_LEVEL      (0),
3569 
                .EMPTY_LATENCY       (0),
3570 
                .USE_MEMORY_BLOCKS   (0),
3571 
                .USE_STORE_FORWARD   (0),
3572 
                .USE_ALMOST_FULL_IF  (0),
3573 
                .USE_ALMOST_EMPTY_IF (0)
3574 
        ) led_pio_test_s1_agent_rdata_fifo (
3575 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
3576 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
3577 
                .in_data           (led_pio_test_s1_agent_rdata_fifo_src_data),      //        in.data
3578 
                .in_valid          (led_pio_test_s1_agent_rdata_fifo_src_valid),     //          .valid
3579 
                .in_ready          (led_pio_test_s1_agent_rdata_fifo_src_ready),     //          .ready
3580 
                .out_data          (led_pio_test_s1_agent_rdata_fifo_out_data),      //       out.data
3581 
                .out_valid         (led_pio_test_s1_agent_rdata_fifo_out_valid),     //          .valid
3582 
                .out_ready         (led_pio_test_s1_agent_rdata_fifo_out_ready),     //          .ready
3583 
                .csr_address       (2'b00),                                          // (terminated)
3584 
                .csr_read          (1'b0),                                           // (terminated)
3585 
                .csr_write         (1'b0),                                           // (terminated)
3586 
                .csr_readdata      (),                                               // (terminated)
3587 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
3588 
                .almost_full_data  (),                                               // (terminated)
3589 
                .almost_empty_data (),                                               // (terminated)
3590 
                .in_startofpacket  (1'b0),                                           // (terminated)
3591 
                .in_endofpacket    (1'b0),                                           // (terminated)
3592 
                .out_startofpacket (),                                               // (terminated)
3593 
                .out_endofpacket   (),                                               // (terminated)
3594 
                .in_empty          (1'b0),                                           // (terminated)
3595 
                .out_empty         (),                                               // (terminated)
3596 
                .in_error          (1'b0),                                           // (terminated)
3597 
                .out_error         (),                                               // (terminated)
3598 
                .in_channel        (1'b0),                                           // (terminated)
3599 
                .out_channel       ()                                                // (terminated)
3600 
        );
3601 
 
3602 
        altera_merlin_slave_agent #(
3603 
                .PKT_ORI_BURST_SIZE_H      (128),
3604 
                .PKT_ORI_BURST_SIZE_L      (126),
3605 
                .PKT_RESPONSE_STATUS_H     (125),
3606 
                .PKT_RESPONSE_STATUS_L     (124),
3607 
                .PKT_BURST_SIZE_H          (88),
3608 
                .PKT_BURST_SIZE_L          (86),
3609 
                .PKT_TRANS_LOCK            (70),
3610 
                .PKT_BEGIN_BURST           (93),
3611 
                .PKT_PROTECTION_H          (119),
3612 
                .PKT_PROTECTION_L          (117),
3613 
                .PKT_BURSTWRAP_H           (85),
3614 
                .PKT_BURSTWRAP_L           (79),
3615 
                .PKT_BYTE_CNT_H            (78),
3616 
                .PKT_BYTE_CNT_L            (72),
3617 
                .PKT_ADDR_H                (65),
3618 
                .PKT_ADDR_L                (36),
3619 
                .PKT_TRANS_COMPRESSED_READ (66),
3620 
                .PKT_TRANS_POSTED          (67),
3621 
                .PKT_TRANS_WRITE           (68),
3622 
                .PKT_TRANS_READ            (69),
3623 
                .PKT_DATA_H                (31),
3624 
                .PKT_DATA_L                (0),
3625 
                .PKT_BYTEEN_H              (35),
3626 
                .PKT_BYTEEN_L              (32),
3627 
                .PKT_SRC_ID_H              (99),
3628 
                .PKT_SRC_ID_L              (95),
3629 
                .PKT_DEST_ID_H             (104),
3630 
                .PKT_DEST_ID_L             (100),
3631 
                .PKT_SYMBOL_W              (8),
3632 
                .ST_CHANNEL_W              (22),
3633 
                .ST_DATA_W                 (129),
3634 
                .AVS_BURSTCOUNT_W          (3),
3635 
                .SUPPRESS_0_BYTEEN_CMD     (1),
3636 
                .PREVENT_FIFO_OVERFLOW     (1),
3637 
                .USE_READRESPONSE          (0),
3638 
                .USE_WRITERESPONSE         (0),
3639 
                .ECC_ENABLE                (0)
3640 
        ) timecode_rx_s1_agent (
3641 
                .clk                     (clk_0_clk_clk),                                      //             clk.clk
3642 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),     //       clk_reset.reset
3643 
                .m0_address              (timecode_rx_s1_agent_m0_address),                    //              m0.address
3644 
                .m0_burstcount           (timecode_rx_s1_agent_m0_burstcount),                 //                .burstcount
3645 
                .m0_byteenable           (timecode_rx_s1_agent_m0_byteenable),                 //                .byteenable
3646 
                .m0_debugaccess          (timecode_rx_s1_agent_m0_debugaccess),                //                .debugaccess
3647 
                .m0_lock                 (timecode_rx_s1_agent_m0_lock),                       //                .lock
3648 
                .m0_readdata             (timecode_rx_s1_agent_m0_readdata),                   //                .readdata
3649 
                .m0_readdatavalid        (timecode_rx_s1_agent_m0_readdatavalid),              //                .readdatavalid
3650 
                .m0_read                 (timecode_rx_s1_agent_m0_read),                       //                .read
3651 
                .m0_waitrequest          (timecode_rx_s1_agent_m0_waitrequest),                //                .waitrequest
3652 
                .m0_writedata            (timecode_rx_s1_agent_m0_writedata),                  //                .writedata
3653 
                .m0_write                (timecode_rx_s1_agent_m0_write),                      //                .write
3654 
                .rp_endofpacket          (timecode_rx_s1_agent_rp_endofpacket),                //              rp.endofpacket
3655 
                .rp_ready                (timecode_rx_s1_agent_rp_ready),                      //                .ready
3656 
                .rp_valid                (timecode_rx_s1_agent_rp_valid),                      //                .valid
3657 
                .rp_data                 (timecode_rx_s1_agent_rp_data),                       //                .data
3658 
                .rp_startofpacket        (timecode_rx_s1_agent_rp_startofpacket),              //                .startofpacket
3659 
                .cp_ready                (timecode_rx_s1_burst_adapter_source0_ready),         //              cp.ready
3660 
                .cp_valid                (timecode_rx_s1_burst_adapter_source0_valid),         //                .valid
3661 
                .cp_data                 (timecode_rx_s1_burst_adapter_source0_data),          //                .data
3662 
                .cp_startofpacket        (timecode_rx_s1_burst_adapter_source0_startofpacket), //                .startofpacket
3663 
                .cp_endofpacket          (timecode_rx_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
3664 
                .cp_channel              (timecode_rx_s1_burst_adapter_source0_channel),       //                .channel
3665 
                .rf_sink_ready           (timecode_rx_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
3666 
                .rf_sink_valid           (timecode_rx_s1_agent_rsp_fifo_out_valid),            //                .valid
3667 
                .rf_sink_startofpacket   (timecode_rx_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
3668 
                .rf_sink_endofpacket     (timecode_rx_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
3669 
                .rf_sink_data            (timecode_rx_s1_agent_rsp_fifo_out_data),             //                .data
3670 
                .rf_source_ready         (timecode_rx_s1_agent_rf_source_ready),               //       rf_source.ready
3671 
                .rf_source_valid         (timecode_rx_s1_agent_rf_source_valid),               //                .valid
3672 
                .rf_source_startofpacket (timecode_rx_s1_agent_rf_source_startofpacket),       //                .startofpacket
3673 
                .rf_source_endofpacket   (timecode_rx_s1_agent_rf_source_endofpacket),         //                .endofpacket
3674 
                .rf_source_data          (timecode_rx_s1_agent_rf_source_data),                //                .data
3675 
                .rdata_fifo_sink_ready   (avalon_st_adapter_001_out_0_ready),                  // rdata_fifo_sink.ready
3676 
                .rdata_fifo_sink_valid   (avalon_st_adapter_001_out_0_valid),                  //                .valid
3677 
                .rdata_fifo_sink_data    (avalon_st_adapter_001_out_0_data),                   //                .data
3678 
                .rdata_fifo_sink_error   (avalon_st_adapter_001_out_0_error),                  //                .error
3679 
                .rdata_fifo_src_ready    (timecode_rx_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
3680 
                .rdata_fifo_src_valid    (timecode_rx_s1_agent_rdata_fifo_src_valid),          //                .valid
3681 
                .rdata_fifo_src_data     (timecode_rx_s1_agent_rdata_fifo_src_data),           //                .data
3682 
                .m0_response             (2'b00),                                              //     (terminated)
3683 
                .m0_writeresponsevalid   (1'b0)                                                //     (terminated)
3684 
        );
3685 
 
3686 
        altera_avalon_sc_fifo #(
3687 
                .SYMBOLS_PER_BEAT    (1),
3688 
                .BITS_PER_SYMBOL     (130),
3689 
                .FIFO_DEPTH          (2),
3690 
                .CHANNEL_WIDTH       (0),
3691 
                .ERROR_WIDTH         (0),
3692 
                .USE_PACKETS         (1),
3693 
                .USE_FILL_LEVEL      (0),
3694 
                .EMPTY_LATENCY       (1),
3695 
                .USE_MEMORY_BLOCKS   (0),
3696 
                .USE_STORE_FORWARD   (0),
3697 
                .USE_ALMOST_FULL_IF  (0),
3698 
                .USE_ALMOST_EMPTY_IF (0)
3699 
        ) timecode_rx_s1_agent_rsp_fifo (
3700 
                .clk               (clk_0_clk_clk),                                   //       clk.clk
3701 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),  // clk_reset.reset
3702 
                .in_data           (timecode_rx_s1_agent_rf_source_data),             //        in.data
3703 
                .in_valid          (timecode_rx_s1_agent_rf_source_valid),            //          .valid
3704 
                .in_ready          (timecode_rx_s1_agent_rf_source_ready),            //          .ready
3705 
                .in_startofpacket  (timecode_rx_s1_agent_rf_source_startofpacket),    //          .startofpacket
3706 
                .in_endofpacket    (timecode_rx_s1_agent_rf_source_endofpacket),      //          .endofpacket
3707 
                .out_data          (timecode_rx_s1_agent_rsp_fifo_out_data),          //       out.data
3708 
                .out_valid         (timecode_rx_s1_agent_rsp_fifo_out_valid),         //          .valid
3709 
                .out_ready         (timecode_rx_s1_agent_rsp_fifo_out_ready),         //          .ready
3710 
                .out_startofpacket (timecode_rx_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
3711 
                .out_endofpacket   (timecode_rx_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
3712 
                .csr_address       (2'b00),                                           // (terminated)
3713 
                .csr_read          (1'b0),                                            // (terminated)
3714 
                .csr_write         (1'b0),                                            // (terminated)
3715 
                .csr_readdata      (),                                                // (terminated)
3716 
                .csr_writedata     (32'b00000000000000000000000000000000),            // (terminated)
3717 
                .almost_full_data  (),                                                // (terminated)
3718 
                .almost_empty_data (),                                                // (terminated)
3719 
                .in_empty          (1'b0),                                            // (terminated)
3720 
                .out_empty         (),                                                // (terminated)
3721 
                .in_error          (1'b0),                                            // (terminated)
3722 
                .out_error         (),                                                // (terminated)
3723 
                .in_channel        (1'b0),                                            // (terminated)
3724 
                .out_channel       ()                                                 // (terminated)
3725 
        );
3726 
 
3727 
        altera_avalon_sc_fifo #(
3728 
                .SYMBOLS_PER_BEAT    (1),
3729 
                .BITS_PER_SYMBOL     (34),
3730 
                .FIFO_DEPTH          (2),
3731 
                .CHANNEL_WIDTH       (0),
3732 
                .ERROR_WIDTH         (0),
3733 
                .USE_PACKETS         (0),
3734 
                .USE_FILL_LEVEL      (0),
3735 
                .EMPTY_LATENCY       (0),
3736 
                .USE_MEMORY_BLOCKS   (0),
3737 
                .USE_STORE_FORWARD   (0),
3738 
                .USE_ALMOST_FULL_IF  (0),
3739 
                .USE_ALMOST_EMPTY_IF (0)
3740 
        ) timecode_rx_s1_agent_rdata_fifo (
3741 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
3742 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
3743 
                .in_data           (timecode_rx_s1_agent_rdata_fifo_src_data),       //        in.data
3744 
                .in_valid          (timecode_rx_s1_agent_rdata_fifo_src_valid),      //          .valid
3745 
                .in_ready          (timecode_rx_s1_agent_rdata_fifo_src_ready),      //          .ready
3746 
                .out_data          (timecode_rx_s1_agent_rdata_fifo_out_data),       //       out.data
3747 
                .out_valid         (timecode_rx_s1_agent_rdata_fifo_out_valid),      //          .valid
3748 
                .out_ready         (timecode_rx_s1_agent_rdata_fifo_out_ready),      //          .ready
3749 
                .csr_address       (2'b00),                                          // (terminated)
3750 
                .csr_read          (1'b0),                                           // (terminated)
3751 
                .csr_write         (1'b0),                                           // (terminated)
3752 
                .csr_readdata      (),                                               // (terminated)
3753 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
3754 
                .almost_full_data  (),                                               // (terminated)
3755 
                .almost_empty_data (),                                               // (terminated)
3756 
                .in_startofpacket  (1'b0),                                           // (terminated)
3757 
                .in_endofpacket    (1'b0),                                           // (terminated)
3758 
                .out_startofpacket (),                                               // (terminated)
3759 
                .out_endofpacket   (),                                               // (terminated)
3760 
                .in_empty          (1'b0),                                           // (terminated)
3761 
                .out_empty         (),                                               // (terminated)
3762 
                .in_error          (1'b0),                                           // (terminated)
3763 
                .out_error         (),                                               // (terminated)
3764 
                .in_channel        (1'b0),                                           // (terminated)
3765 
                .out_channel       ()                                                // (terminated)
3766 
        );
3767 
 
3768 
        altera_merlin_slave_agent #(
3769 
                .PKT_ORI_BURST_SIZE_H      (128),
3770 
                .PKT_ORI_BURST_SIZE_L      (126),
3771 
                .PKT_RESPONSE_STATUS_H     (125),
3772 
                .PKT_RESPONSE_STATUS_L     (124),
3773 
                .PKT_BURST_SIZE_H          (88),
3774 
                .PKT_BURST_SIZE_L          (86),
3775 
                .PKT_TRANS_LOCK            (70),
3776 
                .PKT_BEGIN_BURST           (93),
3777 
                .PKT_PROTECTION_H          (119),
3778 
                .PKT_PROTECTION_L          (117),
3779 
                .PKT_BURSTWRAP_H           (85),
3780 
                .PKT_BURSTWRAP_L           (79),
3781 
                .PKT_BYTE_CNT_H            (78),
3782 
                .PKT_BYTE_CNT_L            (72),
3783 
                .PKT_ADDR_H                (65),
3784 
                .PKT_ADDR_L                (36),
3785 
                .PKT_TRANS_COMPRESSED_READ (66),
3786 
                .PKT_TRANS_POSTED          (67),
3787 
                .PKT_TRANS_WRITE           (68),
3788 
                .PKT_TRANS_READ            (69),
3789 
                .PKT_DATA_H                (31),
3790 
                .PKT_DATA_L                (0),
3791 
                .PKT_BYTEEN_H              (35),
3792 
                .PKT_BYTEEN_L              (32),
3793 
                .PKT_SRC_ID_H              (99),
3794 
                .PKT_SRC_ID_L              (95),
3795 
                .PKT_DEST_ID_H             (104),
3796 
                .PKT_DEST_ID_L             (100),
3797 
                .PKT_SYMBOL_W              (8),
3798 
                .ST_CHANNEL_W              (22),
3799 
                .ST_DATA_W                 (129),
3800 
                .AVS_BURSTCOUNT_W          (3),
3801 
                .SUPPRESS_0_BYTEEN_CMD     (1),
3802 
                .PREVENT_FIFO_OVERFLOW     (1),
3803 
                .USE_READRESPONSE          (0),
3804 
                .USE_WRITERESPONSE         (0),
3805 
                .ECC_ENABLE                (0)
3806 
        ) timecode_ready_rx_s1_agent (
3807 
                .clk                     (clk_0_clk_clk),                                            //             clk.clk
3808 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),           //       clk_reset.reset
3809 
                .m0_address              (timecode_ready_rx_s1_agent_m0_address),                    //              m0.address
3810 
                .m0_burstcount           (timecode_ready_rx_s1_agent_m0_burstcount),                 //                .burstcount
3811 
                .m0_byteenable           (timecode_ready_rx_s1_agent_m0_byteenable),                 //                .byteenable
3812 
                .m0_debugaccess          (timecode_ready_rx_s1_agent_m0_debugaccess),                //                .debugaccess
3813 
                .m0_lock                 (timecode_ready_rx_s1_agent_m0_lock),                       //                .lock
3814 
                .m0_readdata             (timecode_ready_rx_s1_agent_m0_readdata),                   //                .readdata
3815 
                .m0_readdatavalid        (timecode_ready_rx_s1_agent_m0_readdatavalid),              //                .readdatavalid
3816 
                .m0_read                 (timecode_ready_rx_s1_agent_m0_read),                       //                .read
3817 
                .m0_waitrequest          (timecode_ready_rx_s1_agent_m0_waitrequest),                //                .waitrequest
3818 
                .m0_writedata            (timecode_ready_rx_s1_agent_m0_writedata),                  //                .writedata
3819 
                .m0_write                (timecode_ready_rx_s1_agent_m0_write),                      //                .write
3820 
                .rp_endofpacket          (timecode_ready_rx_s1_agent_rp_endofpacket),                //              rp.endofpacket
3821 
                .rp_ready                (timecode_ready_rx_s1_agent_rp_ready),                      //                .ready
3822 
                .rp_valid                (timecode_ready_rx_s1_agent_rp_valid),                      //                .valid
3823 
                .rp_data                 (timecode_ready_rx_s1_agent_rp_data),                       //                .data
3824 
                .rp_startofpacket        (timecode_ready_rx_s1_agent_rp_startofpacket),              //                .startofpacket
3825 
                .cp_ready                (timecode_ready_rx_s1_burst_adapter_source0_ready),         //              cp.ready
3826 
                .cp_valid                (timecode_ready_rx_s1_burst_adapter_source0_valid),         //                .valid
3827 
                .cp_data                 (timecode_ready_rx_s1_burst_adapter_source0_data),          //                .data
3828 
                .cp_startofpacket        (timecode_ready_rx_s1_burst_adapter_source0_startofpacket), //                .startofpacket
3829 
                .cp_endofpacket          (timecode_ready_rx_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
3830 
                .cp_channel              (timecode_ready_rx_s1_burst_adapter_source0_channel),       //                .channel
3831 
                .rf_sink_ready           (timecode_ready_rx_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
3832 
                .rf_sink_valid           (timecode_ready_rx_s1_agent_rsp_fifo_out_valid),            //                .valid
3833 
                .rf_sink_startofpacket   (timecode_ready_rx_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
3834 
                .rf_sink_endofpacket     (timecode_ready_rx_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
3835 
                .rf_sink_data            (timecode_ready_rx_s1_agent_rsp_fifo_out_data),             //                .data
3836 
                .rf_source_ready         (timecode_ready_rx_s1_agent_rf_source_ready),               //       rf_source.ready
3837 
                .rf_source_valid         (timecode_ready_rx_s1_agent_rf_source_valid),               //                .valid
3838 
                .rf_source_startofpacket (timecode_ready_rx_s1_agent_rf_source_startofpacket),       //                .startofpacket
3839 
                .rf_source_endofpacket   (timecode_ready_rx_s1_agent_rf_source_endofpacket),         //                .endofpacket
3840 
                .rf_source_data          (timecode_ready_rx_s1_agent_rf_source_data),                //                .data
3841 
                .rdata_fifo_sink_ready   (avalon_st_adapter_002_out_0_ready),                        // rdata_fifo_sink.ready
3842 
                .rdata_fifo_sink_valid   (avalon_st_adapter_002_out_0_valid),                        //                .valid
3843 
                .rdata_fifo_sink_data    (avalon_st_adapter_002_out_0_data),                         //                .data
3844 
                .rdata_fifo_sink_error   (avalon_st_adapter_002_out_0_error),                        //                .error
3845 
                .rdata_fifo_src_ready    (timecode_ready_rx_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
3846 
                .rdata_fifo_src_valid    (timecode_ready_rx_s1_agent_rdata_fifo_src_valid),          //                .valid
3847 
                .rdata_fifo_src_data     (timecode_ready_rx_s1_agent_rdata_fifo_src_data),           //                .data
3848 
                .m0_response             (2'b00),                                                    //     (terminated)
3849 
                .m0_writeresponsevalid   (1'b0)                                                      //     (terminated)
3850 
        );
3851 
 
3852 
        altera_avalon_sc_fifo #(
3853 
                .SYMBOLS_PER_BEAT    (1),
3854 
                .BITS_PER_SYMBOL     (130),
3855 
                .FIFO_DEPTH          (2),
3856 
                .CHANNEL_WIDTH       (0),
3857 
                .ERROR_WIDTH         (0),
3858 
                .USE_PACKETS         (1),
3859 
                .USE_FILL_LEVEL      (0),
3860 
                .EMPTY_LATENCY       (1),
3861 
                .USE_MEMORY_BLOCKS   (0),
3862 
                .USE_STORE_FORWARD   (0),
3863 
                .USE_ALMOST_FULL_IF  (0),
3864 
                .USE_ALMOST_EMPTY_IF (0)
3865 
        ) timecode_ready_rx_s1_agent_rsp_fifo (
3866 
                .clk               (clk_0_clk_clk),                                         //       clk.clk
3867 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),        // clk_reset.reset
3868 
                .in_data           (timecode_ready_rx_s1_agent_rf_source_data),             //        in.data
3869 
                .in_valid          (timecode_ready_rx_s1_agent_rf_source_valid),            //          .valid
3870 
                .in_ready          (timecode_ready_rx_s1_agent_rf_source_ready),            //          .ready
3871 
                .in_startofpacket  (timecode_ready_rx_s1_agent_rf_source_startofpacket),    //          .startofpacket
3872 
                .in_endofpacket    (timecode_ready_rx_s1_agent_rf_source_endofpacket),      //          .endofpacket
3873 
                .out_data          (timecode_ready_rx_s1_agent_rsp_fifo_out_data),          //       out.data
3874 
                .out_valid         (timecode_ready_rx_s1_agent_rsp_fifo_out_valid),         //          .valid
3875 
                .out_ready         (timecode_ready_rx_s1_agent_rsp_fifo_out_ready),         //          .ready
3876 
                .out_startofpacket (timecode_ready_rx_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
3877 
                .out_endofpacket   (timecode_ready_rx_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
3878 
                .csr_address       (2'b00),                                                 // (terminated)
3879 
                .csr_read          (1'b0),                                                  // (terminated)
3880 
                .csr_write         (1'b0),                                                  // (terminated)
3881 
                .csr_readdata      (),                                                      // (terminated)
3882 
                .csr_writedata     (32'b00000000000000000000000000000000),                  // (terminated)
3883 
                .almost_full_data  (),                                                      // (terminated)
3884 
                .almost_empty_data (),                                                      // (terminated)
3885 
                .in_empty          (1'b0),                                                  // (terminated)
3886 
                .out_empty         (),                                                      // (terminated)
3887 
                .in_error          (1'b0),                                                  // (terminated)
3888 
                .out_error         (),                                                      // (terminated)
3889 
                .in_channel        (1'b0),                                                  // (terminated)
3890 
                .out_channel       ()                                                       // (terminated)
3891 
        );
3892 
 
3893 
        altera_avalon_sc_fifo #(
3894 
                .SYMBOLS_PER_BEAT    (1),
3895 
                .BITS_PER_SYMBOL     (34),
3896 
                .FIFO_DEPTH          (2),
3897 
                .CHANNEL_WIDTH       (0),
3898 
                .ERROR_WIDTH         (0),
3899 
                .USE_PACKETS         (0),
3900 
                .USE_FILL_LEVEL      (0),
3901 
                .EMPTY_LATENCY       (0),
3902 
                .USE_MEMORY_BLOCKS   (0),
3903 
                .USE_STORE_FORWARD   (0),
3904 
                .USE_ALMOST_FULL_IF  (0),
3905 
                .USE_ALMOST_EMPTY_IF (0)
3906 
        ) timecode_ready_rx_s1_agent_rdata_fifo (
3907 
                .clk               (clk_0_clk_clk),                                   //       clk.clk
3908 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),  // clk_reset.reset
3909 
                .in_data           (timecode_ready_rx_s1_agent_rdata_fifo_src_data),  //        in.data
3910 
                .in_valid          (timecode_ready_rx_s1_agent_rdata_fifo_src_valid), //          .valid
3911 
                .in_ready          (timecode_ready_rx_s1_agent_rdata_fifo_src_ready), //          .ready
3912 
                .out_data          (timecode_ready_rx_s1_agent_rdata_fifo_out_data),  //       out.data
3913 
                .out_valid         (timecode_ready_rx_s1_agent_rdata_fifo_out_valid), //          .valid
3914 
                .out_ready         (timecode_ready_rx_s1_agent_rdata_fifo_out_ready), //          .ready
3915 
                .csr_address       (2'b00),                                           // (terminated)
3916 
                .csr_read          (1'b0),                                            // (terminated)
3917 
                .csr_write         (1'b0),                                            // (terminated)
3918 
                .csr_readdata      (),                                                // (terminated)
3919 
                .csr_writedata     (32'b00000000000000000000000000000000),            // (terminated)
3920 
                .almost_full_data  (),                                                // (terminated)
3921 
                .almost_empty_data (),                                                // (terminated)
3922 
                .in_startofpacket  (1'b0),                                            // (terminated)
3923 
                .in_endofpacket    (1'b0),                                            // (terminated)
3924 
                .out_startofpacket (),                                                // (terminated)
3925 
                .out_endofpacket   (),                                                // (terminated)
3926 
                .in_empty          (1'b0),                                            // (terminated)
3927 
                .out_empty         (),                                                // (terminated)
3928 
                .in_error          (1'b0),                                            // (terminated)
3929 
                .out_error         (),                                                // (terminated)
3930 
                .in_channel        (1'b0),                                            // (terminated)
3931 
                .out_channel       ()                                                 // (terminated)
3932 
        );
3933 
 
3934 
        altera_merlin_slave_agent #(
3935 
                .PKT_ORI_BURST_SIZE_H      (128),
3936 
                .PKT_ORI_BURST_SIZE_L      (126),
3937 
                .PKT_RESPONSE_STATUS_H     (125),
3938 
                .PKT_RESPONSE_STATUS_L     (124),
3939 
                .PKT_BURST_SIZE_H          (88),
3940 
                .PKT_BURST_SIZE_L          (86),
3941 
                .PKT_TRANS_LOCK            (70),
3942 
                .PKT_BEGIN_BURST           (93),
3943 
                .PKT_PROTECTION_H          (119),
3944 
                .PKT_PROTECTION_L          (117),
3945 
                .PKT_BURSTWRAP_H           (85),
3946 
                .PKT_BURSTWRAP_L           (79),
3947 
                .PKT_BYTE_CNT_H            (78),
3948 
                .PKT_BYTE_CNT_L            (72),
3949 
                .PKT_ADDR_H                (65),
3950 
                .PKT_ADDR_L                (36),
3951 
                .PKT_TRANS_COMPRESSED_READ (66),
3952 
                .PKT_TRANS_POSTED          (67),
3953 
                .PKT_TRANS_WRITE           (68),
3954 
                .PKT_TRANS_READ            (69),
3955 
                .PKT_DATA_H                (31),
3956 
                .PKT_DATA_L                (0),
3957 
                .PKT_BYTEEN_H              (35),
3958 
                .PKT_BYTEEN_L              (32),
3959 
                .PKT_SRC_ID_H              (99),
3960 
                .PKT_SRC_ID_L              (95),
3961 
                .PKT_DEST_ID_H             (104),
3962 
                .PKT_DEST_ID_L             (100),
3963 
                .PKT_SYMBOL_W              (8),
3964 
                .ST_CHANNEL_W              (22),
3965 
                .ST_DATA_W                 (129),
3966 
                .AVS_BURSTCOUNT_W          (3),
3967 
                .SUPPRESS_0_BYTEEN_CMD     (1),
3968 
                .PREVENT_FIFO_OVERFLOW     (1),
3969 
                .USE_READRESPONSE          (0),
3970 
                .USE_WRITERESPONSE         (0),
3971 
                .ECC_ENABLE                (0)
3972 
        ) data_flag_rx_s1_agent (
3973 
                .clk                     (clk_0_clk_clk),                                       //             clk.clk
3974 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),      //       clk_reset.reset
3975 
                .m0_address              (data_flag_rx_s1_agent_m0_address),                    //              m0.address
3976 
                .m0_burstcount           (data_flag_rx_s1_agent_m0_burstcount),                 //                .burstcount
3977 
                .m0_byteenable           (data_flag_rx_s1_agent_m0_byteenable),                 //                .byteenable
3978 
                .m0_debugaccess          (data_flag_rx_s1_agent_m0_debugaccess),                //                .debugaccess
3979 
                .m0_lock                 (data_flag_rx_s1_agent_m0_lock),                       //                .lock
3980 
                .m0_readdata             (data_flag_rx_s1_agent_m0_readdata),                   //                .readdata
3981 
                .m0_readdatavalid        (data_flag_rx_s1_agent_m0_readdatavalid),              //                .readdatavalid
3982 
                .m0_read                 (data_flag_rx_s1_agent_m0_read),                       //                .read
3983 
                .m0_waitrequest          (data_flag_rx_s1_agent_m0_waitrequest),                //                .waitrequest
3984 
                .m0_writedata            (data_flag_rx_s1_agent_m0_writedata),                  //                .writedata
3985 
                .m0_write                (data_flag_rx_s1_agent_m0_write),                      //                .write
3986 
                .rp_endofpacket          (data_flag_rx_s1_agent_rp_endofpacket),                //              rp.endofpacket
3987 
                .rp_ready                (data_flag_rx_s1_agent_rp_ready),                      //                .ready
3988 
                .rp_valid                (data_flag_rx_s1_agent_rp_valid),                      //                .valid
3989 
                .rp_data                 (data_flag_rx_s1_agent_rp_data),                       //                .data
3990 
                .rp_startofpacket        (data_flag_rx_s1_agent_rp_startofpacket),              //                .startofpacket
3991 
                .cp_ready                (data_flag_rx_s1_burst_adapter_source0_ready),         //              cp.ready
3992 
                .cp_valid                (data_flag_rx_s1_burst_adapter_source0_valid),         //                .valid
3993 
                .cp_data                 (data_flag_rx_s1_burst_adapter_source0_data),          //                .data
3994 
                .cp_startofpacket        (data_flag_rx_s1_burst_adapter_source0_startofpacket), //                .startofpacket
3995 
                .cp_endofpacket          (data_flag_rx_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
3996 
                .cp_channel              (data_flag_rx_s1_burst_adapter_source0_channel),       //                .channel
3997 
                .rf_sink_ready           (data_flag_rx_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
3998 
                .rf_sink_valid           (data_flag_rx_s1_agent_rsp_fifo_out_valid),            //                .valid
3999 
                .rf_sink_startofpacket   (data_flag_rx_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
4000 
                .rf_sink_endofpacket     (data_flag_rx_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
4001 
                .rf_sink_data            (data_flag_rx_s1_agent_rsp_fifo_out_data),             //                .data
4002 
                .rf_source_ready         (data_flag_rx_s1_agent_rf_source_ready),               //       rf_source.ready
4003 
                .rf_source_valid         (data_flag_rx_s1_agent_rf_source_valid),               //                .valid
4004 
                .rf_source_startofpacket (data_flag_rx_s1_agent_rf_source_startofpacket),       //                .startofpacket
4005 
                .rf_source_endofpacket   (data_flag_rx_s1_agent_rf_source_endofpacket),         //                .endofpacket
4006 
                .rf_source_data          (data_flag_rx_s1_agent_rf_source_data),                //                .data
4007 
                .rdata_fifo_sink_ready   (avalon_st_adapter_003_out_0_ready),                   // rdata_fifo_sink.ready
4008 
                .rdata_fifo_sink_valid   (avalon_st_adapter_003_out_0_valid),                   //                .valid
4009 
                .rdata_fifo_sink_data    (avalon_st_adapter_003_out_0_data),                    //                .data
4010 
                .rdata_fifo_sink_error   (avalon_st_adapter_003_out_0_error),                   //                .error
4011 
                .rdata_fifo_src_ready    (data_flag_rx_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
4012 
                .rdata_fifo_src_valid    (data_flag_rx_s1_agent_rdata_fifo_src_valid),          //                .valid
4013 
                .rdata_fifo_src_data     (data_flag_rx_s1_agent_rdata_fifo_src_data),           //                .data
4014 
                .m0_response             (2'b00),                                               //     (terminated)
4015 
                .m0_writeresponsevalid   (1'b0)                                                 //     (terminated)
4016 
        );
4017 
 
4018 
        altera_avalon_sc_fifo #(
4019 
                .SYMBOLS_PER_BEAT    (1),
4020 
                .BITS_PER_SYMBOL     (130),
4021 
                .FIFO_DEPTH          (2),
4022 
                .CHANNEL_WIDTH       (0),
4023 
                .ERROR_WIDTH         (0),
4024 
                .USE_PACKETS         (1),
4025 
                .USE_FILL_LEVEL      (0),
4026 
                .EMPTY_LATENCY       (1),
4027 
                .USE_MEMORY_BLOCKS   (0),
4028 
                .USE_STORE_FORWARD   (0),
4029 
                .USE_ALMOST_FULL_IF  (0),
4030 
                .USE_ALMOST_EMPTY_IF (0)
4031 
        ) data_flag_rx_s1_agent_rsp_fifo (
4032 
                .clk               (clk_0_clk_clk),                                    //       clk.clk
4033 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),   // clk_reset.reset
4034 
                .in_data           (data_flag_rx_s1_agent_rf_source_data),             //        in.data
4035 
                .in_valid          (data_flag_rx_s1_agent_rf_source_valid),            //          .valid
4036 
                .in_ready          (data_flag_rx_s1_agent_rf_source_ready),            //          .ready
4037 
                .in_startofpacket  (data_flag_rx_s1_agent_rf_source_startofpacket),    //          .startofpacket
4038 
                .in_endofpacket    (data_flag_rx_s1_agent_rf_source_endofpacket),      //          .endofpacket
4039 
                .out_data          (data_flag_rx_s1_agent_rsp_fifo_out_data),          //       out.data
4040 
                .out_valid         (data_flag_rx_s1_agent_rsp_fifo_out_valid),         //          .valid
4041 
                .out_ready         (data_flag_rx_s1_agent_rsp_fifo_out_ready),         //          .ready
4042 
                .out_startofpacket (data_flag_rx_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
4043 
                .out_endofpacket   (data_flag_rx_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
4044 
                .csr_address       (2'b00),                                            // (terminated)
4045 
                .csr_read          (1'b0),                                             // (terminated)
4046 
                .csr_write         (1'b0),                                             // (terminated)
4047 
                .csr_readdata      (),                                                 // (terminated)
4048 
                .csr_writedata     (32'b00000000000000000000000000000000),             // (terminated)
4049 
                .almost_full_data  (),                                                 // (terminated)
4050 
                .almost_empty_data (),                                                 // (terminated)
4051 
                .in_empty          (1'b0),                                             // (terminated)
4052 
                .out_empty         (),                                                 // (terminated)
4053 
                .in_error          (1'b0),                                             // (terminated)
4054 
                .out_error         (),                                                 // (terminated)
4055 
                .in_channel        (1'b0),                                             // (terminated)
4056 
                .out_channel       ()                                                  // (terminated)
4057 
        );
4058 
 
4059 
        altera_avalon_sc_fifo #(
4060 
                .SYMBOLS_PER_BEAT    (1),
4061 
                .BITS_PER_SYMBOL     (34),
4062 
                .FIFO_DEPTH          (2),
4063 
                .CHANNEL_WIDTH       (0),
4064 
                .ERROR_WIDTH         (0),
4065 
                .USE_PACKETS         (0),
4066 
                .USE_FILL_LEVEL      (0),
4067 
                .EMPTY_LATENCY       (0),
4068 
                .USE_MEMORY_BLOCKS   (0),
4069 
                .USE_STORE_FORWARD   (0),
4070 
                .USE_ALMOST_FULL_IF  (0),
4071 
                .USE_ALMOST_EMPTY_IF (0)
4072 
        ) data_flag_rx_s1_agent_rdata_fifo (
4073 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
4074 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
4075 
                .in_data           (data_flag_rx_s1_agent_rdata_fifo_src_data),      //        in.data
4076 
                .in_valid          (data_flag_rx_s1_agent_rdata_fifo_src_valid),     //          .valid
4077 
                .in_ready          (data_flag_rx_s1_agent_rdata_fifo_src_ready),     //          .ready
4078 
                .out_data          (data_flag_rx_s1_agent_rdata_fifo_out_data),      //       out.data
4079 
                .out_valid         (data_flag_rx_s1_agent_rdata_fifo_out_valid),     //          .valid
4080 
                .out_ready         (data_flag_rx_s1_agent_rdata_fifo_out_ready),     //          .ready
4081 
                .csr_address       (2'b00),                                          // (terminated)
4082 
                .csr_read          (1'b0),                                           // (terminated)
4083 
                .csr_write         (1'b0),                                           // (terminated)
4084 
                .csr_readdata      (),                                               // (terminated)
4085 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
4086 
                .almost_full_data  (),                                               // (terminated)
4087 
                .almost_empty_data (),                                               // (terminated)
4088 
                .in_startofpacket  (1'b0),                                           // (terminated)
4089 
                .in_endofpacket    (1'b0),                                           // (terminated)
4090 
                .out_startofpacket (),                                               // (terminated)
4091 
                .out_endofpacket   (),                                               // (terminated)
4092 
                .in_empty          (1'b0),                                           // (terminated)
4093 
                .out_empty         (),                                               // (terminated)
4094 
                .in_error          (1'b0),                                           // (terminated)
4095 
                .out_error         (),                                               // (terminated)
4096 
                .in_channel        (1'b0),                                           // (terminated)
4097 
                .out_channel       ()                                                // (terminated)
4098 
        );
4099 
 
4100 
        altera_merlin_slave_agent #(
4101 
                .PKT_ORI_BURST_SIZE_H      (128),
4102 
                .PKT_ORI_BURST_SIZE_L      (126),
4103 
                .PKT_RESPONSE_STATUS_H     (125),
4104 
                .PKT_RESPONSE_STATUS_L     (124),
4105 
                .PKT_BURST_SIZE_H          (88),
4106 
                .PKT_BURST_SIZE_L          (86),
4107 
                .PKT_TRANS_LOCK            (70),
4108 
                .PKT_BEGIN_BURST           (93),
4109 
                .PKT_PROTECTION_H          (119),
4110 
                .PKT_PROTECTION_L          (117),
4111 
                .PKT_BURSTWRAP_H           (85),
4112 
                .PKT_BURSTWRAP_L           (79),
4113 
                .PKT_BYTE_CNT_H            (78),
4114 
                .PKT_BYTE_CNT_L            (72),
4115 
                .PKT_ADDR_H                (65),
4116 
                .PKT_ADDR_L                (36),
4117 
                .PKT_TRANS_COMPRESSED_READ (66),
4118 
                .PKT_TRANS_POSTED          (67),
4119 
                .PKT_TRANS_WRITE           (68),
4120 
                .PKT_TRANS_READ            (69),
4121 
                .PKT_DATA_H                (31),
4122 
                .PKT_DATA_L                (0),
4123 
                .PKT_BYTEEN_H              (35),
4124 
                .PKT_BYTEEN_L              (32),
4125 
                .PKT_SRC_ID_H              (99),
4126 
                .PKT_SRC_ID_L              (95),
4127 
                .PKT_DEST_ID_H             (104),
4128 
                .PKT_DEST_ID_L             (100),
4129 
                .PKT_SYMBOL_W              (8),
4130 
                .ST_CHANNEL_W              (22),
4131 
                .ST_DATA_W                 (129),
4132 
                .AVS_BURSTCOUNT_W          (3),
4133 
                .SUPPRESS_0_BYTEEN_CMD     (1),
4134 
                .PREVENT_FIFO_OVERFLOW     (1),
4135 
                .USE_READRESPONSE          (0),
4136 
                .USE_WRITERESPONSE         (0),
4137 
                .ECC_ENABLE                (0)
4138 
        ) data_read_en_rx_s1_agent (
4139 
                .clk                     (clk_0_clk_clk),                                          //             clk.clk
4140 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),         //       clk_reset.reset
4141 
                .m0_address              (data_read_en_rx_s1_agent_m0_address),                    //              m0.address
4142 
                .m0_burstcount           (data_read_en_rx_s1_agent_m0_burstcount),                 //                .burstcount
4143 
                .m0_byteenable           (data_read_en_rx_s1_agent_m0_byteenable),                 //                .byteenable
4144 
                .m0_debugaccess          (data_read_en_rx_s1_agent_m0_debugaccess),                //                .debugaccess
4145 
                .m0_lock                 (data_read_en_rx_s1_agent_m0_lock),                       //                .lock
4146 
                .m0_readdata             (data_read_en_rx_s1_agent_m0_readdata),                   //                .readdata
4147 
                .m0_readdatavalid        (data_read_en_rx_s1_agent_m0_readdatavalid),              //                .readdatavalid
4148 
                .m0_read                 (data_read_en_rx_s1_agent_m0_read),                       //                .read
4149 
                .m0_waitrequest          (data_read_en_rx_s1_agent_m0_waitrequest),                //                .waitrequest
4150 
                .m0_writedata            (data_read_en_rx_s1_agent_m0_writedata),                  //                .writedata
4151 
                .m0_write                (data_read_en_rx_s1_agent_m0_write),                      //                .write
4152 
                .rp_endofpacket          (data_read_en_rx_s1_agent_rp_endofpacket),                //              rp.endofpacket
4153 
                .rp_ready                (data_read_en_rx_s1_agent_rp_ready),                      //                .ready
4154 
                .rp_valid                (data_read_en_rx_s1_agent_rp_valid),                      //                .valid
4155 
                .rp_data                 (data_read_en_rx_s1_agent_rp_data),                       //                .data
4156 
                .rp_startofpacket        (data_read_en_rx_s1_agent_rp_startofpacket),              //                .startofpacket
4157 
                .cp_ready                (data_read_en_rx_s1_burst_adapter_source0_ready),         //              cp.ready
4158 
                .cp_valid                (data_read_en_rx_s1_burst_adapter_source0_valid),         //                .valid
4159 
                .cp_data                 (data_read_en_rx_s1_burst_adapter_source0_data),          //                .data
4160 
                .cp_startofpacket        (data_read_en_rx_s1_burst_adapter_source0_startofpacket), //                .startofpacket
4161 
                .cp_endofpacket          (data_read_en_rx_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
4162 
                .cp_channel              (data_read_en_rx_s1_burst_adapter_source0_channel),       //                .channel
4163 
                .rf_sink_ready           (data_read_en_rx_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
4164 
                .rf_sink_valid           (data_read_en_rx_s1_agent_rsp_fifo_out_valid),            //                .valid
4165 
                .rf_sink_startofpacket   (data_read_en_rx_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
4166 
                .rf_sink_endofpacket     (data_read_en_rx_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
4167 
                .rf_sink_data            (data_read_en_rx_s1_agent_rsp_fifo_out_data),             //                .data
4168 
                .rf_source_ready         (data_read_en_rx_s1_agent_rf_source_ready),               //       rf_source.ready
4169 
                .rf_source_valid         (data_read_en_rx_s1_agent_rf_source_valid),               //                .valid
4170 
                .rf_source_startofpacket (data_read_en_rx_s1_agent_rf_source_startofpacket),       //                .startofpacket
4171 
                .rf_source_endofpacket   (data_read_en_rx_s1_agent_rf_source_endofpacket),         //                .endofpacket
4172 
                .rf_source_data          (data_read_en_rx_s1_agent_rf_source_data),                //                .data
4173 
                .rdata_fifo_sink_ready   (avalon_st_adapter_004_out_0_ready),                      // rdata_fifo_sink.ready
4174 
                .rdata_fifo_sink_valid   (avalon_st_adapter_004_out_0_valid),                      //                .valid
4175 
                .rdata_fifo_sink_data    (avalon_st_adapter_004_out_0_data),                       //                .data
4176 
                .rdata_fifo_sink_error   (avalon_st_adapter_004_out_0_error),                      //                .error
4177 
                .rdata_fifo_src_ready    (data_read_en_rx_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
4178 
                .rdata_fifo_src_valid    (data_read_en_rx_s1_agent_rdata_fifo_src_valid),          //                .valid
4179 
                .rdata_fifo_src_data     (data_read_en_rx_s1_agent_rdata_fifo_src_data),           //                .data
4180 
                .m0_response             (2'b00),                                                  //     (terminated)
4181 
                .m0_writeresponsevalid   (1'b0)                                                    //     (terminated)
4182 
        );
4183 
 
4184 
        altera_avalon_sc_fifo #(
4185 
                .SYMBOLS_PER_BEAT    (1),
4186 
                .BITS_PER_SYMBOL     (130),
4187 
                .FIFO_DEPTH          (2),
4188 
                .CHANNEL_WIDTH       (0),
4189 
                .ERROR_WIDTH         (0),
4190 
                .USE_PACKETS         (1),
4191 
                .USE_FILL_LEVEL      (0),
4192 
                .EMPTY_LATENCY       (1),
4193 
                .USE_MEMORY_BLOCKS   (0),
4194 
                .USE_STORE_FORWARD   (0),
4195 
                .USE_ALMOST_FULL_IF  (0),
4196 
                .USE_ALMOST_EMPTY_IF (0)
4197 
        ) data_read_en_rx_s1_agent_rsp_fifo (
4198 
                .clk               (clk_0_clk_clk),                                       //       clk.clk
4199 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),      // clk_reset.reset
4200 
                .in_data           (data_read_en_rx_s1_agent_rf_source_data),             //        in.data
4201 
                .in_valid          (data_read_en_rx_s1_agent_rf_source_valid),            //          .valid
4202 
                .in_ready          (data_read_en_rx_s1_agent_rf_source_ready),            //          .ready
4203 
                .in_startofpacket  (data_read_en_rx_s1_agent_rf_source_startofpacket),    //          .startofpacket
4204 
                .in_endofpacket    (data_read_en_rx_s1_agent_rf_source_endofpacket),      //          .endofpacket
4205 
                .out_data          (data_read_en_rx_s1_agent_rsp_fifo_out_data),          //       out.data
4206 
                .out_valid         (data_read_en_rx_s1_agent_rsp_fifo_out_valid),         //          .valid
4207 
                .out_ready         (data_read_en_rx_s1_agent_rsp_fifo_out_ready),         //          .ready
4208 
                .out_startofpacket (data_read_en_rx_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
4209 
                .out_endofpacket   (data_read_en_rx_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
4210 
                .csr_address       (2'b00),                                               // (terminated)
4211 
                .csr_read          (1'b0),                                                // (terminated)
4212 
                .csr_write         (1'b0),                                                // (terminated)
4213 
                .csr_readdata      (),                                                    // (terminated)
4214 
                .csr_writedata     (32'b00000000000000000000000000000000),                // (terminated)
4215 
                .almost_full_data  (),                                                    // (terminated)
4216 
                .almost_empty_data (),                                                    // (terminated)
4217 
                .in_empty          (1'b0),                                                // (terminated)
4218 
                .out_empty         (),                                                    // (terminated)
4219 
                .in_error          (1'b0),                                                // (terminated)
4220 
                .out_error         (),                                                    // (terminated)
4221 
                .in_channel        (1'b0),                                                // (terminated)
4222 
                .out_channel       ()                                                     // (terminated)
4223 
        );
4224 
 
4225 
        altera_avalon_sc_fifo #(
4226 
                .SYMBOLS_PER_BEAT    (1),
4227 
                .BITS_PER_SYMBOL     (34),
4228 
                .FIFO_DEPTH          (2),
4229 
                .CHANNEL_WIDTH       (0),
4230 
                .ERROR_WIDTH         (0),
4231 
                .USE_PACKETS         (0),
4232 
                .USE_FILL_LEVEL      (0),
4233 
                .EMPTY_LATENCY       (0),
4234 
                .USE_MEMORY_BLOCKS   (0),
4235 
                .USE_STORE_FORWARD   (0),
4236 
                .USE_ALMOST_FULL_IF  (0),
4237 
                .USE_ALMOST_EMPTY_IF (0)
4238 
        ) data_read_en_rx_s1_agent_rdata_fifo (
4239 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
4240 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
4241 
                .in_data           (data_read_en_rx_s1_agent_rdata_fifo_src_data),   //        in.data
4242 
                .in_valid          (data_read_en_rx_s1_agent_rdata_fifo_src_valid),  //          .valid
4243 
                .in_ready          (data_read_en_rx_s1_agent_rdata_fifo_src_ready),  //          .ready
4244 
                .out_data          (data_read_en_rx_s1_agent_rdata_fifo_out_data),   //       out.data
4245 
                .out_valid         (data_read_en_rx_s1_agent_rdata_fifo_out_valid),  //          .valid
4246 
                .out_ready         (data_read_en_rx_s1_agent_rdata_fifo_out_ready),  //          .ready
4247 
                .csr_address       (2'b00),                                          // (terminated)
4248 
                .csr_read          (1'b0),                                           // (terminated)
4249 
                .csr_write         (1'b0),                                           // (terminated)
4250 
                .csr_readdata      (),                                               // (terminated)
4251 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
4252 
                .almost_full_data  (),                                               // (terminated)
4253 
                .almost_empty_data (),                                               // (terminated)
4254 
                .in_startofpacket  (1'b0),                                           // (terminated)
4255 
                .in_endofpacket    (1'b0),                                           // (terminated)
4256 
                .out_startofpacket (),                                               // (terminated)
4257 
                .out_endofpacket   (),                                               // (terminated)
4258 
                .in_empty          (1'b0),                                           // (terminated)
4259 
                .out_empty         (),                                               // (terminated)
4260 
                .in_error          (1'b0),                                           // (terminated)
4261 
                .out_error         (),                                               // (terminated)
4262 
                .in_channel        (1'b0),                                           // (terminated)
4263 
                .out_channel       ()                                                // (terminated)
4264 
        );
4265 
 
4266 
        altera_merlin_slave_agent #(
4267 
                .PKT_ORI_BURST_SIZE_H      (128),
4268 
                .PKT_ORI_BURST_SIZE_L      (126),
4269 
                .PKT_RESPONSE_STATUS_H     (125),
4270 
                .PKT_RESPONSE_STATUS_L     (124),
4271 
                .PKT_BURST_SIZE_H          (88),
4272 
                .PKT_BURST_SIZE_L          (86),
4273 
                .PKT_TRANS_LOCK            (70),
4274 
                .PKT_BEGIN_BURST           (93),
4275 
                .PKT_PROTECTION_H          (119),
4276 
                .PKT_PROTECTION_L          (117),
4277 
                .PKT_BURSTWRAP_H           (85),
4278 
                .PKT_BURSTWRAP_L           (79),
4279 
                .PKT_BYTE_CNT_H            (78),
4280 
                .PKT_BYTE_CNT_L            (72),
4281 
                .PKT_ADDR_H                (65),
4282 
                .PKT_ADDR_L                (36),
4283 
                .PKT_TRANS_COMPRESSED_READ (66),
4284 
                .PKT_TRANS_POSTED          (67),
4285 
                .PKT_TRANS_WRITE           (68),
4286 
                .PKT_TRANS_READ            (69),
4287 
                .PKT_DATA_H                (31),
4288 
                .PKT_DATA_L                (0),
4289 
                .PKT_BYTEEN_H              (35),
4290 
                .PKT_BYTEEN_L              (32),
4291 
                .PKT_SRC_ID_H              (99),
4292 
                .PKT_SRC_ID_L              (95),
4293 
                .PKT_DEST_ID_H             (104),
4294 
                .PKT_DEST_ID_L             (100),
4295 
                .PKT_SYMBOL_W              (8),
4296 
                .ST_CHANNEL_W              (22),
4297 
                .ST_DATA_W                 (129),
4298 
                .AVS_BURSTCOUNT_W          (3),
4299 
                .SUPPRESS_0_BYTEEN_CMD     (1),
4300 
                .PREVENT_FIFO_OVERFLOW     (1),
4301 
                .USE_READRESPONSE          (0),
4302 
                .USE_WRITERESPONSE         (0),
4303 
                .ECC_ENABLE                (0)
4304 
        ) fifo_full_rx_status_s1_agent (
4305 
                .clk                     (clk_0_clk_clk),                                              //             clk.clk
4306 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),             //       clk_reset.reset
4307 
                .m0_address              (fifo_full_rx_status_s1_agent_m0_address),                    //              m0.address
4308 
                .m0_burstcount           (fifo_full_rx_status_s1_agent_m0_burstcount),                 //                .burstcount
4309 
                .m0_byteenable           (fifo_full_rx_status_s1_agent_m0_byteenable),                 //                .byteenable
4310 
                .m0_debugaccess          (fifo_full_rx_status_s1_agent_m0_debugaccess),                //                .debugaccess
4311 
                .m0_lock                 (fifo_full_rx_status_s1_agent_m0_lock),                       //                .lock
4312 
                .m0_readdata             (fifo_full_rx_status_s1_agent_m0_readdata),                   //                .readdata
4313 
                .m0_readdatavalid        (fifo_full_rx_status_s1_agent_m0_readdatavalid),              //                .readdatavalid
4314 
                .m0_read                 (fifo_full_rx_status_s1_agent_m0_read),                       //                .read
4315 
                .m0_waitrequest          (fifo_full_rx_status_s1_agent_m0_waitrequest),                //                .waitrequest
4316 
                .m0_writedata            (fifo_full_rx_status_s1_agent_m0_writedata),                  //                .writedata
4317 
                .m0_write                (fifo_full_rx_status_s1_agent_m0_write),                      //                .write
4318 
                .rp_endofpacket          (fifo_full_rx_status_s1_agent_rp_endofpacket),                //              rp.endofpacket
4319 
                .rp_ready                (fifo_full_rx_status_s1_agent_rp_ready),                      //                .ready
4320 
                .rp_valid                (fifo_full_rx_status_s1_agent_rp_valid),                      //                .valid
4321 
                .rp_data                 (fifo_full_rx_status_s1_agent_rp_data),                       //                .data
4322 
                .rp_startofpacket        (fifo_full_rx_status_s1_agent_rp_startofpacket),              //                .startofpacket
4323 
                .cp_ready                (fifo_full_rx_status_s1_burst_adapter_source0_ready),         //              cp.ready
4324 
                .cp_valid                (fifo_full_rx_status_s1_burst_adapter_source0_valid),         //                .valid
4325 
                .cp_data                 (fifo_full_rx_status_s1_burst_adapter_source0_data),          //                .data
4326 
                .cp_startofpacket        (fifo_full_rx_status_s1_burst_adapter_source0_startofpacket), //                .startofpacket
4327 
                .cp_endofpacket          (fifo_full_rx_status_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
4328 
                .cp_channel              (fifo_full_rx_status_s1_burst_adapter_source0_channel),       //                .channel
4329 
                .rf_sink_ready           (fifo_full_rx_status_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
4330 
                .rf_sink_valid           (fifo_full_rx_status_s1_agent_rsp_fifo_out_valid),            //                .valid
4331 
                .rf_sink_startofpacket   (fifo_full_rx_status_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
4332 
                .rf_sink_endofpacket     (fifo_full_rx_status_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
4333 
                .rf_sink_data            (fifo_full_rx_status_s1_agent_rsp_fifo_out_data),             //                .data
4334 
                .rf_source_ready         (fifo_full_rx_status_s1_agent_rf_source_ready),               //       rf_source.ready
4335 
                .rf_source_valid         (fifo_full_rx_status_s1_agent_rf_source_valid),               //                .valid
4336 
                .rf_source_startofpacket (fifo_full_rx_status_s1_agent_rf_source_startofpacket),       //                .startofpacket
4337 
                .rf_source_endofpacket   (fifo_full_rx_status_s1_agent_rf_source_endofpacket),         //                .endofpacket
4338 
                .rf_source_data          (fifo_full_rx_status_s1_agent_rf_source_data),                //                .data
4339 
                .rdata_fifo_sink_ready   (avalon_st_adapter_005_out_0_ready),                          // rdata_fifo_sink.ready
4340 
                .rdata_fifo_sink_valid   (avalon_st_adapter_005_out_0_valid),                          //                .valid
4341 
                .rdata_fifo_sink_data    (avalon_st_adapter_005_out_0_data),                           //                .data
4342 
                .rdata_fifo_sink_error   (avalon_st_adapter_005_out_0_error),                          //                .error
4343 
                .rdata_fifo_src_ready    (fifo_full_rx_status_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
4344 
                .rdata_fifo_src_valid    (fifo_full_rx_status_s1_agent_rdata_fifo_src_valid),          //                .valid
4345 
                .rdata_fifo_src_data     (fifo_full_rx_status_s1_agent_rdata_fifo_src_data),           //                .data
4346 
                .m0_response             (2'b00),                                                      //     (terminated)
4347 
                .m0_writeresponsevalid   (1'b0)                                                        //     (terminated)
4348 
        );
4349 
 
4350 
        altera_avalon_sc_fifo #(
4351 
                .SYMBOLS_PER_BEAT    (1),
4352 
                .BITS_PER_SYMBOL     (130),
4353 
                .FIFO_DEPTH          (2),
4354 
                .CHANNEL_WIDTH       (0),
4355 
                .ERROR_WIDTH         (0),
4356 
                .USE_PACKETS         (1),
4357 
                .USE_FILL_LEVEL      (0),
4358 
                .EMPTY_LATENCY       (1),
4359 
                .USE_MEMORY_BLOCKS   (0),
4360 
                .USE_STORE_FORWARD   (0),
4361 
                .USE_ALMOST_FULL_IF  (0),
4362 
                .USE_ALMOST_EMPTY_IF (0)
4363 
        ) fifo_full_rx_status_s1_agent_rsp_fifo (
4364 
                .clk               (clk_0_clk_clk),                                           //       clk.clk
4365 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),          // clk_reset.reset
4366 
                .in_data           (fifo_full_rx_status_s1_agent_rf_source_data),             //        in.data
4367 
                .in_valid          (fifo_full_rx_status_s1_agent_rf_source_valid),            //          .valid
4368 
                .in_ready          (fifo_full_rx_status_s1_agent_rf_source_ready),            //          .ready
4369 
                .in_startofpacket  (fifo_full_rx_status_s1_agent_rf_source_startofpacket),    //          .startofpacket
4370 
                .in_endofpacket    (fifo_full_rx_status_s1_agent_rf_source_endofpacket),      //          .endofpacket
4371 
                .out_data          (fifo_full_rx_status_s1_agent_rsp_fifo_out_data),          //       out.data
4372 
                .out_valid         (fifo_full_rx_status_s1_agent_rsp_fifo_out_valid),         //          .valid
4373 
                .out_ready         (fifo_full_rx_status_s1_agent_rsp_fifo_out_ready),         //          .ready
4374 
                .out_startofpacket (fifo_full_rx_status_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
4375 
                .out_endofpacket   (fifo_full_rx_status_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
4376 
                .csr_address       (2'b00),                                                   // (terminated)
4377 
                .csr_read          (1'b0),                                                    // (terminated)
4378 
                .csr_write         (1'b0),                                                    // (terminated)
4379 
                .csr_readdata      (),                                                        // (terminated)
4380 
                .csr_writedata     (32'b00000000000000000000000000000000),                    // (terminated)
4381 
                .almost_full_data  (),                                                        // (terminated)
4382 
                .almost_empty_data (),                                                        // (terminated)
4383 
                .in_empty          (1'b0),                                                    // (terminated)
4384 
                .out_empty         (),                                                        // (terminated)
4385 
                .in_error          (1'b0),                                                    // (terminated)
4386 
                .out_error         (),                                                        // (terminated)
4387 
                .in_channel        (1'b0),                                                    // (terminated)
4388 
                .out_channel       ()                                                         // (terminated)
4389 
        );
4390 
 
4391 
        altera_avalon_sc_fifo #(
4392 
                .SYMBOLS_PER_BEAT    (1),
4393 
                .BITS_PER_SYMBOL     (34),
4394 
                .FIFO_DEPTH          (2),
4395 
                .CHANNEL_WIDTH       (0),
4396 
                .ERROR_WIDTH         (0),
4397 
                .USE_PACKETS         (0),
4398 
                .USE_FILL_LEVEL      (0),
4399 
                .EMPTY_LATENCY       (0),
4400 
                .USE_MEMORY_BLOCKS   (0),
4401 
                .USE_STORE_FORWARD   (0),
4402 
                .USE_ALMOST_FULL_IF  (0),
4403 
                .USE_ALMOST_EMPTY_IF (0)
4404 
        ) fifo_full_rx_status_s1_agent_rdata_fifo (
4405 
                .clk               (clk_0_clk_clk),                                     //       clk.clk
4406 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),    // clk_reset.reset
4407 
                .in_data           (fifo_full_rx_status_s1_agent_rdata_fifo_src_data),  //        in.data
4408 
                .in_valid          (fifo_full_rx_status_s1_agent_rdata_fifo_src_valid), //          .valid
4409 
                .in_ready          (fifo_full_rx_status_s1_agent_rdata_fifo_src_ready), //          .ready
4410 
                .out_data          (fifo_full_rx_status_s1_agent_rdata_fifo_out_data),  //       out.data
4411 
                .out_valid         (fifo_full_rx_status_s1_agent_rdata_fifo_out_valid), //          .valid
4412 
                .out_ready         (fifo_full_rx_status_s1_agent_rdata_fifo_out_ready), //          .ready
4413 
                .csr_address       (2'b00),                                             // (terminated)
4414 
                .csr_read          (1'b0),                                              // (terminated)
4415 
                .csr_write         (1'b0),                                              // (terminated)
4416 
                .csr_readdata      (),                                                  // (terminated)
4417 
                .csr_writedata     (32'b00000000000000000000000000000000),              // (terminated)
4418 
                .almost_full_data  (),                                                  // (terminated)
4419 
                .almost_empty_data (),                                                  // (terminated)
4420 
                .in_startofpacket  (1'b0),                                              // (terminated)
4421 
                .in_endofpacket    (1'b0),                                              // (terminated)
4422 
                .out_startofpacket (),                                                  // (terminated)
4423 
                .out_endofpacket   (),                                                  // (terminated)
4424 
                .in_empty          (1'b0),                                              // (terminated)
4425 
                .out_empty         (),                                                  // (terminated)
4426 
                .in_error          (1'b0),                                              // (terminated)
4427 
                .out_error         (),                                                  // (terminated)
4428 
                .in_channel        (1'b0),                                              // (terminated)
4429 
                .out_channel       ()                                                   // (terminated)
4430 
        );
4431 
 
4432 
        altera_merlin_slave_agent #(
4433 
                .PKT_ORI_BURST_SIZE_H      (128),
4434 
                .PKT_ORI_BURST_SIZE_L      (126),
4435 
                .PKT_RESPONSE_STATUS_H     (125),
4436 
                .PKT_RESPONSE_STATUS_L     (124),
4437 
                .PKT_BURST_SIZE_H          (88),
4438 
                .PKT_BURST_SIZE_L          (86),
4439 
                .PKT_TRANS_LOCK            (70),
4440 
                .PKT_BEGIN_BURST           (93),
4441 
                .PKT_PROTECTION_H          (119),
4442 
                .PKT_PROTECTION_L          (117),
4443 
                .PKT_BURSTWRAP_H           (85),
4444 
                .PKT_BURSTWRAP_L           (79),
4445 
                .PKT_BYTE_CNT_H            (78),
4446 
                .PKT_BYTE_CNT_L            (72),
4447 
                .PKT_ADDR_H                (65),
4448 
                .PKT_ADDR_L                (36),
4449 
                .PKT_TRANS_COMPRESSED_READ (66),
4450 
                .PKT_TRANS_POSTED          (67),
4451 
                .PKT_TRANS_WRITE           (68),
4452 
                .PKT_TRANS_READ            (69),
4453 
                .PKT_DATA_H                (31),
4454 
                .PKT_DATA_L                (0),
4455 
                .PKT_BYTEEN_H              (35),
4456 
                .PKT_BYTEEN_L              (32),
4457 
                .PKT_SRC_ID_H              (99),
4458 
                .PKT_SRC_ID_L              (95),
4459 
                .PKT_DEST_ID_H             (104),
4460 
                .PKT_DEST_ID_L             (100),
4461 
                .PKT_SYMBOL_W              (8),
4462 
                .ST_CHANNEL_W              (22),
4463 
                .ST_DATA_W                 (129),
4464 
                .AVS_BURSTCOUNT_W          (3),
4465 
                .SUPPRESS_0_BYTEEN_CMD     (1),
4466 
                .PREVENT_FIFO_OVERFLOW     (1),
4467 
                .USE_READRESPONSE          (0),
4468 
                .USE_WRITERESPONSE         (0),
4469 
                .ECC_ENABLE                (0)
4470 
        ) fifo_empty_rx_status_s1_agent (
4471 
                .clk                     (clk_0_clk_clk),                                               //             clk.clk
4472 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),              //       clk_reset.reset
4473 
                .m0_address              (fifo_empty_rx_status_s1_agent_m0_address),                    //              m0.address
4474 
                .m0_burstcount           (fifo_empty_rx_status_s1_agent_m0_burstcount),                 //                .burstcount
4475 
                .m0_byteenable           (fifo_empty_rx_status_s1_agent_m0_byteenable),                 //                .byteenable
4476 
                .m0_debugaccess          (fifo_empty_rx_status_s1_agent_m0_debugaccess),                //                .debugaccess
4477 
                .m0_lock                 (fifo_empty_rx_status_s1_agent_m0_lock),                       //                .lock
4478 
                .m0_readdata             (fifo_empty_rx_status_s1_agent_m0_readdata),                   //                .readdata
4479 
                .m0_readdatavalid        (fifo_empty_rx_status_s1_agent_m0_readdatavalid),              //                .readdatavalid
4480 
                .m0_read                 (fifo_empty_rx_status_s1_agent_m0_read),                       //                .read
4481 
                .m0_waitrequest          (fifo_empty_rx_status_s1_agent_m0_waitrequest),                //                .waitrequest
4482 
                .m0_writedata            (fifo_empty_rx_status_s1_agent_m0_writedata),                  //                .writedata
4483 
                .m0_write                (fifo_empty_rx_status_s1_agent_m0_write),                      //                .write
4484 
                .rp_endofpacket          (fifo_empty_rx_status_s1_agent_rp_endofpacket),                //              rp.endofpacket
4485 
                .rp_ready                (fifo_empty_rx_status_s1_agent_rp_ready),                      //                .ready
4486 
                .rp_valid                (fifo_empty_rx_status_s1_agent_rp_valid),                      //                .valid
4487 
                .rp_data                 (fifo_empty_rx_status_s1_agent_rp_data),                       //                .data
4488 
                .rp_startofpacket        (fifo_empty_rx_status_s1_agent_rp_startofpacket),              //                .startofpacket
4489 
                .cp_ready                (fifo_empty_rx_status_s1_burst_adapter_source0_ready),         //              cp.ready
4490 
                .cp_valid                (fifo_empty_rx_status_s1_burst_adapter_source0_valid),         //                .valid
4491 
                .cp_data                 (fifo_empty_rx_status_s1_burst_adapter_source0_data),          //                .data
4492 
                .cp_startofpacket        (fifo_empty_rx_status_s1_burst_adapter_source0_startofpacket), //                .startofpacket
4493 
                .cp_endofpacket          (fifo_empty_rx_status_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
4494 
                .cp_channel              (fifo_empty_rx_status_s1_burst_adapter_source0_channel),       //                .channel
4495 
                .rf_sink_ready           (fifo_empty_rx_status_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
4496 
                .rf_sink_valid           (fifo_empty_rx_status_s1_agent_rsp_fifo_out_valid),            //                .valid
4497 
                .rf_sink_startofpacket   (fifo_empty_rx_status_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
4498 
                .rf_sink_endofpacket     (fifo_empty_rx_status_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
4499 
                .rf_sink_data            (fifo_empty_rx_status_s1_agent_rsp_fifo_out_data),             //                .data
4500 
                .rf_source_ready         (fifo_empty_rx_status_s1_agent_rf_source_ready),               //       rf_source.ready
4501 
                .rf_source_valid         (fifo_empty_rx_status_s1_agent_rf_source_valid),               //                .valid
4502 
                .rf_source_startofpacket (fifo_empty_rx_status_s1_agent_rf_source_startofpacket),       //                .startofpacket
4503 
                .rf_source_endofpacket   (fifo_empty_rx_status_s1_agent_rf_source_endofpacket),         //                .endofpacket
4504 
                .rf_source_data          (fifo_empty_rx_status_s1_agent_rf_source_data),                //                .data
4505 
                .rdata_fifo_sink_ready   (avalon_st_adapter_006_out_0_ready),                           // rdata_fifo_sink.ready
4506 
                .rdata_fifo_sink_valid   (avalon_st_adapter_006_out_0_valid),                           //                .valid
4507 
                .rdata_fifo_sink_data    (avalon_st_adapter_006_out_0_data),                            //                .data
4508 
                .rdata_fifo_sink_error   (avalon_st_adapter_006_out_0_error),                           //                .error
4509 
                .rdata_fifo_src_ready    (fifo_empty_rx_status_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
4510 
                .rdata_fifo_src_valid    (fifo_empty_rx_status_s1_agent_rdata_fifo_src_valid),          //                .valid
4511 
                .rdata_fifo_src_data     (fifo_empty_rx_status_s1_agent_rdata_fifo_src_data),           //                .data
4512 
                .m0_response             (2'b00),                                                       //     (terminated)
4513 
                .m0_writeresponsevalid   (1'b0)                                                         //     (terminated)
4514 
        );
4515 
 
4516 
        altera_avalon_sc_fifo #(
4517 
                .SYMBOLS_PER_BEAT    (1),
4518 
                .BITS_PER_SYMBOL     (130),
4519 
                .FIFO_DEPTH          (2),
4520 
                .CHANNEL_WIDTH       (0),
4521 
                .ERROR_WIDTH         (0),
4522 
                .USE_PACKETS         (1),
4523 
                .USE_FILL_LEVEL      (0),
4524 
                .EMPTY_LATENCY       (1),
4525 
                .USE_MEMORY_BLOCKS   (0),
4526 
                .USE_STORE_FORWARD   (0),
4527 
                .USE_ALMOST_FULL_IF  (0),
4528 
                .USE_ALMOST_EMPTY_IF (0)
4529 
        ) fifo_empty_rx_status_s1_agent_rsp_fifo (
4530 
                .clk               (clk_0_clk_clk),                                            //       clk.clk
4531 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),           // clk_reset.reset
4532 
                .in_data           (fifo_empty_rx_status_s1_agent_rf_source_data),             //        in.data
4533 
                .in_valid          (fifo_empty_rx_status_s1_agent_rf_source_valid),            //          .valid
4534 
                .in_ready          (fifo_empty_rx_status_s1_agent_rf_source_ready),            //          .ready
4535 
                .in_startofpacket  (fifo_empty_rx_status_s1_agent_rf_source_startofpacket),    //          .startofpacket
4536 
                .in_endofpacket    (fifo_empty_rx_status_s1_agent_rf_source_endofpacket),      //          .endofpacket
4537 
                .out_data          (fifo_empty_rx_status_s1_agent_rsp_fifo_out_data),          //       out.data
4538 
                .out_valid         (fifo_empty_rx_status_s1_agent_rsp_fifo_out_valid),         //          .valid
4539 
                .out_ready         (fifo_empty_rx_status_s1_agent_rsp_fifo_out_ready),         //          .ready
4540 
                .out_startofpacket (fifo_empty_rx_status_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
4541 
                .out_endofpacket   (fifo_empty_rx_status_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
4542 
                .csr_address       (2'b00),                                                    // (terminated)
4543 
                .csr_read          (1'b0),                                                     // (terminated)
4544 
                .csr_write         (1'b0),                                                     // (terminated)
4545 
                .csr_readdata      (),                                                         // (terminated)
4546 
                .csr_writedata     (32'b00000000000000000000000000000000),                     // (terminated)
4547 
                .almost_full_data  (),                                                         // (terminated)
4548 
                .almost_empty_data (),                                                         // (terminated)
4549 
                .in_empty          (1'b0),                                                     // (terminated)
4550 
                .out_empty         (),                                                         // (terminated)
4551 
                .in_error          (1'b0),                                                     // (terminated)
4552 
                .out_error         (),                                                         // (terminated)
4553 
                .in_channel        (1'b0),                                                     // (terminated)
4554 
                .out_channel       ()                                                          // (terminated)
4555 
        );
4556 
 
4557 
        altera_avalon_sc_fifo #(
4558 
                .SYMBOLS_PER_BEAT    (1),
4559 
                .BITS_PER_SYMBOL     (34),
4560 
                .FIFO_DEPTH          (2),
4561 
                .CHANNEL_WIDTH       (0),
4562 
                .ERROR_WIDTH         (0),
4563 
                .USE_PACKETS         (0),
4564 
                .USE_FILL_LEVEL      (0),
4565 
                .EMPTY_LATENCY       (0),
4566 
                .USE_MEMORY_BLOCKS   (0),
4567 
                .USE_STORE_FORWARD   (0),
4568 
                .USE_ALMOST_FULL_IF  (0),
4569 
                .USE_ALMOST_EMPTY_IF (0)
4570 
        ) fifo_empty_rx_status_s1_agent_rdata_fifo (
4571 
                .clk               (clk_0_clk_clk),                                      //       clk.clk
4572 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),     // clk_reset.reset
4573 
                .in_data           (fifo_empty_rx_status_s1_agent_rdata_fifo_src_data),  //        in.data
4574 
                .in_valid          (fifo_empty_rx_status_s1_agent_rdata_fifo_src_valid), //          .valid
4575 
                .in_ready          (fifo_empty_rx_status_s1_agent_rdata_fifo_src_ready), //          .ready
4576 
                .out_data          (fifo_empty_rx_status_s1_agent_rdata_fifo_out_data),  //       out.data
4577 
                .out_valid         (fifo_empty_rx_status_s1_agent_rdata_fifo_out_valid), //          .valid
4578 
                .out_ready         (fifo_empty_rx_status_s1_agent_rdata_fifo_out_ready), //          .ready
4579 
                .csr_address       (2'b00),                                              // (terminated)
4580 
                .csr_read          (1'b0),                                               // (terminated)
4581 
                .csr_write         (1'b0),                                               // (terminated)
4582 
                .csr_readdata      (),                                                   // (terminated)
4583 
                .csr_writedata     (32'b00000000000000000000000000000000),               // (terminated)
4584 
                .almost_full_data  (),                                                   // (terminated)
4585 
                .almost_empty_data (),                                                   // (terminated)
4586 
                .in_startofpacket  (1'b0),                                               // (terminated)
4587 
                .in_endofpacket    (1'b0),                                               // (terminated)
4588 
                .out_startofpacket (),                                                   // (terminated)
4589 
                .out_endofpacket   (),                                                   // (terminated)
4590 
                .in_empty          (1'b0),                                               // (terminated)
4591 
                .out_empty         (),                                                   // (terminated)
4592 
                .in_error          (1'b0),                                               // (terminated)
4593 
                .out_error         (),                                                   // (terminated)
4594 
                .in_channel        (1'b0),                                               // (terminated)
4595 
                .out_channel       ()                                                    // (terminated)
4596 
        );
4597 
 
4598 
        altera_merlin_slave_agent #(
4599 
                .PKT_ORI_BURST_SIZE_H      (128),
4600 
                .PKT_ORI_BURST_SIZE_L      (126),
4601 
                .PKT_RESPONSE_STATUS_H     (125),
4602 
                .PKT_RESPONSE_STATUS_L     (124),
4603 
                .PKT_BURST_SIZE_H          (88),
4604 
                .PKT_BURST_SIZE_L          (86),
4605 
                .PKT_TRANS_LOCK            (70),
4606 
                .PKT_BEGIN_BURST           (93),
4607 
                .PKT_PROTECTION_H          (119),
4608 
                .PKT_PROTECTION_L          (117),
4609 
                .PKT_BURSTWRAP_H           (85),
4610 
                .PKT_BURSTWRAP_L           (79),
4611 
                .PKT_BYTE_CNT_H            (78),
4612 
                .PKT_BYTE_CNT_L            (72),
4613 
                .PKT_ADDR_H                (65),
4614 
                .PKT_ADDR_L                (36),
4615 
                .PKT_TRANS_COMPRESSED_READ (66),
4616 
                .PKT_TRANS_POSTED          (67),
4617 
                .PKT_TRANS_WRITE           (68),
4618 
                .PKT_TRANS_READ            (69),
4619 
                .PKT_DATA_H                (31),
4620 
                .PKT_DATA_L                (0),
4621 
                .PKT_BYTEEN_H              (35),
4622 
                .PKT_BYTEEN_L              (32),
4623 
                .PKT_SRC_ID_H              (99),
4624 
                .PKT_SRC_ID_L              (95),
4625 
                .PKT_DEST_ID_H             (104),
4626 
                .PKT_DEST_ID_L             (100),
4627 
                .PKT_SYMBOL_W              (8),
4628 
                .ST_CHANNEL_W              (22),
4629 
                .ST_DATA_W                 (129),
4630 
                .AVS_BURSTCOUNT_W          (3),
4631 
                .SUPPRESS_0_BYTEEN_CMD     (1),
4632 
                .PREVENT_FIFO_OVERFLOW     (1),
4633 
                .USE_READRESPONSE          (0),
4634 
                .USE_WRITERESPONSE         (0),
4635 
                .ECC_ENABLE                (0)
4636 
        ) link_start_s1_agent (
4637 
                .clk                     (clk_0_clk_clk),                                     //             clk.clk
4638 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),    //       clk_reset.reset
4639 
                .m0_address              (link_start_s1_agent_m0_address),                    //              m0.address
4640 
                .m0_burstcount           (link_start_s1_agent_m0_burstcount),                 //                .burstcount
4641 
                .m0_byteenable           (link_start_s1_agent_m0_byteenable),                 //                .byteenable
4642 
                .m0_debugaccess          (link_start_s1_agent_m0_debugaccess),                //                .debugaccess
4643 
                .m0_lock                 (link_start_s1_agent_m0_lock),                       //                .lock
4644 
                .m0_readdata             (link_start_s1_agent_m0_readdata),                   //                .readdata
4645 
                .m0_readdatavalid        (link_start_s1_agent_m0_readdatavalid),              //                .readdatavalid
4646 
                .m0_read                 (link_start_s1_agent_m0_read),                       //                .read
4647 
                .m0_waitrequest          (link_start_s1_agent_m0_waitrequest),                //                .waitrequest
4648 
                .m0_writedata            (link_start_s1_agent_m0_writedata),                  //                .writedata
4649 
                .m0_write                (link_start_s1_agent_m0_write),                      //                .write
4650 
                .rp_endofpacket          (link_start_s1_agent_rp_endofpacket),                //              rp.endofpacket
4651 
                .rp_ready                (link_start_s1_agent_rp_ready),                      //                .ready
4652 
                .rp_valid                (link_start_s1_agent_rp_valid),                      //                .valid
4653 
                .rp_data                 (link_start_s1_agent_rp_data),                       //                .data
4654 
                .rp_startofpacket        (link_start_s1_agent_rp_startofpacket),              //                .startofpacket
4655 
                .cp_ready                (link_start_s1_burst_adapter_source0_ready),         //              cp.ready
4656 
                .cp_valid                (link_start_s1_burst_adapter_source0_valid),         //                .valid
4657 
                .cp_data                 (link_start_s1_burst_adapter_source0_data),          //                .data
4658 
                .cp_startofpacket        (link_start_s1_burst_adapter_source0_startofpacket), //                .startofpacket
4659 
                .cp_endofpacket          (link_start_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
4660 
                .cp_channel              (link_start_s1_burst_adapter_source0_channel),       //                .channel
4661 
                .rf_sink_ready           (link_start_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
4662 
                .rf_sink_valid           (link_start_s1_agent_rsp_fifo_out_valid),            //                .valid
4663 
                .rf_sink_startofpacket   (link_start_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
4664 
                .rf_sink_endofpacket     (link_start_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
4665 
                .rf_sink_data            (link_start_s1_agent_rsp_fifo_out_data),             //                .data
4666 
                .rf_source_ready         (link_start_s1_agent_rf_source_ready),               //       rf_source.ready
4667 
                .rf_source_valid         (link_start_s1_agent_rf_source_valid),               //                .valid
4668 
                .rf_source_startofpacket (link_start_s1_agent_rf_source_startofpacket),       //                .startofpacket
4669 
                .rf_source_endofpacket   (link_start_s1_agent_rf_source_endofpacket),         //                .endofpacket
4670 
                .rf_source_data          (link_start_s1_agent_rf_source_data),                //                .data
4671 
                .rdata_fifo_sink_ready   (avalon_st_adapter_007_out_0_ready),                 // rdata_fifo_sink.ready
4672 
                .rdata_fifo_sink_valid   (avalon_st_adapter_007_out_0_valid),                 //                .valid
4673 
                .rdata_fifo_sink_data    (avalon_st_adapter_007_out_0_data),                  //                .data
4674 
                .rdata_fifo_sink_error   (avalon_st_adapter_007_out_0_error),                 //                .error
4675 
                .rdata_fifo_src_ready    (link_start_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
4676 
                .rdata_fifo_src_valid    (link_start_s1_agent_rdata_fifo_src_valid),          //                .valid
4677 
                .rdata_fifo_src_data     (link_start_s1_agent_rdata_fifo_src_data),           //                .data
4678 
                .m0_response             (2'b00),                                             //     (terminated)
4679 
                .m0_writeresponsevalid   (1'b0)                                               //     (terminated)
4680 
        );
4681 
 
4682 
        altera_avalon_sc_fifo #(
4683 
                .SYMBOLS_PER_BEAT    (1),
4684 
                .BITS_PER_SYMBOL     (130),
4685 
                .FIFO_DEPTH          (2),
4686 
                .CHANNEL_WIDTH       (0),
4687 
                .ERROR_WIDTH         (0),
4688 
                .USE_PACKETS         (1),
4689 
                .USE_FILL_LEVEL      (0),
4690 
                .EMPTY_LATENCY       (1),
4691 
                .USE_MEMORY_BLOCKS   (0),
4692 
                .USE_STORE_FORWARD   (0),
4693 
                .USE_ALMOST_FULL_IF  (0),
4694 
                .USE_ALMOST_EMPTY_IF (0)
4695 
        ) link_start_s1_agent_rsp_fifo (
4696 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
4697 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
4698 
                .in_data           (link_start_s1_agent_rf_source_data),             //        in.data
4699 
                .in_valid          (link_start_s1_agent_rf_source_valid),            //          .valid
4700 
                .in_ready          (link_start_s1_agent_rf_source_ready),            //          .ready
4701 
                .in_startofpacket  (link_start_s1_agent_rf_source_startofpacket),    //          .startofpacket
4702 
                .in_endofpacket    (link_start_s1_agent_rf_source_endofpacket),      //          .endofpacket
4703 
                .out_data          (link_start_s1_agent_rsp_fifo_out_data),          //       out.data
4704 
                .out_valid         (link_start_s1_agent_rsp_fifo_out_valid),         //          .valid
4705 
                .out_ready         (link_start_s1_agent_rsp_fifo_out_ready),         //          .ready
4706 
                .out_startofpacket (link_start_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
4707 
                .out_endofpacket   (link_start_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
4708 
                .csr_address       (2'b00),                                          // (terminated)
4709 
                .csr_read          (1'b0),                                           // (terminated)
4710 
                .csr_write         (1'b0),                                           // (terminated)
4711 
                .csr_readdata      (),                                               // (terminated)
4712 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
4713 
                .almost_full_data  (),                                               // (terminated)
4714 
                .almost_empty_data (),                                               // (terminated)
4715 
                .in_empty          (1'b0),                                           // (terminated)
4716 
                .out_empty         (),                                               // (terminated)
4717 
                .in_error          (1'b0),                                           // (terminated)
4718 
                .out_error         (),                                               // (terminated)
4719 
                .in_channel        (1'b0),                                           // (terminated)
4720 
                .out_channel       ()                                                // (terminated)
4721 
        );
4722 
 
4723 
        altera_avalon_sc_fifo #(
4724 
                .SYMBOLS_PER_BEAT    (1),
4725 
                .BITS_PER_SYMBOL     (34),
4726 
                .FIFO_DEPTH          (2),
4727 
                .CHANNEL_WIDTH       (0),
4728 
                .ERROR_WIDTH         (0),
4729 
                .USE_PACKETS         (0),
4730 
                .USE_FILL_LEVEL      (0),
4731 
                .EMPTY_LATENCY       (0),
4732 
                .USE_MEMORY_BLOCKS   (0),
4733 
                .USE_STORE_FORWARD   (0),
4734 
                .USE_ALMOST_FULL_IF  (0),
4735 
                .USE_ALMOST_EMPTY_IF (0)
4736 
        ) link_start_s1_agent_rdata_fifo (
4737 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
4738 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
4739 
                .in_data           (link_start_s1_agent_rdata_fifo_src_data),        //        in.data
4740 
                .in_valid          (link_start_s1_agent_rdata_fifo_src_valid),       //          .valid
4741 
                .in_ready          (link_start_s1_agent_rdata_fifo_src_ready),       //          .ready
4742 
                .out_data          (link_start_s1_agent_rdata_fifo_out_data),        //       out.data
4743 
                .out_valid         (link_start_s1_agent_rdata_fifo_out_valid),       //          .valid
4744 
                .out_ready         (link_start_s1_agent_rdata_fifo_out_ready),       //          .ready
4745 
                .csr_address       (2'b00),                                          // (terminated)
4746 
                .csr_read          (1'b0),                                           // (terminated)
4747 
                .csr_write         (1'b0),                                           // (terminated)
4748 
                .csr_readdata      (),                                               // (terminated)
4749 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
4750 
                .almost_full_data  (),                                               // (terminated)
4751 
                .almost_empty_data (),                                               // (terminated)
4752 
                .in_startofpacket  (1'b0),                                           // (terminated)
4753 
                .in_endofpacket    (1'b0),                                           // (terminated)
4754 
                .out_startofpacket (),                                               // (terminated)
4755 
                .out_endofpacket   (),                                               // (terminated)
4756 
                .in_empty          (1'b0),                                           // (terminated)
4757 
                .out_empty         (),                                               // (terminated)
4758 
                .in_error          (1'b0),                                           // (terminated)
4759 
                .out_error         (),                                               // (terminated)
4760 
                .in_channel        (1'b0),                                           // (terminated)
4761 
                .out_channel       ()                                                // (terminated)
4762 
        );
4763 
 
4764 
        altera_merlin_slave_agent #(
4765 
                .PKT_ORI_BURST_SIZE_H      (128),
4766 
                .PKT_ORI_BURST_SIZE_L      (126),
4767 
                .PKT_RESPONSE_STATUS_H     (125),
4768 
                .PKT_RESPONSE_STATUS_L     (124),
4769 
                .PKT_BURST_SIZE_H          (88),
4770 
                .PKT_BURST_SIZE_L          (86),
4771 
                .PKT_TRANS_LOCK            (70),
4772 
                .PKT_BEGIN_BURST           (93),
4773 
                .PKT_PROTECTION_H          (119),
4774 
                .PKT_PROTECTION_L          (117),
4775 
                .PKT_BURSTWRAP_H           (85),
4776 
                .PKT_BURSTWRAP_L           (79),
4777 
                .PKT_BYTE_CNT_H            (78),
4778 
                .PKT_BYTE_CNT_L            (72),
4779 
                .PKT_ADDR_H                (65),
4780 
                .PKT_ADDR_L                (36),
4781 
                .PKT_TRANS_COMPRESSED_READ (66),
4782 
                .PKT_TRANS_POSTED          (67),
4783 
                .PKT_TRANS_WRITE           (68),
4784 
                .PKT_TRANS_READ            (69),
4785 
                .PKT_DATA_H                (31),
4786 
                .PKT_DATA_L                (0),
4787 
                .PKT_BYTEEN_H              (35),
4788 
                .PKT_BYTEEN_L              (32),
4789 
                .PKT_SRC_ID_H              (99),
4790 
                .PKT_SRC_ID_L              (95),
4791 
                .PKT_DEST_ID_H             (104),
4792 
                .PKT_DEST_ID_L             (100),
4793 
                .PKT_SYMBOL_W              (8),
4794 
                .ST_CHANNEL_W              (22),
4795 
                .ST_DATA_W                 (129),
4796 
                .AVS_BURSTCOUNT_W          (3),
4797 
                .SUPPRESS_0_BYTEEN_CMD     (1),
4798 
                .PREVENT_FIFO_OVERFLOW     (1),
4799 
                .USE_READRESPONSE          (0),
4800 
                .USE_WRITERESPONSE         (0),
4801 
                .ECC_ENABLE                (0)
4802 
        ) auto_start_s1_agent (
4803 
                .clk                     (clk_0_clk_clk),                                     //             clk.clk
4804 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),    //       clk_reset.reset
4805 
                .m0_address              (auto_start_s1_agent_m0_address),                    //              m0.address
4806 
                .m0_burstcount           (auto_start_s1_agent_m0_burstcount),                 //                .burstcount
4807 
                .m0_byteenable           (auto_start_s1_agent_m0_byteenable),                 //                .byteenable
4808 
                .m0_debugaccess          (auto_start_s1_agent_m0_debugaccess),                //                .debugaccess
4809 
                .m0_lock                 (auto_start_s1_agent_m0_lock),                       //                .lock
4810 
                .m0_readdata             (auto_start_s1_agent_m0_readdata),                   //                .readdata
4811 
                .m0_readdatavalid        (auto_start_s1_agent_m0_readdatavalid),              //                .readdatavalid
4812 
                .m0_read                 (auto_start_s1_agent_m0_read),                       //                .read
4813 
                .m0_waitrequest          (auto_start_s1_agent_m0_waitrequest),                //                .waitrequest
4814 
                .m0_writedata            (auto_start_s1_agent_m0_writedata),                  //                .writedata
4815 
                .m0_write                (auto_start_s1_agent_m0_write),                      //                .write
4816 
                .rp_endofpacket          (auto_start_s1_agent_rp_endofpacket),                //              rp.endofpacket
4817 
                .rp_ready                (auto_start_s1_agent_rp_ready),                      //                .ready
4818 
                .rp_valid                (auto_start_s1_agent_rp_valid),                      //                .valid
4819 
                .rp_data                 (auto_start_s1_agent_rp_data),                       //                .data
4820 
                .rp_startofpacket        (auto_start_s1_agent_rp_startofpacket),              //                .startofpacket
4821 
                .cp_ready                (auto_start_s1_burst_adapter_source0_ready),         //              cp.ready
4822 
                .cp_valid                (auto_start_s1_burst_adapter_source0_valid),         //                .valid
4823 
                .cp_data                 (auto_start_s1_burst_adapter_source0_data),          //                .data
4824 
                .cp_startofpacket        (auto_start_s1_burst_adapter_source0_startofpacket), //                .startofpacket
4825 
                .cp_endofpacket          (auto_start_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
4826 
                .cp_channel              (auto_start_s1_burst_adapter_source0_channel),       //                .channel
4827 
                .rf_sink_ready           (auto_start_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
4828 
                .rf_sink_valid           (auto_start_s1_agent_rsp_fifo_out_valid),            //                .valid
4829 
                .rf_sink_startofpacket   (auto_start_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
4830 
                .rf_sink_endofpacket     (auto_start_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
4831 
                .rf_sink_data            (auto_start_s1_agent_rsp_fifo_out_data),             //                .data
4832 
                .rf_source_ready         (auto_start_s1_agent_rf_source_ready),               //       rf_source.ready
4833 
                .rf_source_valid         (auto_start_s1_agent_rf_source_valid),               //                .valid
4834 
                .rf_source_startofpacket (auto_start_s1_agent_rf_source_startofpacket),       //                .startofpacket
4835 
                .rf_source_endofpacket   (auto_start_s1_agent_rf_source_endofpacket),         //                .endofpacket
4836 
                .rf_source_data          (auto_start_s1_agent_rf_source_data),                //                .data
4837 
                .rdata_fifo_sink_ready   (avalon_st_adapter_008_out_0_ready),                 // rdata_fifo_sink.ready
4838 
                .rdata_fifo_sink_valid   (avalon_st_adapter_008_out_0_valid),                 //                .valid
4839 
                .rdata_fifo_sink_data    (avalon_st_adapter_008_out_0_data),                  //                .data
4840 
                .rdata_fifo_sink_error   (avalon_st_adapter_008_out_0_error),                 //                .error
4841 
                .rdata_fifo_src_ready    (auto_start_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
4842 
                .rdata_fifo_src_valid    (auto_start_s1_agent_rdata_fifo_src_valid),          //                .valid
4843 
                .rdata_fifo_src_data     (auto_start_s1_agent_rdata_fifo_src_data),           //                .data
4844 
                .m0_response             (2'b00),                                             //     (terminated)
4845 
                .m0_writeresponsevalid   (1'b0)                                               //     (terminated)
4846 
        );
4847 
 
4848 
        altera_avalon_sc_fifo #(
4849 
                .SYMBOLS_PER_BEAT    (1),
4850 
                .BITS_PER_SYMBOL     (130),
4851 
                .FIFO_DEPTH          (2),
4852 
                .CHANNEL_WIDTH       (0),
4853 
                .ERROR_WIDTH         (0),
4854 
                .USE_PACKETS         (1),
4855 
                .USE_FILL_LEVEL      (0),
4856 
                .EMPTY_LATENCY       (1),
4857 
                .USE_MEMORY_BLOCKS   (0),
4858 
                .USE_STORE_FORWARD   (0),
4859 
                .USE_ALMOST_FULL_IF  (0),
4860 
                .USE_ALMOST_EMPTY_IF (0)
4861 
        ) auto_start_s1_agent_rsp_fifo (
4862 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
4863 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
4864 
                .in_data           (auto_start_s1_agent_rf_source_data),             //        in.data
4865 
                .in_valid          (auto_start_s1_agent_rf_source_valid),            //          .valid
4866 
                .in_ready          (auto_start_s1_agent_rf_source_ready),            //          .ready
4867 
                .in_startofpacket  (auto_start_s1_agent_rf_source_startofpacket),    //          .startofpacket
4868 
                .in_endofpacket    (auto_start_s1_agent_rf_source_endofpacket),      //          .endofpacket
4869 
                .out_data          (auto_start_s1_agent_rsp_fifo_out_data),          //       out.data
4870 
                .out_valid         (auto_start_s1_agent_rsp_fifo_out_valid),         //          .valid
4871 
                .out_ready         (auto_start_s1_agent_rsp_fifo_out_ready),         //          .ready
4872 
                .out_startofpacket (auto_start_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
4873 
                .out_endofpacket   (auto_start_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
4874 
                .csr_address       (2'b00),                                          // (terminated)
4875 
                .csr_read          (1'b0),                                           // (terminated)
4876 
                .csr_write         (1'b0),                                           // (terminated)
4877 
                .csr_readdata      (),                                               // (terminated)
4878 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
4879 
                .almost_full_data  (),                                               // (terminated)
4880 
                .almost_empty_data (),                                               // (terminated)
4881 
                .in_empty          (1'b0),                                           // (terminated)
4882 
                .out_empty         (),                                               // (terminated)
4883 
                .in_error          (1'b0),                                           // (terminated)
4884 
                .out_error         (),                                               // (terminated)
4885 
                .in_channel        (1'b0),                                           // (terminated)
4886 
                .out_channel       ()                                                // (terminated)
4887 
        );
4888 
 
4889 
        altera_avalon_sc_fifo #(
4890 
                .SYMBOLS_PER_BEAT    (1),
4891 
                .BITS_PER_SYMBOL     (34),
4892 
                .FIFO_DEPTH          (2),
4893 
                .CHANNEL_WIDTH       (0),
4894 
                .ERROR_WIDTH         (0),
4895 
                .USE_PACKETS         (0),
4896 
                .USE_FILL_LEVEL      (0),
4897 
                .EMPTY_LATENCY       (0),
4898 
                .USE_MEMORY_BLOCKS   (0),
4899 
                .USE_STORE_FORWARD   (0),
4900 
                .USE_ALMOST_FULL_IF  (0),
4901 
                .USE_ALMOST_EMPTY_IF (0)
4902 
        ) auto_start_s1_agent_rdata_fifo (
4903 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
4904 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
4905 
                .in_data           (auto_start_s1_agent_rdata_fifo_src_data),        //        in.data
4906 
                .in_valid          (auto_start_s1_agent_rdata_fifo_src_valid),       //          .valid
4907 
                .in_ready          (auto_start_s1_agent_rdata_fifo_src_ready),       //          .ready
4908 
                .out_data          (auto_start_s1_agent_rdata_fifo_out_data),        //       out.data
4909 
                .out_valid         (auto_start_s1_agent_rdata_fifo_out_valid),       //          .valid
4910 
                .out_ready         (auto_start_s1_agent_rdata_fifo_out_ready),       //          .ready
4911 
                .csr_address       (2'b00),                                          // (terminated)
4912 
                .csr_read          (1'b0),                                           // (terminated)
4913 
                .csr_write         (1'b0),                                           // (terminated)
4914 
                .csr_readdata      (),                                               // (terminated)
4915 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
4916 
                .almost_full_data  (),                                               // (terminated)
4917 
                .almost_empty_data (),                                               // (terminated)
4918 
                .in_startofpacket  (1'b0),                                           // (terminated)
4919 
                .in_endofpacket    (1'b0),                                           // (terminated)
4920 
                .out_startofpacket (),                                               // (terminated)
4921 
                .out_endofpacket   (),                                               // (terminated)
4922 
                .in_empty          (1'b0),                                           // (terminated)
4923 
                .out_empty         (),                                               // (terminated)
4924 
                .in_error          (1'b0),                                           // (terminated)
4925 
                .out_error         (),                                               // (terminated)
4926 
                .in_channel        (1'b0),                                           // (terminated)
4927 
                .out_channel       ()                                                // (terminated)
4928 
        );
4929 
 
4930 
        altera_merlin_slave_agent #(
4931 
                .PKT_ORI_BURST_SIZE_H      (128),
4932 
                .PKT_ORI_BURST_SIZE_L      (126),
4933 
                .PKT_RESPONSE_STATUS_H     (125),
4934 
                .PKT_RESPONSE_STATUS_L     (124),
4935 
                .PKT_BURST_SIZE_H          (88),
4936 
                .PKT_BURST_SIZE_L          (86),
4937 
                .PKT_TRANS_LOCK            (70),
4938 
                .PKT_BEGIN_BURST           (93),
4939 
                .PKT_PROTECTION_H          (119),
4940 
                .PKT_PROTECTION_L          (117),
4941 
                .PKT_BURSTWRAP_H           (85),
4942 
                .PKT_BURSTWRAP_L           (79),
4943 
                .PKT_BYTE_CNT_H            (78),
4944 
                .PKT_BYTE_CNT_L            (72),
4945 
                .PKT_ADDR_H                (65),
4946 
                .PKT_ADDR_L                (36),
4947 
                .PKT_TRANS_COMPRESSED_READ (66),
4948 
                .PKT_TRANS_POSTED          (67),
4949 
                .PKT_TRANS_WRITE           (68),
4950 
                .PKT_TRANS_READ            (69),
4951 
                .PKT_DATA_H                (31),
4952 
                .PKT_DATA_L                (0),
4953 
                .PKT_BYTEEN_H              (35),
4954 
                .PKT_BYTEEN_L              (32),
4955 
                .PKT_SRC_ID_H              (99),
4956 
                .PKT_SRC_ID_L              (95),
4957 
                .PKT_DEST_ID_H             (104),
4958 
                .PKT_DEST_ID_L             (100),
4959 
                .PKT_SYMBOL_W              (8),
4960 
                .ST_CHANNEL_W              (22),
4961 
                .ST_DATA_W                 (129),
4962 
                .AVS_BURSTCOUNT_W          (3),
4963 
                .SUPPRESS_0_BYTEEN_CMD     (1),
4964 
                .PREVENT_FIFO_OVERFLOW     (1),
4965 
                .USE_READRESPONSE          (0),
4966 
                .USE_WRITERESPONSE         (0),
4967 
                .ECC_ENABLE                (0)
4968 
        ) link_disable_s1_agent (
4969 
                .clk                     (clk_0_clk_clk),                                       //             clk.clk
4970 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),      //       clk_reset.reset
4971 
                .m0_address              (link_disable_s1_agent_m0_address),                    //              m0.address
4972 
                .m0_burstcount           (link_disable_s1_agent_m0_burstcount),                 //                .burstcount
4973 
                .m0_byteenable           (link_disable_s1_agent_m0_byteenable),                 //                .byteenable
4974 
                .m0_debugaccess          (link_disable_s1_agent_m0_debugaccess),                //                .debugaccess
4975 
                .m0_lock                 (link_disable_s1_agent_m0_lock),                       //                .lock
4976 
                .m0_readdata             (link_disable_s1_agent_m0_readdata),                   //                .readdata
4977 
                .m0_readdatavalid        (link_disable_s1_agent_m0_readdatavalid),              //                .readdatavalid
4978 
                .m0_read                 (link_disable_s1_agent_m0_read),                       //                .read
4979 
                .m0_waitrequest          (link_disable_s1_agent_m0_waitrequest),                //                .waitrequest
4980 
                .m0_writedata            (link_disable_s1_agent_m0_writedata),                  //                .writedata
4981 
                .m0_write                (link_disable_s1_agent_m0_write),                      //                .write
4982 
                .rp_endofpacket          (link_disable_s1_agent_rp_endofpacket),                //              rp.endofpacket
4983 
                .rp_ready                (link_disable_s1_agent_rp_ready),                      //                .ready
4984 
                .rp_valid                (link_disable_s1_agent_rp_valid),                      //                .valid
4985 
                .rp_data                 (link_disable_s1_agent_rp_data),                       //                .data
4986 
                .rp_startofpacket        (link_disable_s1_agent_rp_startofpacket),              //                .startofpacket
4987 
                .cp_ready                (link_disable_s1_burst_adapter_source0_ready),         //              cp.ready
4988 
                .cp_valid                (link_disable_s1_burst_adapter_source0_valid),         //                .valid
4989 
                .cp_data                 (link_disable_s1_burst_adapter_source0_data),          //                .data
4990 
                .cp_startofpacket        (link_disable_s1_burst_adapter_source0_startofpacket), //                .startofpacket
4991 
                .cp_endofpacket          (link_disable_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
4992 
                .cp_channel              (link_disable_s1_burst_adapter_source0_channel),       //                .channel
4993 
                .rf_sink_ready           (link_disable_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
4994 
                .rf_sink_valid           (link_disable_s1_agent_rsp_fifo_out_valid),            //                .valid
4995 
                .rf_sink_startofpacket   (link_disable_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
4996 
                .rf_sink_endofpacket     (link_disable_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
4997 
                .rf_sink_data            (link_disable_s1_agent_rsp_fifo_out_data),             //                .data
4998 
                .rf_source_ready         (link_disable_s1_agent_rf_source_ready),               //       rf_source.ready
4999 
                .rf_source_valid         (link_disable_s1_agent_rf_source_valid),               //                .valid
5000 
                .rf_source_startofpacket (link_disable_s1_agent_rf_source_startofpacket),       //                .startofpacket
5001 
                .rf_source_endofpacket   (link_disable_s1_agent_rf_source_endofpacket),         //                .endofpacket
5002 
                .rf_source_data          (link_disable_s1_agent_rf_source_data),                //                .data
5003 
                .rdata_fifo_sink_ready   (avalon_st_adapter_009_out_0_ready),                   // rdata_fifo_sink.ready
5004 
                .rdata_fifo_sink_valid   (avalon_st_adapter_009_out_0_valid),                   //                .valid
5005 
                .rdata_fifo_sink_data    (avalon_st_adapter_009_out_0_data),                    //                .data
5006 
                .rdata_fifo_sink_error   (avalon_st_adapter_009_out_0_error),                   //                .error
5007 
                .rdata_fifo_src_ready    (link_disable_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
5008 
                .rdata_fifo_src_valid    (link_disable_s1_agent_rdata_fifo_src_valid),          //                .valid
5009 
                .rdata_fifo_src_data     (link_disable_s1_agent_rdata_fifo_src_data),           //                .data
5010 
                .m0_response             (2'b00),                                               //     (terminated)
5011 
                .m0_writeresponsevalid   (1'b0)                                                 //     (terminated)
5012 
        );
5013 
 
5014 
        altera_avalon_sc_fifo #(
5015 
                .SYMBOLS_PER_BEAT    (1),
5016 
                .BITS_PER_SYMBOL     (130),
5017 
                .FIFO_DEPTH          (2),
5018 
                .CHANNEL_WIDTH       (0),
5019 
                .ERROR_WIDTH         (0),
5020 
                .USE_PACKETS         (1),
5021 
                .USE_FILL_LEVEL      (0),
5022 
                .EMPTY_LATENCY       (1),
5023 
                .USE_MEMORY_BLOCKS   (0),
5024 
                .USE_STORE_FORWARD   (0),
5025 
                .USE_ALMOST_FULL_IF  (0),
5026 
                .USE_ALMOST_EMPTY_IF (0)
5027 
        ) link_disable_s1_agent_rsp_fifo (
5028 
                .clk               (clk_0_clk_clk),                                    //       clk.clk
5029 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),   // clk_reset.reset
5030 
                .in_data           (link_disable_s1_agent_rf_source_data),             //        in.data
5031 
                .in_valid          (link_disable_s1_agent_rf_source_valid),            //          .valid
5032 
                .in_ready          (link_disable_s1_agent_rf_source_ready),            //          .ready
5033 
                .in_startofpacket  (link_disable_s1_agent_rf_source_startofpacket),    //          .startofpacket
5034 
                .in_endofpacket    (link_disable_s1_agent_rf_source_endofpacket),      //          .endofpacket
5035 
                .out_data          (link_disable_s1_agent_rsp_fifo_out_data),          //       out.data
5036 
                .out_valid         (link_disable_s1_agent_rsp_fifo_out_valid),         //          .valid
5037 
                .out_ready         (link_disable_s1_agent_rsp_fifo_out_ready),         //          .ready
5038 
                .out_startofpacket (link_disable_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
5039 
                .out_endofpacket   (link_disable_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
5040 
                .csr_address       (2'b00),                                            // (terminated)
5041 
                .csr_read          (1'b0),                                             // (terminated)
5042 
                .csr_write         (1'b0),                                             // (terminated)
5043 
                .csr_readdata      (),                                                 // (terminated)
5044 
                .csr_writedata     (32'b00000000000000000000000000000000),             // (terminated)
5045 
                .almost_full_data  (),                                                 // (terminated)
5046 
                .almost_empty_data (),                                                 // (terminated)
5047 
                .in_empty          (1'b0),                                             // (terminated)
5048 
                .out_empty         (),                                                 // (terminated)
5049 
                .in_error          (1'b0),                                             // (terminated)
5050 
                .out_error         (),                                                 // (terminated)
5051 
                .in_channel        (1'b0),                                             // (terminated)
5052 
                .out_channel       ()                                                  // (terminated)
5053 
        );
5054 
 
5055 
        altera_avalon_sc_fifo #(
5056 
                .SYMBOLS_PER_BEAT    (1),
5057 
                .BITS_PER_SYMBOL     (34),
5058 
                .FIFO_DEPTH          (2),
5059 
                .CHANNEL_WIDTH       (0),
5060 
                .ERROR_WIDTH         (0),
5061 
                .USE_PACKETS         (0),
5062 
                .USE_FILL_LEVEL      (0),
5063 
                .EMPTY_LATENCY       (0),
5064 
                .USE_MEMORY_BLOCKS   (0),
5065 
                .USE_STORE_FORWARD   (0),
5066 
                .USE_ALMOST_FULL_IF  (0),
5067 
                .USE_ALMOST_EMPTY_IF (0)
5068 
        ) link_disable_s1_agent_rdata_fifo (
5069 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
5070 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
5071 
                .in_data           (link_disable_s1_agent_rdata_fifo_src_data),      //        in.data
5072 
                .in_valid          (link_disable_s1_agent_rdata_fifo_src_valid),     //          .valid
5073 
                .in_ready          (link_disable_s1_agent_rdata_fifo_src_ready),     //          .ready
5074 
                .out_data          (link_disable_s1_agent_rdata_fifo_out_data),      //       out.data
5075 
                .out_valid         (link_disable_s1_agent_rdata_fifo_out_valid),     //          .valid
5076 
                .out_ready         (link_disable_s1_agent_rdata_fifo_out_ready),     //          .ready
5077 
                .csr_address       (2'b00),                                          // (terminated)
5078 
                .csr_read          (1'b0),                                           // (terminated)
5079 
                .csr_write         (1'b0),                                           // (terminated)
5080 
                .csr_readdata      (),                                               // (terminated)
5081 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
5082 
                .almost_full_data  (),                                               // (terminated)
5083 
                .almost_empty_data (),                                               // (terminated)
5084 
                .in_startofpacket  (1'b0),                                           // (terminated)
5085 
                .in_endofpacket    (1'b0),                                           // (terminated)
5086 
                .out_startofpacket (),                                               // (terminated)
5087 
                .out_endofpacket   (),                                               // (terminated)
5088 
                .in_empty          (1'b0),                                           // (terminated)
5089 
                .out_empty         (),                                               // (terminated)
5090 
                .in_error          (1'b0),                                           // (terminated)
5091 
                .out_error         (),                                               // (terminated)
5092 
                .in_channel        (1'b0),                                           // (terminated)
5093 
                .out_channel       ()                                                // (terminated)
5094 
        );
5095 
 
5096 
        altera_merlin_slave_agent #(
5097 
                .PKT_ORI_BURST_SIZE_H      (128),
5098 
                .PKT_ORI_BURST_SIZE_L      (126),
5099 
                .PKT_RESPONSE_STATUS_H     (125),
5100 
                .PKT_RESPONSE_STATUS_L     (124),
5101 
                .PKT_BURST_SIZE_H          (88),
5102 
                .PKT_BURST_SIZE_L          (86),
5103 
                .PKT_TRANS_LOCK            (70),
5104 
                .PKT_BEGIN_BURST           (93),
5105 
                .PKT_PROTECTION_H          (119),
5106 
                .PKT_PROTECTION_L          (117),
5107 
                .PKT_BURSTWRAP_H           (85),
5108 
                .PKT_BURSTWRAP_L           (79),
5109 
                .PKT_BYTE_CNT_H            (78),
5110 
                .PKT_BYTE_CNT_L            (72),
5111 
                .PKT_ADDR_H                (65),
5112 
                .PKT_ADDR_L                (36),
5113 
                .PKT_TRANS_COMPRESSED_READ (66),
5114 
                .PKT_TRANS_POSTED          (67),
5115 
                .PKT_TRANS_WRITE           (68),
5116 
                .PKT_TRANS_READ            (69),
5117 
                .PKT_DATA_H                (31),
5118 
                .PKT_DATA_L                (0),
5119 
                .PKT_BYTEEN_H              (35),
5120 
                .PKT_BYTEEN_L              (32),
5121 
                .PKT_SRC_ID_H              (99),
5122 
                .PKT_SRC_ID_L              (95),
5123 
                .PKT_DEST_ID_H             (104),
5124 
                .PKT_DEST_ID_L             (100),
5125 
                .PKT_SYMBOL_W              (8),
5126 
                .ST_CHANNEL_W              (22),
5127 
                .ST_DATA_W                 (129),
5128 
                .AVS_BURSTCOUNT_W          (3),
5129 
                .SUPPRESS_0_BYTEEN_CMD     (1),
5130 
                .PREVENT_FIFO_OVERFLOW     (1),
5131 
                .USE_READRESPONSE          (0),
5132 
                .USE_WRITERESPONSE         (0),
5133 
                .ECC_ENABLE                (0)
5134 
        ) write_data_fifo_tx_s1_agent (
5135 
                .clk                     (clk_0_clk_clk),                                             //             clk.clk
5136 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),            //       clk_reset.reset
5137 
                .m0_address              (write_data_fifo_tx_s1_agent_m0_address),                    //              m0.address
5138 
                .m0_burstcount           (write_data_fifo_tx_s1_agent_m0_burstcount),                 //                .burstcount
5139 
                .m0_byteenable           (write_data_fifo_tx_s1_agent_m0_byteenable),                 //                .byteenable
5140 
                .m0_debugaccess          (write_data_fifo_tx_s1_agent_m0_debugaccess),                //                .debugaccess
5141 
                .m0_lock                 (write_data_fifo_tx_s1_agent_m0_lock),                       //                .lock
5142 
                .m0_readdata             (write_data_fifo_tx_s1_agent_m0_readdata),                   //                .readdata
5143 
                .m0_readdatavalid        (write_data_fifo_tx_s1_agent_m0_readdatavalid),              //                .readdatavalid
5144 
                .m0_read                 (write_data_fifo_tx_s1_agent_m0_read),                       //                .read
5145 
                .m0_waitrequest          (write_data_fifo_tx_s1_agent_m0_waitrequest),                //                .waitrequest
5146 
                .m0_writedata            (write_data_fifo_tx_s1_agent_m0_writedata),                  //                .writedata
5147 
                .m0_write                (write_data_fifo_tx_s1_agent_m0_write),                      //                .write
5148 
                .rp_endofpacket          (write_data_fifo_tx_s1_agent_rp_endofpacket),                //              rp.endofpacket
5149 
                .rp_ready                (write_data_fifo_tx_s1_agent_rp_ready),                      //                .ready
5150 
                .rp_valid                (write_data_fifo_tx_s1_agent_rp_valid),                      //                .valid
5151 
                .rp_data                 (write_data_fifo_tx_s1_agent_rp_data),                       //                .data
5152 
                .rp_startofpacket        (write_data_fifo_tx_s1_agent_rp_startofpacket),              //                .startofpacket
5153 
                .cp_ready                (write_data_fifo_tx_s1_burst_adapter_source0_ready),         //              cp.ready
5154 
                .cp_valid                (write_data_fifo_tx_s1_burst_adapter_source0_valid),         //                .valid
5155 
                .cp_data                 (write_data_fifo_tx_s1_burst_adapter_source0_data),          //                .data
5156 
                .cp_startofpacket        (write_data_fifo_tx_s1_burst_adapter_source0_startofpacket), //                .startofpacket
5157 
                .cp_endofpacket          (write_data_fifo_tx_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
5158 
                .cp_channel              (write_data_fifo_tx_s1_burst_adapter_source0_channel),       //                .channel
5159 
                .rf_sink_ready           (write_data_fifo_tx_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
5160 
                .rf_sink_valid           (write_data_fifo_tx_s1_agent_rsp_fifo_out_valid),            //                .valid
5161 
                .rf_sink_startofpacket   (write_data_fifo_tx_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
5162 
                .rf_sink_endofpacket     (write_data_fifo_tx_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
5163 
                .rf_sink_data            (write_data_fifo_tx_s1_agent_rsp_fifo_out_data),             //                .data
5164 
                .rf_source_ready         (write_data_fifo_tx_s1_agent_rf_source_ready),               //       rf_source.ready
5165 
                .rf_source_valid         (write_data_fifo_tx_s1_agent_rf_source_valid),               //                .valid
5166 
                .rf_source_startofpacket (write_data_fifo_tx_s1_agent_rf_source_startofpacket),       //                .startofpacket
5167 
                .rf_source_endofpacket   (write_data_fifo_tx_s1_agent_rf_source_endofpacket),         //                .endofpacket
5168 
                .rf_source_data          (write_data_fifo_tx_s1_agent_rf_source_data),                //                .data
5169 
                .rdata_fifo_sink_ready   (avalon_st_adapter_010_out_0_ready),                         // rdata_fifo_sink.ready
5170 
                .rdata_fifo_sink_valid   (avalon_st_adapter_010_out_0_valid),                         //                .valid
5171 
                .rdata_fifo_sink_data    (avalon_st_adapter_010_out_0_data),                          //                .data
5172 
                .rdata_fifo_sink_error   (avalon_st_adapter_010_out_0_error),                         //                .error
5173 
                .rdata_fifo_src_ready    (write_data_fifo_tx_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
5174 
                .rdata_fifo_src_valid    (write_data_fifo_tx_s1_agent_rdata_fifo_src_valid),          //                .valid
5175 
                .rdata_fifo_src_data     (write_data_fifo_tx_s1_agent_rdata_fifo_src_data),           //                .data
5176 
                .m0_response             (2'b00),                                                     //     (terminated)
5177 
                .m0_writeresponsevalid   (1'b0)                                                       //     (terminated)
5178 
        );
5179 
 
5180 
        altera_avalon_sc_fifo #(
5181 
                .SYMBOLS_PER_BEAT    (1),
5182 
                .BITS_PER_SYMBOL     (130),
5183 
                .FIFO_DEPTH          (2),
5184 
                .CHANNEL_WIDTH       (0),
5185 
                .ERROR_WIDTH         (0),
5186 
                .USE_PACKETS         (1),
5187 
                .USE_FILL_LEVEL      (0),
5188 
                .EMPTY_LATENCY       (1),
5189 
                .USE_MEMORY_BLOCKS   (0),
5190 
                .USE_STORE_FORWARD   (0),
5191 
                .USE_ALMOST_FULL_IF  (0),
5192 
                .USE_ALMOST_EMPTY_IF (0)
5193 
        ) write_data_fifo_tx_s1_agent_rsp_fifo (
5194 
                .clk               (clk_0_clk_clk),                                          //       clk.clk
5195 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),         // clk_reset.reset
5196 
                .in_data           (write_data_fifo_tx_s1_agent_rf_source_data),             //        in.data
5197 
                .in_valid          (write_data_fifo_tx_s1_agent_rf_source_valid),            //          .valid
5198 
                .in_ready          (write_data_fifo_tx_s1_agent_rf_source_ready),            //          .ready
5199 
                .in_startofpacket  (write_data_fifo_tx_s1_agent_rf_source_startofpacket),    //          .startofpacket
5200 
                .in_endofpacket    (write_data_fifo_tx_s1_agent_rf_source_endofpacket),      //          .endofpacket
5201 
                .out_data          (write_data_fifo_tx_s1_agent_rsp_fifo_out_data),          //       out.data
5202 
                .out_valid         (write_data_fifo_tx_s1_agent_rsp_fifo_out_valid),         //          .valid
5203 
                .out_ready         (write_data_fifo_tx_s1_agent_rsp_fifo_out_ready),         //          .ready
5204 
                .out_startofpacket (write_data_fifo_tx_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
5205 
                .out_endofpacket   (write_data_fifo_tx_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
5206 
                .csr_address       (2'b00),                                                  // (terminated)
5207 
                .csr_read          (1'b0),                                                   // (terminated)
5208 
                .csr_write         (1'b0),                                                   // (terminated)
5209 
                .csr_readdata      (),                                                       // (terminated)
5210 
                .csr_writedata     (32'b00000000000000000000000000000000),                   // (terminated)
5211 
                .almost_full_data  (),                                                       // (terminated)
5212 
                .almost_empty_data (),                                                       // (terminated)
5213 
                .in_empty          (1'b0),                                                   // (terminated)
5214 
                .out_empty         (),                                                       // (terminated)
5215 
                .in_error          (1'b0),                                                   // (terminated)
5216 
                .out_error         (),                                                       // (terminated)
5217 
                .in_channel        (1'b0),                                                   // (terminated)
5218 
                .out_channel       ()                                                        // (terminated)
5219 
        );
5220 
 
5221 
        altera_avalon_sc_fifo #(
5222 
                .SYMBOLS_PER_BEAT    (1),
5223 
                .BITS_PER_SYMBOL     (34),
5224 
                .FIFO_DEPTH          (2),
5225 
                .CHANNEL_WIDTH       (0),
5226 
                .ERROR_WIDTH         (0),
5227 
                .USE_PACKETS         (0),
5228 
                .USE_FILL_LEVEL      (0),
5229 
                .EMPTY_LATENCY       (0),
5230 
                .USE_MEMORY_BLOCKS   (0),
5231 
                .USE_STORE_FORWARD   (0),
5232 
                .USE_ALMOST_FULL_IF  (0),
5233 
                .USE_ALMOST_EMPTY_IF (0)
5234 
        ) write_data_fifo_tx_s1_agent_rdata_fifo (
5235 
                .clk               (clk_0_clk_clk),                                    //       clk.clk
5236 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),   // clk_reset.reset
5237 
                .in_data           (write_data_fifo_tx_s1_agent_rdata_fifo_src_data),  //        in.data
5238 
                .in_valid          (write_data_fifo_tx_s1_agent_rdata_fifo_src_valid), //          .valid
5239 
                .in_ready          (write_data_fifo_tx_s1_agent_rdata_fifo_src_ready), //          .ready
5240 
                .out_data          (write_data_fifo_tx_s1_agent_rdata_fifo_out_data),  //       out.data
5241 
                .out_valid         (write_data_fifo_tx_s1_agent_rdata_fifo_out_valid), //          .valid
5242 
                .out_ready         (write_data_fifo_tx_s1_agent_rdata_fifo_out_ready), //          .ready
5243 
                .csr_address       (2'b00),                                            // (terminated)
5244 
                .csr_read          (1'b0),                                             // (terminated)
5245 
                .csr_write         (1'b0),                                             // (terminated)
5246 
                .csr_readdata      (),                                                 // (terminated)
5247 
                .csr_writedata     (32'b00000000000000000000000000000000),             // (terminated)
5248 
                .almost_full_data  (),                                                 // (terminated)
5249 
                .almost_empty_data (),                                                 // (terminated)
5250 
                .in_startofpacket  (1'b0),                                             // (terminated)
5251 
                .in_endofpacket    (1'b0),                                             // (terminated)
5252 
                .out_startofpacket (),                                                 // (terminated)
5253 
                .out_endofpacket   (),                                                 // (terminated)
5254 
                .in_empty          (1'b0),                                             // (terminated)
5255 
                .out_empty         (),                                                 // (terminated)
5256 
                .in_error          (1'b0),                                             // (terminated)
5257 
                .out_error         (),                                                 // (terminated)
5258 
                .in_channel        (1'b0),                                             // (terminated)
5259 
                .out_channel       ()                                                  // (terminated)
5260 
        );
5261 
 
5262 
        altera_merlin_slave_agent #(
5263 
                .PKT_ORI_BURST_SIZE_H      (128),
5264 
                .PKT_ORI_BURST_SIZE_L      (126),
5265 
                .PKT_RESPONSE_STATUS_H     (125),
5266 
                .PKT_RESPONSE_STATUS_L     (124),
5267 
                .PKT_BURST_SIZE_H          (88),
5268 
                .PKT_BURST_SIZE_L          (86),
5269 
                .PKT_TRANS_LOCK            (70),
5270 
                .PKT_BEGIN_BURST           (93),
5271 
                .PKT_PROTECTION_H          (119),
5272 
                .PKT_PROTECTION_L          (117),
5273 
                .PKT_BURSTWRAP_H           (85),
5274 
                .PKT_BURSTWRAP_L           (79),
5275 
                .PKT_BYTE_CNT_H            (78),
5276 
                .PKT_BYTE_CNT_L            (72),
5277 
                .PKT_ADDR_H                (65),
5278 
                .PKT_ADDR_L                (36),
5279 
                .PKT_TRANS_COMPRESSED_READ (66),
5280 
                .PKT_TRANS_POSTED          (67),
5281 
                .PKT_TRANS_WRITE           (68),
5282 
                .PKT_TRANS_READ            (69),
5283 
                .PKT_DATA_H                (31),
5284 
                .PKT_DATA_L                (0),
5285 
                .PKT_BYTEEN_H              (35),
5286 
                .PKT_BYTEEN_L              (32),
5287 
                .PKT_SRC_ID_H              (99),
5288 
                .PKT_SRC_ID_L              (95),
5289 
                .PKT_DEST_ID_H             (104),
5290 
                .PKT_DEST_ID_L             (100),
5291 
                .PKT_SYMBOL_W              (8),
5292 
                .ST_CHANNEL_W              (22),
5293 
                .ST_DATA_W                 (129),
5294 
                .AVS_BURSTCOUNT_W          (3),
5295 
                .SUPPRESS_0_BYTEEN_CMD     (1),
5296 
                .PREVENT_FIFO_OVERFLOW     (1),
5297 
                .USE_READRESPONSE          (0),
5298 
                .USE_WRITERESPONSE         (0),
5299 
                .ECC_ENABLE                (0)
5300 
        ) write_en_tx_s1_agent (
5301 
                .clk                     (clk_0_clk_clk),                                      //             clk.clk
5302 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),     //       clk_reset.reset
5303 
                .m0_address              (write_en_tx_s1_agent_m0_address),                    //              m0.address
5304 
                .m0_burstcount           (write_en_tx_s1_agent_m0_burstcount),                 //                .burstcount
5305 
                .m0_byteenable           (write_en_tx_s1_agent_m0_byteenable),                 //                .byteenable
5306 
                .m0_debugaccess          (write_en_tx_s1_agent_m0_debugaccess),                //                .debugaccess
5307 
                .m0_lock                 (write_en_tx_s1_agent_m0_lock),                       //                .lock
5308 
                .m0_readdata             (write_en_tx_s1_agent_m0_readdata),                   //                .readdata
5309 
                .m0_readdatavalid        (write_en_tx_s1_agent_m0_readdatavalid),              //                .readdatavalid
5310 
                .m0_read                 (write_en_tx_s1_agent_m0_read),                       //                .read
5311 
                .m0_waitrequest          (write_en_tx_s1_agent_m0_waitrequest),                //                .waitrequest
5312 
                .m0_writedata            (write_en_tx_s1_agent_m0_writedata),                  //                .writedata
5313 
                .m0_write                (write_en_tx_s1_agent_m0_write),                      //                .write
5314 
                .rp_endofpacket          (write_en_tx_s1_agent_rp_endofpacket),                //              rp.endofpacket
5315 
                .rp_ready                (write_en_tx_s1_agent_rp_ready),                      //                .ready
5316 
                .rp_valid                (write_en_tx_s1_agent_rp_valid),                      //                .valid
5317 
                .rp_data                 (write_en_tx_s1_agent_rp_data),                       //                .data
5318 
                .rp_startofpacket        (write_en_tx_s1_agent_rp_startofpacket),              //                .startofpacket
5319 
                .cp_ready                (write_en_tx_s1_burst_adapter_source0_ready),         //              cp.ready
5320 
                .cp_valid                (write_en_tx_s1_burst_adapter_source0_valid),         //                .valid
5321 
                .cp_data                 (write_en_tx_s1_burst_adapter_source0_data),          //                .data
5322 
                .cp_startofpacket        (write_en_tx_s1_burst_adapter_source0_startofpacket), //                .startofpacket
5323 
                .cp_endofpacket          (write_en_tx_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
5324 
                .cp_channel              (write_en_tx_s1_burst_adapter_source0_channel),       //                .channel
5325 
                .rf_sink_ready           (write_en_tx_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
5326 
                .rf_sink_valid           (write_en_tx_s1_agent_rsp_fifo_out_valid),            //                .valid
5327 
                .rf_sink_startofpacket   (write_en_tx_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
5328 
                .rf_sink_endofpacket     (write_en_tx_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
5329 
                .rf_sink_data            (write_en_tx_s1_agent_rsp_fifo_out_data),             //                .data
5330 
                .rf_source_ready         (write_en_tx_s1_agent_rf_source_ready),               //       rf_source.ready
5331 
                .rf_source_valid         (write_en_tx_s1_agent_rf_source_valid),               //                .valid
5332 
                .rf_source_startofpacket (write_en_tx_s1_agent_rf_source_startofpacket),       //                .startofpacket
5333 
                .rf_source_endofpacket   (write_en_tx_s1_agent_rf_source_endofpacket),         //                .endofpacket
5334 
                .rf_source_data          (write_en_tx_s1_agent_rf_source_data),                //                .data
5335 
                .rdata_fifo_sink_ready   (avalon_st_adapter_011_out_0_ready),                  // rdata_fifo_sink.ready
5336 
                .rdata_fifo_sink_valid   (avalon_st_adapter_011_out_0_valid),                  //                .valid
5337 
                .rdata_fifo_sink_data    (avalon_st_adapter_011_out_0_data),                   //                .data
5338 
                .rdata_fifo_sink_error   (avalon_st_adapter_011_out_0_error),                  //                .error
5339 
                .rdata_fifo_src_ready    (write_en_tx_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
5340 
                .rdata_fifo_src_valid    (write_en_tx_s1_agent_rdata_fifo_src_valid),          //                .valid
5341 
                .rdata_fifo_src_data     (write_en_tx_s1_agent_rdata_fifo_src_data),           //                .data
5342 
                .m0_response             (2'b00),                                              //     (terminated)
5343 
                .m0_writeresponsevalid   (1'b0)                                                //     (terminated)
5344 
        );
5345 
 
5346 
        altera_avalon_sc_fifo #(
5347 
                .SYMBOLS_PER_BEAT    (1),
5348 
                .BITS_PER_SYMBOL     (130),
5349 
                .FIFO_DEPTH          (2),
5350 
                .CHANNEL_WIDTH       (0),
5351 
                .ERROR_WIDTH         (0),
5352 
                .USE_PACKETS         (1),
5353 
                .USE_FILL_LEVEL      (0),
5354 
                .EMPTY_LATENCY       (1),
5355 
                .USE_MEMORY_BLOCKS   (0),
5356 
                .USE_STORE_FORWARD   (0),
5357 
                .USE_ALMOST_FULL_IF  (0),
5358 
                .USE_ALMOST_EMPTY_IF (0)
5359 
        ) write_en_tx_s1_agent_rsp_fifo (
5360 
                .clk               (clk_0_clk_clk),                                   //       clk.clk
5361 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),  // clk_reset.reset
5362 
                .in_data           (write_en_tx_s1_agent_rf_source_data),             //        in.data
5363 
                .in_valid          (write_en_tx_s1_agent_rf_source_valid),            //          .valid
5364 
                .in_ready          (write_en_tx_s1_agent_rf_source_ready),            //          .ready
5365 
                .in_startofpacket  (write_en_tx_s1_agent_rf_source_startofpacket),    //          .startofpacket
5366 
                .in_endofpacket    (write_en_tx_s1_agent_rf_source_endofpacket),      //          .endofpacket
5367 
                .out_data          (write_en_tx_s1_agent_rsp_fifo_out_data),          //       out.data
5368 
                .out_valid         (write_en_tx_s1_agent_rsp_fifo_out_valid),         //          .valid
5369 
                .out_ready         (write_en_tx_s1_agent_rsp_fifo_out_ready),         //          .ready
5370 
                .out_startofpacket (write_en_tx_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
5371 
                .out_endofpacket   (write_en_tx_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
5372 
                .csr_address       (2'b00),                                           // (terminated)
5373 
                .csr_read          (1'b0),                                            // (terminated)
5374 
                .csr_write         (1'b0),                                            // (terminated)
5375 
                .csr_readdata      (),                                                // (terminated)
5376 
                .csr_writedata     (32'b00000000000000000000000000000000),            // (terminated)
5377 
                .almost_full_data  (),                                                // (terminated)
5378 
                .almost_empty_data (),                                                // (terminated)
5379 
                .in_empty          (1'b0),                                            // (terminated)
5380 
                .out_empty         (),                                                // (terminated)
5381 
                .in_error          (1'b0),                                            // (terminated)
5382 
                .out_error         (),                                                // (terminated)
5383 
                .in_channel        (1'b0),                                            // (terminated)
5384 
                .out_channel       ()                                                 // (terminated)
5385 
        );
5386 
 
5387 
        altera_avalon_sc_fifo #(
5388 
                .SYMBOLS_PER_BEAT    (1),
5389 
                .BITS_PER_SYMBOL     (34),
5390 
                .FIFO_DEPTH          (2),
5391 
                .CHANNEL_WIDTH       (0),
5392 
                .ERROR_WIDTH         (0),
5393 
                .USE_PACKETS         (0),
5394 
                .USE_FILL_LEVEL      (0),
5395 
                .EMPTY_LATENCY       (0),
5396 
                .USE_MEMORY_BLOCKS   (0),
5397 
                .USE_STORE_FORWARD   (0),
5398 
                .USE_ALMOST_FULL_IF  (0),
5399 
                .USE_ALMOST_EMPTY_IF (0)
5400 
        ) write_en_tx_s1_agent_rdata_fifo (
5401 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
5402 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
5403 
                .in_data           (write_en_tx_s1_agent_rdata_fifo_src_data),       //        in.data
5404 
                .in_valid          (write_en_tx_s1_agent_rdata_fifo_src_valid),      //          .valid
5405 
                .in_ready          (write_en_tx_s1_agent_rdata_fifo_src_ready),      //          .ready
5406 
                .out_data          (write_en_tx_s1_agent_rdata_fifo_out_data),       //       out.data
5407 
                .out_valid         (write_en_tx_s1_agent_rdata_fifo_out_valid),      //          .valid
5408 
                .out_ready         (write_en_tx_s1_agent_rdata_fifo_out_ready),      //          .ready
5409 
                .csr_address       (2'b00),                                          // (terminated)
5410 
                .csr_read          (1'b0),                                           // (terminated)
5411 
                .csr_write         (1'b0),                                           // (terminated)
5412 
                .csr_readdata      (),                                               // (terminated)
5413 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
5414 
                .almost_full_data  (),                                               // (terminated)
5415 
                .almost_empty_data (),                                               // (terminated)
5416 
                .in_startofpacket  (1'b0),                                           // (terminated)
5417 
                .in_endofpacket    (1'b0),                                           // (terminated)
5418 
                .out_startofpacket (),                                               // (terminated)
5419 
                .out_endofpacket   (),                                               // (terminated)
5420 
                .in_empty          (1'b0),                                           // (terminated)
5421 
                .out_empty         (),                                               // (terminated)
5422 
                .in_error          (1'b0),                                           // (terminated)
5423 
                .out_error         (),                                               // (terminated)
5424 
                .in_channel        (1'b0),                                           // (terminated)
5425 
                .out_channel       ()                                                // (terminated)
5426 
        );
5427 
 
5428 
        altera_merlin_slave_agent #(
5429 
                .PKT_ORI_BURST_SIZE_H      (128),
5430 
                .PKT_ORI_BURST_SIZE_L      (126),
5431 
                .PKT_RESPONSE_STATUS_H     (125),
5432 
                .PKT_RESPONSE_STATUS_L     (124),
5433 
                .PKT_BURST_SIZE_H          (88),
5434 
                .PKT_BURST_SIZE_L          (86),
5435 
                .PKT_TRANS_LOCK            (70),
5436 
                .PKT_BEGIN_BURST           (93),
5437 
                .PKT_PROTECTION_H          (119),
5438 
                .PKT_PROTECTION_L          (117),
5439 
                .PKT_BURSTWRAP_H           (85),
5440 
                .PKT_BURSTWRAP_L           (79),
5441 
                .PKT_BYTE_CNT_H            (78),
5442 
                .PKT_BYTE_CNT_L            (72),
5443 
                .PKT_ADDR_H                (65),
5444 
                .PKT_ADDR_L                (36),
5445 
                .PKT_TRANS_COMPRESSED_READ (66),
5446 
                .PKT_TRANS_POSTED          (67),
5447 
                .PKT_TRANS_WRITE           (68),
5448 
                .PKT_TRANS_READ            (69),
5449 
                .PKT_DATA_H                (31),
5450 
                .PKT_DATA_L                (0),
5451 
                .PKT_BYTEEN_H              (35),
5452 
                .PKT_BYTEEN_L              (32),
5453 
                .PKT_SRC_ID_H              (99),
5454 
                .PKT_SRC_ID_L              (95),
5455 
                .PKT_DEST_ID_H             (104),
5456 
                .PKT_DEST_ID_L             (100),
5457 
                .PKT_SYMBOL_W              (8),
5458 
                .ST_CHANNEL_W              (22),
5459 
                .ST_DATA_W                 (129),
5460 
                .AVS_BURSTCOUNT_W          (3),
5461 
                .SUPPRESS_0_BYTEEN_CMD     (1),
5462 
                .PREVENT_FIFO_OVERFLOW     (1),
5463 
                .USE_READRESPONSE          (0),
5464 
                .USE_WRITERESPONSE         (0),
5465 
                .ECC_ENABLE                (0)
5466 
        ) fifo_full_tx_status_s1_agent (
5467 
                .clk                     (clk_0_clk_clk),                                              //             clk.clk
5468 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),             //       clk_reset.reset
5469 
                .m0_address              (fifo_full_tx_status_s1_agent_m0_address),                    //              m0.address
5470 
                .m0_burstcount           (fifo_full_tx_status_s1_agent_m0_burstcount),                 //                .burstcount
5471 
                .m0_byteenable           (fifo_full_tx_status_s1_agent_m0_byteenable),                 //                .byteenable
5472 
                .m0_debugaccess          (fifo_full_tx_status_s1_agent_m0_debugaccess),                //                .debugaccess
5473 
                .m0_lock                 (fifo_full_tx_status_s1_agent_m0_lock),                       //                .lock
5474 
                .m0_readdata             (fifo_full_tx_status_s1_agent_m0_readdata),                   //                .readdata
5475 
                .m0_readdatavalid        (fifo_full_tx_status_s1_agent_m0_readdatavalid),              //                .readdatavalid
5476 
                .m0_read                 (fifo_full_tx_status_s1_agent_m0_read),                       //                .read
5477 
                .m0_waitrequest          (fifo_full_tx_status_s1_agent_m0_waitrequest),                //                .waitrequest
5478 
                .m0_writedata            (fifo_full_tx_status_s1_agent_m0_writedata),                  //                .writedata
5479 
                .m0_write                (fifo_full_tx_status_s1_agent_m0_write),                      //                .write
5480 
                .rp_endofpacket          (fifo_full_tx_status_s1_agent_rp_endofpacket),                //              rp.endofpacket
5481 
                .rp_ready                (fifo_full_tx_status_s1_agent_rp_ready),                      //                .ready
5482 
                .rp_valid                (fifo_full_tx_status_s1_agent_rp_valid),                      //                .valid
5483 
                .rp_data                 (fifo_full_tx_status_s1_agent_rp_data),                       //                .data
5484 
                .rp_startofpacket        (fifo_full_tx_status_s1_agent_rp_startofpacket),              //                .startofpacket
5485 
                .cp_ready                (fifo_full_tx_status_s1_burst_adapter_source0_ready),         //              cp.ready
5486 
                .cp_valid                (fifo_full_tx_status_s1_burst_adapter_source0_valid),         //                .valid
5487 
                .cp_data                 (fifo_full_tx_status_s1_burst_adapter_source0_data),          //                .data
5488 
                .cp_startofpacket        (fifo_full_tx_status_s1_burst_adapter_source0_startofpacket), //                .startofpacket
5489 
                .cp_endofpacket          (fifo_full_tx_status_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
5490 
                .cp_channel              (fifo_full_tx_status_s1_burst_adapter_source0_channel),       //                .channel
5491 
                .rf_sink_ready           (fifo_full_tx_status_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
5492 
                .rf_sink_valid           (fifo_full_tx_status_s1_agent_rsp_fifo_out_valid),            //                .valid
5493 
                .rf_sink_startofpacket   (fifo_full_tx_status_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
5494 
                .rf_sink_endofpacket     (fifo_full_tx_status_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
5495 
                .rf_sink_data            (fifo_full_tx_status_s1_agent_rsp_fifo_out_data),             //                .data
5496 
                .rf_source_ready         (fifo_full_tx_status_s1_agent_rf_source_ready),               //       rf_source.ready
5497 
                .rf_source_valid         (fifo_full_tx_status_s1_agent_rf_source_valid),               //                .valid
5498 
                .rf_source_startofpacket (fifo_full_tx_status_s1_agent_rf_source_startofpacket),       //                .startofpacket
5499 
                .rf_source_endofpacket   (fifo_full_tx_status_s1_agent_rf_source_endofpacket),         //                .endofpacket
5500 
                .rf_source_data          (fifo_full_tx_status_s1_agent_rf_source_data),                //                .data
5501 
                .rdata_fifo_sink_ready   (avalon_st_adapter_012_out_0_ready),                          // rdata_fifo_sink.ready
5502 
                .rdata_fifo_sink_valid   (avalon_st_adapter_012_out_0_valid),                          //                .valid
5503 
                .rdata_fifo_sink_data    (avalon_st_adapter_012_out_0_data),                           //                .data
5504 
                .rdata_fifo_sink_error   (avalon_st_adapter_012_out_0_error),                          //                .error
5505 
                .rdata_fifo_src_ready    (fifo_full_tx_status_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
5506 
                .rdata_fifo_src_valid    (fifo_full_tx_status_s1_agent_rdata_fifo_src_valid),          //                .valid
5507 
                .rdata_fifo_src_data     (fifo_full_tx_status_s1_agent_rdata_fifo_src_data),           //                .data
5508 
                .m0_response             (2'b00),                                                      //     (terminated)
5509 
                .m0_writeresponsevalid   (1'b0)                                                        //     (terminated)
5510 
        );
5511 
 
5512 
        altera_avalon_sc_fifo #(
5513 
                .SYMBOLS_PER_BEAT    (1),
5514 
                .BITS_PER_SYMBOL     (130),
5515 
                .FIFO_DEPTH          (2),
5516 
                .CHANNEL_WIDTH       (0),
5517 
                .ERROR_WIDTH         (0),
5518 
                .USE_PACKETS         (1),
5519 
                .USE_FILL_LEVEL      (0),
5520 
                .EMPTY_LATENCY       (1),
5521 
                .USE_MEMORY_BLOCKS   (0),
5522 
                .USE_STORE_FORWARD   (0),
5523 
                .USE_ALMOST_FULL_IF  (0),
5524 
                .USE_ALMOST_EMPTY_IF (0)
5525 
        ) fifo_full_tx_status_s1_agent_rsp_fifo (
5526 
                .clk               (clk_0_clk_clk),                                           //       clk.clk
5527 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),          // clk_reset.reset
5528 
                .in_data           (fifo_full_tx_status_s1_agent_rf_source_data),             //        in.data
5529 
                .in_valid          (fifo_full_tx_status_s1_agent_rf_source_valid),            //          .valid
5530 
                .in_ready          (fifo_full_tx_status_s1_agent_rf_source_ready),            //          .ready
5531 
                .in_startofpacket  (fifo_full_tx_status_s1_agent_rf_source_startofpacket),    //          .startofpacket
5532 
                .in_endofpacket    (fifo_full_tx_status_s1_agent_rf_source_endofpacket),      //          .endofpacket
5533 
                .out_data          (fifo_full_tx_status_s1_agent_rsp_fifo_out_data),          //       out.data
5534 
                .out_valid         (fifo_full_tx_status_s1_agent_rsp_fifo_out_valid),         //          .valid
5535 
                .out_ready         (fifo_full_tx_status_s1_agent_rsp_fifo_out_ready),         //          .ready
5536 
                .out_startofpacket (fifo_full_tx_status_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
5537 
                .out_endofpacket   (fifo_full_tx_status_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
5538 
                .csr_address       (2'b00),                                                   // (terminated)
5539 
                .csr_read          (1'b0),                                                    // (terminated)
5540 
                .csr_write         (1'b0),                                                    // (terminated)
5541 
                .csr_readdata      (),                                                        // (terminated)
5542 
                .csr_writedata     (32'b00000000000000000000000000000000),                    // (terminated)
5543 
                .almost_full_data  (),                                                        // (terminated)
5544 
                .almost_empty_data (),                                                        // (terminated)
5545 
                .in_empty          (1'b0),                                                    // (terminated)
5546 
                .out_empty         (),                                                        // (terminated)
5547 
                .in_error          (1'b0),                                                    // (terminated)
5548 
                .out_error         (),                                                        // (terminated)
5549 
                .in_channel        (1'b0),                                                    // (terminated)
5550 
                .out_channel       ()                                                         // (terminated)
5551 
        );
5552 
 
5553 
        altera_avalon_sc_fifo #(
5554 
                .SYMBOLS_PER_BEAT    (1),
5555 
                .BITS_PER_SYMBOL     (34),
5556 
                .FIFO_DEPTH          (2),
5557 
                .CHANNEL_WIDTH       (0),
5558 
                .ERROR_WIDTH         (0),
5559 
                .USE_PACKETS         (0),
5560 
                .USE_FILL_LEVEL      (0),
5561 
                .EMPTY_LATENCY       (0),
5562 
                .USE_MEMORY_BLOCKS   (0),
5563 
                .USE_STORE_FORWARD   (0),
5564 
                .USE_ALMOST_FULL_IF  (0),
5565 
                .USE_ALMOST_EMPTY_IF (0)
5566 
        ) fifo_full_tx_status_s1_agent_rdata_fifo (
5567 
                .clk               (clk_0_clk_clk),                                     //       clk.clk
5568 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),    // clk_reset.reset
5569 
                .in_data           (fifo_full_tx_status_s1_agent_rdata_fifo_src_data),  //        in.data
5570 
                .in_valid          (fifo_full_tx_status_s1_agent_rdata_fifo_src_valid), //          .valid
5571 
                .in_ready          (fifo_full_tx_status_s1_agent_rdata_fifo_src_ready), //          .ready
5572 
                .out_data          (fifo_full_tx_status_s1_agent_rdata_fifo_out_data),  //       out.data
5573 
                .out_valid         (fifo_full_tx_status_s1_agent_rdata_fifo_out_valid), //          .valid
5574 
                .out_ready         (fifo_full_tx_status_s1_agent_rdata_fifo_out_ready), //          .ready
5575 
                .csr_address       (2'b00),                                             // (terminated)
5576 
                .csr_read          (1'b0),                                              // (terminated)
5577 
                .csr_write         (1'b0),                                              // (terminated)
5578 
                .csr_readdata      (),                                                  // (terminated)
5579 
                .csr_writedata     (32'b00000000000000000000000000000000),              // (terminated)
5580 
                .almost_full_data  (),                                                  // (terminated)
5581 
                .almost_empty_data (),                                                  // (terminated)
5582 
                .in_startofpacket  (1'b0),                                              // (terminated)
5583 
                .in_endofpacket    (1'b0),                                              // (terminated)
5584 
                .out_startofpacket (),                                                  // (terminated)
5585 
                .out_endofpacket   (),                                                  // (terminated)
5586 
                .in_empty          (1'b0),                                              // (terminated)
5587 
                .out_empty         (),                                                  // (terminated)
5588 
                .in_error          (1'b0),                                              // (terminated)
5589 
                .out_error         (),                                                  // (terminated)
5590 
                .in_channel        (1'b0),                                              // (terminated)
5591 
                .out_channel       ()                                                   // (terminated)
5592 
        );
5593 
 
5594 
        altera_merlin_slave_agent #(
5595 
                .PKT_ORI_BURST_SIZE_H      (128),
5596 
                .PKT_ORI_BURST_SIZE_L      (126),
5597 
                .PKT_RESPONSE_STATUS_H     (125),
5598 
                .PKT_RESPONSE_STATUS_L     (124),
5599 
                .PKT_BURST_SIZE_H          (88),
5600 
                .PKT_BURST_SIZE_L          (86),
5601 
                .PKT_TRANS_LOCK            (70),
5602 
                .PKT_BEGIN_BURST           (93),
5603 
                .PKT_PROTECTION_H          (119),
5604 
                .PKT_PROTECTION_L          (117),
5605 
                .PKT_BURSTWRAP_H           (85),
5606 
                .PKT_BURSTWRAP_L           (79),
5607 
                .PKT_BYTE_CNT_H            (78),
5608 
                .PKT_BYTE_CNT_L            (72),
5609 
                .PKT_ADDR_H                (65),
5610 
                .PKT_ADDR_L                (36),
5611 
                .PKT_TRANS_COMPRESSED_READ (66),
5612 
                .PKT_TRANS_POSTED          (67),
5613 
                .PKT_TRANS_WRITE           (68),
5614 
                .PKT_TRANS_READ            (69),
5615 
                .PKT_DATA_H                (31),
5616 
                .PKT_DATA_L                (0),
5617 
                .PKT_BYTEEN_H              (35),
5618 
                .PKT_BYTEEN_L              (32),
5619 
                .PKT_SRC_ID_H              (99),
5620 
                .PKT_SRC_ID_L              (95),
5621 
                .PKT_DEST_ID_H             (104),
5622 
                .PKT_DEST_ID_L             (100),
5623 
                .PKT_SYMBOL_W              (8),
5624 
                .ST_CHANNEL_W              (22),
5625 
                .ST_DATA_W                 (129),
5626 
                .AVS_BURSTCOUNT_W          (3),
5627 
                .SUPPRESS_0_BYTEEN_CMD     (1),
5628 
                .PREVENT_FIFO_OVERFLOW     (1),
5629 
                .USE_READRESPONSE          (0),
5630 
                .USE_WRITERESPONSE         (0),
5631 
                .ECC_ENABLE                (0)
5632 
        ) fifo_empty_tx_status_s1_agent (
5633 
                .clk                     (clk_0_clk_clk),                                               //             clk.clk
5634 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),              //       clk_reset.reset
5635 
                .m0_address              (fifo_empty_tx_status_s1_agent_m0_address),                    //              m0.address
5636 
                .m0_burstcount           (fifo_empty_tx_status_s1_agent_m0_burstcount),                 //                .burstcount
5637 
                .m0_byteenable           (fifo_empty_tx_status_s1_agent_m0_byteenable),                 //                .byteenable
5638 
                .m0_debugaccess          (fifo_empty_tx_status_s1_agent_m0_debugaccess),                //                .debugaccess
5639 
                .m0_lock                 (fifo_empty_tx_status_s1_agent_m0_lock),                       //                .lock
5640 
                .m0_readdata             (fifo_empty_tx_status_s1_agent_m0_readdata),                   //                .readdata
5641 
                .m0_readdatavalid        (fifo_empty_tx_status_s1_agent_m0_readdatavalid),              //                .readdatavalid
5642 
                .m0_read                 (fifo_empty_tx_status_s1_agent_m0_read),                       //                .read
5643 
                .m0_waitrequest          (fifo_empty_tx_status_s1_agent_m0_waitrequest),                //                .waitrequest
5644 
                .m0_writedata            (fifo_empty_tx_status_s1_agent_m0_writedata),                  //                .writedata
5645 
                .m0_write                (fifo_empty_tx_status_s1_agent_m0_write),                      //                .write
5646 
                .rp_endofpacket          (fifo_empty_tx_status_s1_agent_rp_endofpacket),                //              rp.endofpacket
5647 
                .rp_ready                (fifo_empty_tx_status_s1_agent_rp_ready),                      //                .ready
5648 
                .rp_valid                (fifo_empty_tx_status_s1_agent_rp_valid),                      //                .valid
5649 
                .rp_data                 (fifo_empty_tx_status_s1_agent_rp_data),                       //                .data
5650 
                .rp_startofpacket        (fifo_empty_tx_status_s1_agent_rp_startofpacket),              //                .startofpacket
5651 
                .cp_ready                (fifo_empty_tx_status_s1_burst_adapter_source0_ready),         //              cp.ready
5652 
                .cp_valid                (fifo_empty_tx_status_s1_burst_adapter_source0_valid),         //                .valid
5653 
                .cp_data                 (fifo_empty_tx_status_s1_burst_adapter_source0_data),          //                .data
5654 
                .cp_startofpacket        (fifo_empty_tx_status_s1_burst_adapter_source0_startofpacket), //                .startofpacket
5655 
                .cp_endofpacket          (fifo_empty_tx_status_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
5656 
                .cp_channel              (fifo_empty_tx_status_s1_burst_adapter_source0_channel),       //                .channel
5657 
                .rf_sink_ready           (fifo_empty_tx_status_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
5658 
                .rf_sink_valid           (fifo_empty_tx_status_s1_agent_rsp_fifo_out_valid),            //                .valid
5659 
                .rf_sink_startofpacket   (fifo_empty_tx_status_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
5660 
                .rf_sink_endofpacket     (fifo_empty_tx_status_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
5661 
                .rf_sink_data            (fifo_empty_tx_status_s1_agent_rsp_fifo_out_data),             //                .data
5662 
                .rf_source_ready         (fifo_empty_tx_status_s1_agent_rf_source_ready),               //       rf_source.ready
5663 
                .rf_source_valid         (fifo_empty_tx_status_s1_agent_rf_source_valid),               //                .valid
5664 
                .rf_source_startofpacket (fifo_empty_tx_status_s1_agent_rf_source_startofpacket),       //                .startofpacket
5665 
                .rf_source_endofpacket   (fifo_empty_tx_status_s1_agent_rf_source_endofpacket),         //                .endofpacket
5666 
                .rf_source_data          (fifo_empty_tx_status_s1_agent_rf_source_data),                //                .data
5667 
                .rdata_fifo_sink_ready   (avalon_st_adapter_013_out_0_ready),                           // rdata_fifo_sink.ready
5668 
                .rdata_fifo_sink_valid   (avalon_st_adapter_013_out_0_valid),                           //                .valid
5669 
                .rdata_fifo_sink_data    (avalon_st_adapter_013_out_0_data),                            //                .data
5670 
                .rdata_fifo_sink_error   (avalon_st_adapter_013_out_0_error),                           //                .error
5671 
                .rdata_fifo_src_ready    (fifo_empty_tx_status_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
5672 
                .rdata_fifo_src_valid    (fifo_empty_tx_status_s1_agent_rdata_fifo_src_valid),          //                .valid
5673 
                .rdata_fifo_src_data     (fifo_empty_tx_status_s1_agent_rdata_fifo_src_data),           //                .data
5674 
                .m0_response             (2'b00),                                                       //     (terminated)
5675 
                .m0_writeresponsevalid   (1'b0)                                                         //     (terminated)
5676 
        );
5677 
 
5678 
        altera_avalon_sc_fifo #(
5679 
                .SYMBOLS_PER_BEAT    (1),
5680 
                .BITS_PER_SYMBOL     (130),
5681 
                .FIFO_DEPTH          (2),
5682 
                .CHANNEL_WIDTH       (0),
5683 
                .ERROR_WIDTH         (0),
5684 
                .USE_PACKETS         (1),
5685 
                .USE_FILL_LEVEL      (0),
5686 
                .EMPTY_LATENCY       (1),
5687 
                .USE_MEMORY_BLOCKS   (0),
5688 
                .USE_STORE_FORWARD   (0),
5689 
                .USE_ALMOST_FULL_IF  (0),
5690 
                .USE_ALMOST_EMPTY_IF (0)
5691 
        ) fifo_empty_tx_status_s1_agent_rsp_fifo (
5692 
                .clk               (clk_0_clk_clk),                                            //       clk.clk
5693 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),           // clk_reset.reset
5694 
                .in_data           (fifo_empty_tx_status_s1_agent_rf_source_data),             //        in.data
5695 
                .in_valid          (fifo_empty_tx_status_s1_agent_rf_source_valid),            //          .valid
5696 
                .in_ready          (fifo_empty_tx_status_s1_agent_rf_source_ready),            //          .ready
5697 
                .in_startofpacket  (fifo_empty_tx_status_s1_agent_rf_source_startofpacket),    //          .startofpacket
5698 
                .in_endofpacket    (fifo_empty_tx_status_s1_agent_rf_source_endofpacket),      //          .endofpacket
5699 
                .out_data          (fifo_empty_tx_status_s1_agent_rsp_fifo_out_data),          //       out.data
5700 
                .out_valid         (fifo_empty_tx_status_s1_agent_rsp_fifo_out_valid),         //          .valid
5701 
                .out_ready         (fifo_empty_tx_status_s1_agent_rsp_fifo_out_ready),         //          .ready
5702 
                .out_startofpacket (fifo_empty_tx_status_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
5703 
                .out_endofpacket   (fifo_empty_tx_status_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
5704 
                .csr_address       (2'b00),                                                    // (terminated)
5705 
                .csr_read          (1'b0),                                                     // (terminated)
5706 
                .csr_write         (1'b0),                                                     // (terminated)
5707 
                .csr_readdata      (),                                                         // (terminated)
5708 
                .csr_writedata     (32'b00000000000000000000000000000000),                     // (terminated)
5709 
                .almost_full_data  (),                                                         // (terminated)
5710 
                .almost_empty_data (),                                                         // (terminated)
5711 
                .in_empty          (1'b0),                                                     // (terminated)
5712 
                .out_empty         (),                                                         // (terminated)
5713 
                .in_error          (1'b0),                                                     // (terminated)
5714 
                .out_error         (),                                                         // (terminated)
5715 
                .in_channel        (1'b0),                                                     // (terminated)
5716 
                .out_channel       ()                                                          // (terminated)
5717 
        );
5718 
 
5719 
        altera_avalon_sc_fifo #(
5720 
                .SYMBOLS_PER_BEAT    (1),
5721 
                .BITS_PER_SYMBOL     (34),
5722 
                .FIFO_DEPTH          (2),
5723 
                .CHANNEL_WIDTH       (0),
5724 
                .ERROR_WIDTH         (0),
5725 
                .USE_PACKETS         (0),
5726 
                .USE_FILL_LEVEL      (0),
5727 
                .EMPTY_LATENCY       (0),
5728 
                .USE_MEMORY_BLOCKS   (0),
5729 
                .USE_STORE_FORWARD   (0),
5730 
                .USE_ALMOST_FULL_IF  (0),
5731 
                .USE_ALMOST_EMPTY_IF (0)
5732 
        ) fifo_empty_tx_status_s1_agent_rdata_fifo (
5733 
                .clk               (clk_0_clk_clk),                                      //       clk.clk
5734 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),     // clk_reset.reset
5735 
                .in_data           (fifo_empty_tx_status_s1_agent_rdata_fifo_src_data),  //        in.data
5736 
                .in_valid          (fifo_empty_tx_status_s1_agent_rdata_fifo_src_valid), //          .valid
5737 
                .in_ready          (fifo_empty_tx_status_s1_agent_rdata_fifo_src_ready), //          .ready
5738 
                .out_data          (fifo_empty_tx_status_s1_agent_rdata_fifo_out_data),  //       out.data
5739 
                .out_valid         (fifo_empty_tx_status_s1_agent_rdata_fifo_out_valid), //          .valid
5740 
                .out_ready         (fifo_empty_tx_status_s1_agent_rdata_fifo_out_ready), //          .ready
5741 
                .csr_address       (2'b00),                                              // (terminated)
5742 
                .csr_read          (1'b0),                                               // (terminated)
5743 
                .csr_write         (1'b0),                                               // (terminated)
5744 
                .csr_readdata      (),                                                   // (terminated)
5745 
                .csr_writedata     (32'b00000000000000000000000000000000),               // (terminated)
5746 
                .almost_full_data  (),                                                   // (terminated)
5747 
                .almost_empty_data (),                                                   // (terminated)
5748 
                .in_startofpacket  (1'b0),                                               // (terminated)
5749 
                .in_endofpacket    (1'b0),                                               // (terminated)
5750 
                .out_startofpacket (),                                                   // (terminated)
5751 
                .out_endofpacket   (),                                                   // (terminated)
5752 
                .in_empty          (1'b0),                                               // (terminated)
5753 
                .out_empty         (),                                                   // (terminated)
5754 
                .in_error          (1'b0),                                               // (terminated)
5755 
                .out_error         (),                                                   // (terminated)
5756 
                .in_channel        (1'b0),                                               // (terminated)
5757 
                .out_channel       ()                                                    // (terminated)
5758 
        );
5759 
 
5760 
        altera_merlin_slave_agent #(
5761 
                .PKT_ORI_BURST_SIZE_H      (128),
5762 
                .PKT_ORI_BURST_SIZE_L      (126),
5763 
                .PKT_RESPONSE_STATUS_H     (125),
5764 
                .PKT_RESPONSE_STATUS_L     (124),
5765 
                .PKT_BURST_SIZE_H          (88),
5766 
                .PKT_BURST_SIZE_L          (86),
5767 
                .PKT_TRANS_LOCK            (70),
5768 
                .PKT_BEGIN_BURST           (93),
5769 
                .PKT_PROTECTION_H          (119),
5770 
                .PKT_PROTECTION_L          (117),
5771 
                .PKT_BURSTWRAP_H           (85),
5772 
                .PKT_BURSTWRAP_L           (79),
5773 
                .PKT_BYTE_CNT_H            (78),
5774 
                .PKT_BYTE_CNT_L            (72),
5775 
                .PKT_ADDR_H                (65),
5776 
                .PKT_ADDR_L                (36),
5777 
                .PKT_TRANS_COMPRESSED_READ (66),
5778 
                .PKT_TRANS_POSTED          (67),
5779 
                .PKT_TRANS_WRITE           (68),
5780 
                .PKT_TRANS_READ            (69),
5781 
                .PKT_DATA_H                (31),
5782 
                .PKT_DATA_L                (0),
5783 
                .PKT_BYTEEN_H              (35),
5784 
                .PKT_BYTEEN_L              (32),
5785 
                .PKT_SRC_ID_H              (99),
5786 
                .PKT_SRC_ID_L              (95),
5787 
                .PKT_DEST_ID_H             (104),
5788 
                .PKT_DEST_ID_L             (100),
5789 
                .PKT_SYMBOL_W              (8),
5790 
                .ST_CHANNEL_W              (22),
5791 
                .ST_DATA_W                 (129),
5792 
                .AVS_BURSTCOUNT_W          (3),
5793 
                .SUPPRESS_0_BYTEEN_CMD     (1),
5794 
                .PREVENT_FIFO_OVERFLOW     (1),
5795 
                .USE_READRESPONSE          (0),
5796 
                .USE_WRITERESPONSE         (0),
5797 
                .ECC_ENABLE                (0)
5798 
        ) timecode_tx_data_s1_agent (
5799 
                .clk                     (clk_0_clk_clk),                                           //             clk.clk
5800 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),          //       clk_reset.reset
5801 
                .m0_address              (timecode_tx_data_s1_agent_m0_address),                    //              m0.address
5802 
                .m0_burstcount           (timecode_tx_data_s1_agent_m0_burstcount),                 //                .burstcount
5803 
                .m0_byteenable           (timecode_tx_data_s1_agent_m0_byteenable),                 //                .byteenable
5804 
                .m0_debugaccess          (timecode_tx_data_s1_agent_m0_debugaccess),                //                .debugaccess
5805 
                .m0_lock                 (timecode_tx_data_s1_agent_m0_lock),                       //                .lock
5806 
                .m0_readdata             (timecode_tx_data_s1_agent_m0_readdata),                   //                .readdata
5807 
                .m0_readdatavalid        (timecode_tx_data_s1_agent_m0_readdatavalid),              //                .readdatavalid
5808 
                .m0_read                 (timecode_tx_data_s1_agent_m0_read),                       //                .read
5809 
                .m0_waitrequest          (timecode_tx_data_s1_agent_m0_waitrequest),                //                .waitrequest
5810 
                .m0_writedata            (timecode_tx_data_s1_agent_m0_writedata),                  //                .writedata
5811 
                .m0_write                (timecode_tx_data_s1_agent_m0_write),                      //                .write
5812 
                .rp_endofpacket          (timecode_tx_data_s1_agent_rp_endofpacket),                //              rp.endofpacket
5813 
                .rp_ready                (timecode_tx_data_s1_agent_rp_ready),                      //                .ready
5814 
                .rp_valid                (timecode_tx_data_s1_agent_rp_valid),                      //                .valid
5815 
                .rp_data                 (timecode_tx_data_s1_agent_rp_data),                       //                .data
5816 
                .rp_startofpacket        (timecode_tx_data_s1_agent_rp_startofpacket),              //                .startofpacket
5817 
                .cp_ready                (timecode_tx_data_s1_burst_adapter_source0_ready),         //              cp.ready
5818 
                .cp_valid                (timecode_tx_data_s1_burst_adapter_source0_valid),         //                .valid
5819 
                .cp_data                 (timecode_tx_data_s1_burst_adapter_source0_data),          //                .data
5820 
                .cp_startofpacket        (timecode_tx_data_s1_burst_adapter_source0_startofpacket), //                .startofpacket
5821 
                .cp_endofpacket          (timecode_tx_data_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
5822 
                .cp_channel              (timecode_tx_data_s1_burst_adapter_source0_channel),       //                .channel
5823 
                .rf_sink_ready           (timecode_tx_data_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
5824 
                .rf_sink_valid           (timecode_tx_data_s1_agent_rsp_fifo_out_valid),            //                .valid
5825 
                .rf_sink_startofpacket   (timecode_tx_data_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
5826 
                .rf_sink_endofpacket     (timecode_tx_data_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
5827 
                .rf_sink_data            (timecode_tx_data_s1_agent_rsp_fifo_out_data),             //                .data
5828 
                .rf_source_ready         (timecode_tx_data_s1_agent_rf_source_ready),               //       rf_source.ready
5829 
                .rf_source_valid         (timecode_tx_data_s1_agent_rf_source_valid),               //                .valid
5830 
                .rf_source_startofpacket (timecode_tx_data_s1_agent_rf_source_startofpacket),       //                .startofpacket
5831 
                .rf_source_endofpacket   (timecode_tx_data_s1_agent_rf_source_endofpacket),         //                .endofpacket
5832 
                .rf_source_data          (timecode_tx_data_s1_agent_rf_source_data),                //                .data
5833 
                .rdata_fifo_sink_ready   (avalon_st_adapter_014_out_0_ready),                       // rdata_fifo_sink.ready
5834 
                .rdata_fifo_sink_valid   (avalon_st_adapter_014_out_0_valid),                       //                .valid
5835 
                .rdata_fifo_sink_data    (avalon_st_adapter_014_out_0_data),                        //                .data
5836 
                .rdata_fifo_sink_error   (avalon_st_adapter_014_out_0_error),                       //                .error
5837 
                .rdata_fifo_src_ready    (timecode_tx_data_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
5838 
                .rdata_fifo_src_valid    (timecode_tx_data_s1_agent_rdata_fifo_src_valid),          //                .valid
5839 
                .rdata_fifo_src_data     (timecode_tx_data_s1_agent_rdata_fifo_src_data),           //                .data
5840 
                .m0_response             (2'b00),                                                   //     (terminated)
5841 
                .m0_writeresponsevalid   (1'b0)                                                     //     (terminated)
5842 
        );
5843 
 
5844 
        altera_avalon_sc_fifo #(
5845 
                .SYMBOLS_PER_BEAT    (1),
5846 
                .BITS_PER_SYMBOL     (130),
5847 
                .FIFO_DEPTH          (2),
5848 
                .CHANNEL_WIDTH       (0),
5849 
                .ERROR_WIDTH         (0),
5850 
                .USE_PACKETS         (1),
5851 
                .USE_FILL_LEVEL      (0),
5852 
                .EMPTY_LATENCY       (1),
5853 
                .USE_MEMORY_BLOCKS   (0),
5854 
                .USE_STORE_FORWARD   (0),
5855 
                .USE_ALMOST_FULL_IF  (0),
5856 
                .USE_ALMOST_EMPTY_IF (0)
5857 
        ) timecode_tx_data_s1_agent_rsp_fifo (
5858 
                .clk               (clk_0_clk_clk),                                        //       clk.clk
5859 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),       // clk_reset.reset
5860 
                .in_data           (timecode_tx_data_s1_agent_rf_source_data),             //        in.data
5861 
                .in_valid          (timecode_tx_data_s1_agent_rf_source_valid),            //          .valid
5862 
                .in_ready          (timecode_tx_data_s1_agent_rf_source_ready),            //          .ready
5863 
                .in_startofpacket  (timecode_tx_data_s1_agent_rf_source_startofpacket),    //          .startofpacket
5864 
                .in_endofpacket    (timecode_tx_data_s1_agent_rf_source_endofpacket),      //          .endofpacket
5865 
                .out_data          (timecode_tx_data_s1_agent_rsp_fifo_out_data),          //       out.data
5866 
                .out_valid         (timecode_tx_data_s1_agent_rsp_fifo_out_valid),         //          .valid
5867 
                .out_ready         (timecode_tx_data_s1_agent_rsp_fifo_out_ready),         //          .ready
5868 
                .out_startofpacket (timecode_tx_data_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
5869 
                .out_endofpacket   (timecode_tx_data_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
5870 
                .csr_address       (2'b00),                                                // (terminated)
5871 
                .csr_read          (1'b0),                                                 // (terminated)
5872 
                .csr_write         (1'b0),                                                 // (terminated)
5873 
                .csr_readdata      (),                                                     // (terminated)
5874 
                .csr_writedata     (32'b00000000000000000000000000000000),                 // (terminated)
5875 
                .almost_full_data  (),                                                     // (terminated)
5876 
                .almost_empty_data (),                                                     // (terminated)
5877 
                .in_empty          (1'b0),                                                 // (terminated)
5878 
                .out_empty         (),                                                     // (terminated)
5879 
                .in_error          (1'b0),                                                 // (terminated)
5880 
                .out_error         (),                                                     // (terminated)
5881 
                .in_channel        (1'b0),                                                 // (terminated)
5882 
                .out_channel       ()                                                      // (terminated)
5883 
        );
5884 
 
5885 
        altera_avalon_sc_fifo #(
5886 
                .SYMBOLS_PER_BEAT    (1),
5887 
                .BITS_PER_SYMBOL     (34),
5888 
                .FIFO_DEPTH          (2),
5889 
                .CHANNEL_WIDTH       (0),
5890 
                .ERROR_WIDTH         (0),
5891 
                .USE_PACKETS         (0),
5892 
                .USE_FILL_LEVEL      (0),
5893 
                .EMPTY_LATENCY       (0),
5894 
                .USE_MEMORY_BLOCKS   (0),
5895 
                .USE_STORE_FORWARD   (0),
5896 
                .USE_ALMOST_FULL_IF  (0),
5897 
                .USE_ALMOST_EMPTY_IF (0)
5898 
        ) timecode_tx_data_s1_agent_rdata_fifo (
5899 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
5900 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
5901 
                .in_data           (timecode_tx_data_s1_agent_rdata_fifo_src_data),  //        in.data
5902 
                .in_valid          (timecode_tx_data_s1_agent_rdata_fifo_src_valid), //          .valid
5903 
                .in_ready          (timecode_tx_data_s1_agent_rdata_fifo_src_ready), //          .ready
5904 
                .out_data          (timecode_tx_data_s1_agent_rdata_fifo_out_data),  //       out.data
5905 
                .out_valid         (timecode_tx_data_s1_agent_rdata_fifo_out_valid), //          .valid
5906 
                .out_ready         (timecode_tx_data_s1_agent_rdata_fifo_out_ready), //          .ready
5907 
                .csr_address       (2'b00),                                          // (terminated)
5908 
                .csr_read          (1'b0),                                           // (terminated)
5909 
                .csr_write         (1'b0),                                           // (terminated)
5910 
                .csr_readdata      (),                                               // (terminated)
5911 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
5912 
                .almost_full_data  (),                                               // (terminated)
5913 
                .almost_empty_data (),                                               // (terminated)
5914 
                .in_startofpacket  (1'b0),                                           // (terminated)
5915 
                .in_endofpacket    (1'b0),                                           // (terminated)
5916 
                .out_startofpacket (),                                               // (terminated)
5917 
                .out_endofpacket   (),                                               // (terminated)
5918 
                .in_empty          (1'b0),                                           // (terminated)
5919 
                .out_empty         (),                                               // (terminated)
5920 
                .in_error          (1'b0),                                           // (terminated)
5921 
                .out_error         (),                                               // (terminated)
5922 
                .in_channel        (1'b0),                                           // (terminated)
5923 
                .out_channel       ()                                                // (terminated)
5924 
        );
5925 
 
5926 
        altera_merlin_slave_agent #(
5927 
                .PKT_ORI_BURST_SIZE_H      (128),
5928 
                .PKT_ORI_BURST_SIZE_L      (126),
5929 
                .PKT_RESPONSE_STATUS_H     (125),
5930 
                .PKT_RESPONSE_STATUS_L     (124),
5931 
                .PKT_BURST_SIZE_H          (88),
5932 
                .PKT_BURST_SIZE_L          (86),
5933 
                .PKT_TRANS_LOCK            (70),
5934 
                .PKT_BEGIN_BURST           (93),
5935 
                .PKT_PROTECTION_H          (119),
5936 
                .PKT_PROTECTION_L          (117),
5937 
                .PKT_BURSTWRAP_H           (85),
5938 
                .PKT_BURSTWRAP_L           (79),
5939 
                .PKT_BYTE_CNT_H            (78),
5940 
                .PKT_BYTE_CNT_L            (72),
5941 
                .PKT_ADDR_H                (65),
5942 
                .PKT_ADDR_L                (36),
5943 
                .PKT_TRANS_COMPRESSED_READ (66),
5944 
                .PKT_TRANS_POSTED          (67),
5945 
                .PKT_TRANS_WRITE           (68),
5946 
                .PKT_TRANS_READ            (69),
5947 
                .PKT_DATA_H                (31),
5948 
                .PKT_DATA_L                (0),
5949 
                .PKT_BYTEEN_H              (35),
5950 
                .PKT_BYTEEN_L              (32),
5951 
                .PKT_SRC_ID_H              (99),
5952 
                .PKT_SRC_ID_L              (95),
5953 
                .PKT_DEST_ID_H             (104),
5954 
                .PKT_DEST_ID_L             (100),
5955 
                .PKT_SYMBOL_W              (8),
5956 
                .ST_CHANNEL_W              (22),
5957 
                .ST_DATA_W                 (129),
5958 
                .AVS_BURSTCOUNT_W          (3),
5959 
                .SUPPRESS_0_BYTEEN_CMD     (1),
5960 
                .PREVENT_FIFO_OVERFLOW     (1),
5961 
                .USE_READRESPONSE          (0),
5962 
                .USE_WRITERESPONSE         (0),
5963 
                .ECC_ENABLE                (0)
5964 
        ) timecode_tx_enable_s1_agent (
5965 
                .clk                     (clk_0_clk_clk),                                             //             clk.clk
5966 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),            //       clk_reset.reset
5967 
                .m0_address              (timecode_tx_enable_s1_agent_m0_address),                    //              m0.address
5968 
                .m0_burstcount           (timecode_tx_enable_s1_agent_m0_burstcount),                 //                .burstcount
5969 
                .m0_byteenable           (timecode_tx_enable_s1_agent_m0_byteenable),                 //                .byteenable
5970 
                .m0_debugaccess          (timecode_tx_enable_s1_agent_m0_debugaccess),                //                .debugaccess
5971 
                .m0_lock                 (timecode_tx_enable_s1_agent_m0_lock),                       //                .lock
5972 
                .m0_readdata             (timecode_tx_enable_s1_agent_m0_readdata),                   //                .readdata
5973 
                .m0_readdatavalid        (timecode_tx_enable_s1_agent_m0_readdatavalid),              //                .readdatavalid
5974 
                .m0_read                 (timecode_tx_enable_s1_agent_m0_read),                       //                .read
5975 
                .m0_waitrequest          (timecode_tx_enable_s1_agent_m0_waitrequest),                //                .waitrequest
5976 
                .m0_writedata            (timecode_tx_enable_s1_agent_m0_writedata),                  //                .writedata
5977 
                .m0_write                (timecode_tx_enable_s1_agent_m0_write),                      //                .write
5978 
                .rp_endofpacket          (timecode_tx_enable_s1_agent_rp_endofpacket),                //              rp.endofpacket
5979 
                .rp_ready                (timecode_tx_enable_s1_agent_rp_ready),                      //                .ready
5980 
                .rp_valid                (timecode_tx_enable_s1_agent_rp_valid),                      //                .valid
5981 
                .rp_data                 (timecode_tx_enable_s1_agent_rp_data),                       //                .data
5982 
                .rp_startofpacket        (timecode_tx_enable_s1_agent_rp_startofpacket),              //                .startofpacket
5983 
                .cp_ready                (timecode_tx_enable_s1_burst_adapter_source0_ready),         //              cp.ready
5984 
                .cp_valid                (timecode_tx_enable_s1_burst_adapter_source0_valid),         //                .valid
5985 
                .cp_data                 (timecode_tx_enable_s1_burst_adapter_source0_data),          //                .data
5986 
                .cp_startofpacket        (timecode_tx_enable_s1_burst_adapter_source0_startofpacket), //                .startofpacket
5987 
                .cp_endofpacket          (timecode_tx_enable_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
5988 
                .cp_channel              (timecode_tx_enable_s1_burst_adapter_source0_channel),       //                .channel
5989 
                .rf_sink_ready           (timecode_tx_enable_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
5990 
                .rf_sink_valid           (timecode_tx_enable_s1_agent_rsp_fifo_out_valid),            //                .valid
5991 
                .rf_sink_startofpacket   (timecode_tx_enable_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
5992 
                .rf_sink_endofpacket     (timecode_tx_enable_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
5993 
                .rf_sink_data            (timecode_tx_enable_s1_agent_rsp_fifo_out_data),             //                .data
5994 
                .rf_source_ready         (timecode_tx_enable_s1_agent_rf_source_ready),               //       rf_source.ready
5995 
                .rf_source_valid         (timecode_tx_enable_s1_agent_rf_source_valid),               //                .valid
5996 
                .rf_source_startofpacket (timecode_tx_enable_s1_agent_rf_source_startofpacket),       //                .startofpacket
5997 
                .rf_source_endofpacket   (timecode_tx_enable_s1_agent_rf_source_endofpacket),         //                .endofpacket
5998 
                .rf_source_data          (timecode_tx_enable_s1_agent_rf_source_data),                //                .data
5999 
                .rdata_fifo_sink_ready   (avalon_st_adapter_015_out_0_ready),                         // rdata_fifo_sink.ready
6000 
                .rdata_fifo_sink_valid   (avalon_st_adapter_015_out_0_valid),                         //                .valid
6001 
                .rdata_fifo_sink_data    (avalon_st_adapter_015_out_0_data),                          //                .data
6002 
                .rdata_fifo_sink_error   (avalon_st_adapter_015_out_0_error),                         //                .error
6003 
                .rdata_fifo_src_ready    (timecode_tx_enable_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
6004 
                .rdata_fifo_src_valid    (timecode_tx_enable_s1_agent_rdata_fifo_src_valid),          //                .valid
6005 
                .rdata_fifo_src_data     (timecode_tx_enable_s1_agent_rdata_fifo_src_data),           //                .data
6006 
                .m0_response             (2'b00),                                                     //     (terminated)
6007 
                .m0_writeresponsevalid   (1'b0)                                                       //     (terminated)
6008 
        );
6009 
 
6010 
        altera_avalon_sc_fifo #(
6011 
                .SYMBOLS_PER_BEAT    (1),
6012 
                .BITS_PER_SYMBOL     (130),
6013 
                .FIFO_DEPTH          (2),
6014 
                .CHANNEL_WIDTH       (0),
6015 
                .ERROR_WIDTH         (0),
6016 
                .USE_PACKETS         (1),
6017 
                .USE_FILL_LEVEL      (0),
6018 
                .EMPTY_LATENCY       (1),
6019 
                .USE_MEMORY_BLOCKS   (0),
6020 
                .USE_STORE_FORWARD   (0),
6021 
                .USE_ALMOST_FULL_IF  (0),
6022 
                .USE_ALMOST_EMPTY_IF (0)
6023 
        ) timecode_tx_enable_s1_agent_rsp_fifo (
6024 
                .clk               (clk_0_clk_clk),                                          //       clk.clk
6025 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),         // clk_reset.reset
6026 
                .in_data           (timecode_tx_enable_s1_agent_rf_source_data),             //        in.data
6027 
                .in_valid          (timecode_tx_enable_s1_agent_rf_source_valid),            //          .valid
6028 
                .in_ready          (timecode_tx_enable_s1_agent_rf_source_ready),            //          .ready
6029 
                .in_startofpacket  (timecode_tx_enable_s1_agent_rf_source_startofpacket),    //          .startofpacket
6030 
                .in_endofpacket    (timecode_tx_enable_s1_agent_rf_source_endofpacket),      //          .endofpacket
6031 
                .out_data          (timecode_tx_enable_s1_agent_rsp_fifo_out_data),          //       out.data
6032 
                .out_valid         (timecode_tx_enable_s1_agent_rsp_fifo_out_valid),         //          .valid
6033 
                .out_ready         (timecode_tx_enable_s1_agent_rsp_fifo_out_ready),         //          .ready
6034 
                .out_startofpacket (timecode_tx_enable_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
6035 
                .out_endofpacket   (timecode_tx_enable_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
6036 
                .csr_address       (2'b00),                                                  // (terminated)
6037 
                .csr_read          (1'b0),                                                   // (terminated)
6038 
                .csr_write         (1'b0),                                                   // (terminated)
6039 
                .csr_readdata      (),                                                       // (terminated)
6040 
                .csr_writedata     (32'b00000000000000000000000000000000),                   // (terminated)
6041 
                .almost_full_data  (),                                                       // (terminated)
6042 
                .almost_empty_data (),                                                       // (terminated)
6043 
                .in_empty          (1'b0),                                                   // (terminated)
6044 
                .out_empty         (),                                                       // (terminated)
6045 
                .in_error          (1'b0),                                                   // (terminated)
6046 
                .out_error         (),                                                       // (terminated)
6047 
                .in_channel        (1'b0),                                                   // (terminated)
6048 
                .out_channel       ()                                                        // (terminated)
6049 
        );
6050 
 
6051 
        altera_avalon_sc_fifo #(
6052 
                .SYMBOLS_PER_BEAT    (1),
6053 
                .BITS_PER_SYMBOL     (34),
6054 
                .FIFO_DEPTH          (2),
6055 
                .CHANNEL_WIDTH       (0),
6056 
                .ERROR_WIDTH         (0),
6057 
                .USE_PACKETS         (0),
6058 
                .USE_FILL_LEVEL      (0),
6059 
                .EMPTY_LATENCY       (0),
6060 
                .USE_MEMORY_BLOCKS   (0),
6061 
                .USE_STORE_FORWARD   (0),
6062 
                .USE_ALMOST_FULL_IF  (0),
6063 
                .USE_ALMOST_EMPTY_IF (0)
6064 
        ) timecode_tx_enable_s1_agent_rdata_fifo (
6065 
                .clk               (clk_0_clk_clk),                                    //       clk.clk
6066 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),   // clk_reset.reset
6067 
                .in_data           (timecode_tx_enable_s1_agent_rdata_fifo_src_data),  //        in.data
6068 
                .in_valid          (timecode_tx_enable_s1_agent_rdata_fifo_src_valid), //          .valid
6069 
                .in_ready          (timecode_tx_enable_s1_agent_rdata_fifo_src_ready), //          .ready
6070 
                .out_data          (timecode_tx_enable_s1_agent_rdata_fifo_out_data),  //       out.data
6071 
                .out_valid         (timecode_tx_enable_s1_agent_rdata_fifo_out_valid), //          .valid
6072 
                .out_ready         (timecode_tx_enable_s1_agent_rdata_fifo_out_ready), //          .ready
6073 
                .csr_address       (2'b00),                                            // (terminated)
6074 
                .csr_read          (1'b0),                                             // (terminated)
6075 
                .csr_write         (1'b0),                                             // (terminated)
6076 
                .csr_readdata      (),                                                 // (terminated)
6077 
                .csr_writedata     (32'b00000000000000000000000000000000),             // (terminated)
6078 
                .almost_full_data  (),                                                 // (terminated)
6079 
                .almost_empty_data (),                                                 // (terminated)
6080 
                .in_startofpacket  (1'b0),                                             // (terminated)
6081 
                .in_endofpacket    (1'b0),                                             // (terminated)
6082 
                .out_startofpacket (),                                                 // (terminated)
6083 
                .out_endofpacket   (),                                                 // (terminated)
6084 
                .in_empty          (1'b0),                                             // (terminated)
6085 
                .out_empty         (),                                                 // (terminated)
6086 
                .in_error          (1'b0),                                             // (terminated)
6087 
                .out_error         (),                                                 // (terminated)
6088 
                .in_channel        (1'b0),                                             // (terminated)
6089 
                .out_channel       ()                                                  // (terminated)
6090 
        );
6091 
 
6092 
        altera_merlin_slave_agent #(
6093 
                .PKT_ORI_BURST_SIZE_H      (128),
6094 
                .PKT_ORI_BURST_SIZE_L      (126),
6095 
                .PKT_RESPONSE_STATUS_H     (125),
6096 
                .PKT_RESPONSE_STATUS_L     (124),
6097 
                .PKT_BURST_SIZE_H          (88),
6098 
                .PKT_BURST_SIZE_L          (86),
6099 
                .PKT_TRANS_LOCK            (70),
6100 
                .PKT_BEGIN_BURST           (93),
6101 
                .PKT_PROTECTION_H          (119),
6102 
                .PKT_PROTECTION_L          (117),
6103 
                .PKT_BURSTWRAP_H           (85),
6104 
                .PKT_BURSTWRAP_L           (79),
6105 
                .PKT_BYTE_CNT_H            (78),
6106 
                .PKT_BYTE_CNT_L            (72),
6107 
                .PKT_ADDR_H                (65),
6108 
                .PKT_ADDR_L                (36),
6109 
                .PKT_TRANS_COMPRESSED_READ (66),
6110 
                .PKT_TRANS_POSTED          (67),
6111 
                .PKT_TRANS_WRITE           (68),
6112 
                .PKT_TRANS_READ            (69),
6113 
                .PKT_DATA_H                (31),
6114 
                .PKT_DATA_L                (0),
6115 
                .PKT_BYTEEN_H              (35),
6116 
                .PKT_BYTEEN_L              (32),
6117 
                .PKT_SRC_ID_H              (99),
6118 
                .PKT_SRC_ID_L              (95),
6119 
                .PKT_DEST_ID_H             (104),
6120 
                .PKT_DEST_ID_L             (100),
6121 
                .PKT_SYMBOL_W              (8),
6122 
                .ST_CHANNEL_W              (22),
6123 
                .ST_DATA_W                 (129),
6124 
                .AVS_BURSTCOUNT_W          (3),
6125 
                .SUPPRESS_0_BYTEEN_CMD     (1),
6126 
                .PREVENT_FIFO_OVERFLOW     (1),
6127 
                .USE_READRESPONSE          (0),
6128 
                .USE_WRITERESPONSE         (0),
6129 
                .ECC_ENABLE                (0)
6130 
        ) timecode_tx_ready_s1_agent (
6131 
                .clk                     (clk_0_clk_clk),                                            //             clk.clk
6132 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),           //       clk_reset.reset
6133 
                .m0_address              (timecode_tx_ready_s1_agent_m0_address),                    //              m0.address
6134 
                .m0_burstcount           (timecode_tx_ready_s1_agent_m0_burstcount),                 //                .burstcount
6135 
                .m0_byteenable           (timecode_tx_ready_s1_agent_m0_byteenable),                 //                .byteenable
6136 
                .m0_debugaccess          (timecode_tx_ready_s1_agent_m0_debugaccess),                //                .debugaccess
6137 
                .m0_lock                 (timecode_tx_ready_s1_agent_m0_lock),                       //                .lock
6138 
                .m0_readdata             (timecode_tx_ready_s1_agent_m0_readdata),                   //                .readdata
6139 
                .m0_readdatavalid        (timecode_tx_ready_s1_agent_m0_readdatavalid),              //                .readdatavalid
6140 
                .m0_read                 (timecode_tx_ready_s1_agent_m0_read),                       //                .read
6141 
                .m0_waitrequest          (timecode_tx_ready_s1_agent_m0_waitrequest),                //                .waitrequest
6142 
                .m0_writedata            (timecode_tx_ready_s1_agent_m0_writedata),                  //                .writedata
6143 
                .m0_write                (timecode_tx_ready_s1_agent_m0_write),                      //                .write
6144 
                .rp_endofpacket          (timecode_tx_ready_s1_agent_rp_endofpacket),                //              rp.endofpacket
6145 
                .rp_ready                (timecode_tx_ready_s1_agent_rp_ready),                      //                .ready
6146 
                .rp_valid                (timecode_tx_ready_s1_agent_rp_valid),                      //                .valid
6147 
                .rp_data                 (timecode_tx_ready_s1_agent_rp_data),                       //                .data
6148 
                .rp_startofpacket        (timecode_tx_ready_s1_agent_rp_startofpacket),              //                .startofpacket
6149 
                .cp_ready                (timecode_tx_ready_s1_burst_adapter_source0_ready),         //              cp.ready
6150 
                .cp_valid                (timecode_tx_ready_s1_burst_adapter_source0_valid),         //                .valid
6151 
                .cp_data                 (timecode_tx_ready_s1_burst_adapter_source0_data),          //                .data
6152 
                .cp_startofpacket        (timecode_tx_ready_s1_burst_adapter_source0_startofpacket), //                .startofpacket
6153 
                .cp_endofpacket          (timecode_tx_ready_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
6154 
                .cp_channel              (timecode_tx_ready_s1_burst_adapter_source0_channel),       //                .channel
6155 
                .rf_sink_ready           (timecode_tx_ready_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
6156 
                .rf_sink_valid           (timecode_tx_ready_s1_agent_rsp_fifo_out_valid),            //                .valid
6157 
                .rf_sink_startofpacket   (timecode_tx_ready_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
6158 
                .rf_sink_endofpacket     (timecode_tx_ready_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
6159 
                .rf_sink_data            (timecode_tx_ready_s1_agent_rsp_fifo_out_data),             //                .data
6160 
                .rf_source_ready         (timecode_tx_ready_s1_agent_rf_source_ready),               //       rf_source.ready
6161 
                .rf_source_valid         (timecode_tx_ready_s1_agent_rf_source_valid),               //                .valid
6162 
                .rf_source_startofpacket (timecode_tx_ready_s1_agent_rf_source_startofpacket),       //                .startofpacket
6163 
                .rf_source_endofpacket   (timecode_tx_ready_s1_agent_rf_source_endofpacket),         //                .endofpacket
6164 
                .rf_source_data          (timecode_tx_ready_s1_agent_rf_source_data),                //                .data
6165 
                .rdata_fifo_sink_ready   (avalon_st_adapter_016_out_0_ready),                        // rdata_fifo_sink.ready
6166 
                .rdata_fifo_sink_valid   (avalon_st_adapter_016_out_0_valid),                        //                .valid
6167 
                .rdata_fifo_sink_data    (avalon_st_adapter_016_out_0_data),                         //                .data
6168 
                .rdata_fifo_sink_error   (avalon_st_adapter_016_out_0_error),                        //                .error
6169 
                .rdata_fifo_src_ready    (timecode_tx_ready_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
6170 
                .rdata_fifo_src_valid    (timecode_tx_ready_s1_agent_rdata_fifo_src_valid),          //                .valid
6171 
                .rdata_fifo_src_data     (timecode_tx_ready_s1_agent_rdata_fifo_src_data),           //                .data
6172 
                .m0_response             (2'b00),                                                    //     (terminated)
6173 
                .m0_writeresponsevalid   (1'b0)                                                      //     (terminated)
6174 
        );
6175 
 
6176 
        altera_avalon_sc_fifo #(
6177 
                .SYMBOLS_PER_BEAT    (1),
6178 
                .BITS_PER_SYMBOL     (130),
6179 
                .FIFO_DEPTH          (2),
6180 
                .CHANNEL_WIDTH       (0),
6181 
                .ERROR_WIDTH         (0),
6182 
                .USE_PACKETS         (1),
6183 
                .USE_FILL_LEVEL      (0),
6184 
                .EMPTY_LATENCY       (1),
6185 
                .USE_MEMORY_BLOCKS   (0),
6186 
                .USE_STORE_FORWARD   (0),
6187 
                .USE_ALMOST_FULL_IF  (0),
6188 
                .USE_ALMOST_EMPTY_IF (0)
6189 
        ) timecode_tx_ready_s1_agent_rsp_fifo (
6190 
                .clk               (clk_0_clk_clk),                                         //       clk.clk
6191 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),        // clk_reset.reset
6192 
                .in_data           (timecode_tx_ready_s1_agent_rf_source_data),             //        in.data
6193 
                .in_valid          (timecode_tx_ready_s1_agent_rf_source_valid),            //          .valid
6194 
                .in_ready          (timecode_tx_ready_s1_agent_rf_source_ready),            //          .ready
6195 
                .in_startofpacket  (timecode_tx_ready_s1_agent_rf_source_startofpacket),    //          .startofpacket
6196 
                .in_endofpacket    (timecode_tx_ready_s1_agent_rf_source_endofpacket),      //          .endofpacket
6197 
                .out_data          (timecode_tx_ready_s1_agent_rsp_fifo_out_data),          //       out.data
6198 
                .out_valid         (timecode_tx_ready_s1_agent_rsp_fifo_out_valid),         //          .valid
6199 
                .out_ready         (timecode_tx_ready_s1_agent_rsp_fifo_out_ready),         //          .ready
6200 
                .out_startofpacket (timecode_tx_ready_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
6201 
                .out_endofpacket   (timecode_tx_ready_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
6202 
                .csr_address       (2'b00),                                                 // (terminated)
6203 
                .csr_read          (1'b0),                                                  // (terminated)
6204 
                .csr_write         (1'b0),                                                  // (terminated)
6205 
                .csr_readdata      (),                                                      // (terminated)
6206 
                .csr_writedata     (32'b00000000000000000000000000000000),                  // (terminated)
6207 
                .almost_full_data  (),                                                      // (terminated)
6208 
                .almost_empty_data (),                                                      // (terminated)
6209 
                .in_empty          (1'b0),                                                  // (terminated)
6210 
                .out_empty         (),                                                      // (terminated)
6211 
                .in_error          (1'b0),                                                  // (terminated)
6212 
                .out_error         (),                                                      // (terminated)
6213 
                .in_channel        (1'b0),                                                  // (terminated)
6214 
                .out_channel       ()                                                       // (terminated)
6215 
        );
6216 
 
6217 
        altera_avalon_sc_fifo #(
6218 
                .SYMBOLS_PER_BEAT    (1),
6219 
                .BITS_PER_SYMBOL     (34),
6220 
                .FIFO_DEPTH          (2),
6221 
                .CHANNEL_WIDTH       (0),
6222 
                .ERROR_WIDTH         (0),
6223 
                .USE_PACKETS         (0),
6224 
                .USE_FILL_LEVEL      (0),
6225 
                .EMPTY_LATENCY       (0),
6226 
                .USE_MEMORY_BLOCKS   (0),
6227 
                .USE_STORE_FORWARD   (0),
6228 
                .USE_ALMOST_FULL_IF  (0),
6229 
                .USE_ALMOST_EMPTY_IF (0)
6230 
        ) timecode_tx_ready_s1_agent_rdata_fifo (
6231 
                .clk               (clk_0_clk_clk),                                   //       clk.clk
6232 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),  // clk_reset.reset
6233 
                .in_data           (timecode_tx_ready_s1_agent_rdata_fifo_src_data),  //        in.data
6234 
                .in_valid          (timecode_tx_ready_s1_agent_rdata_fifo_src_valid), //          .valid
6235 
                .in_ready          (timecode_tx_ready_s1_agent_rdata_fifo_src_ready), //          .ready
6236 
                .out_data          (timecode_tx_ready_s1_agent_rdata_fifo_out_data),  //       out.data
6237 
                .out_valid         (timecode_tx_ready_s1_agent_rdata_fifo_out_valid), //          .valid
6238 
                .out_ready         (timecode_tx_ready_s1_agent_rdata_fifo_out_ready), //          .ready
6239 
                .csr_address       (2'b00),                                           // (terminated)
6240 
                .csr_read          (1'b0),                                            // (terminated)
6241 
                .csr_write         (1'b0),                                            // (terminated)
6242 
                .csr_readdata      (),                                                // (terminated)
6243 
                .csr_writedata     (32'b00000000000000000000000000000000),            // (terminated)
6244 
                .almost_full_data  (),                                                // (terminated)
6245 
                .almost_empty_data (),                                                // (terminated)
6246 
                .in_startofpacket  (1'b0),                                            // (terminated)
6247 
                .in_endofpacket    (1'b0),                                            // (terminated)
6248 
                .out_startofpacket (),                                                // (terminated)
6249 
                .out_endofpacket   (),                                                // (terminated)
6250 
                .in_empty          (1'b0),                                            // (terminated)
6251 
                .out_empty         (),                                                // (terminated)
6252 
                .in_error          (1'b0),                                            // (terminated)
6253 
                .out_error         (),                                                // (terminated)
6254 
                .in_channel        (1'b0),                                            // (terminated)
6255 
                .out_channel       ()                                                 // (terminated)
6256 
        );
6257 
 
6258 
        altera_merlin_slave_agent #(
6259 
                .PKT_ORI_BURST_SIZE_H      (128),
6260 
                .PKT_ORI_BURST_SIZE_L      (126),
6261 
                .PKT_RESPONSE_STATUS_H     (125),
6262 
                .PKT_RESPONSE_STATUS_L     (124),
6263 
                .PKT_BURST_SIZE_H          (88),
6264 
                .PKT_BURST_SIZE_L          (86),
6265 
                .PKT_TRANS_LOCK            (70),
6266 
                .PKT_BEGIN_BURST           (93),
6267 
                .PKT_PROTECTION_H          (119),
6268 
                .PKT_PROTECTION_L          (117),
6269 
                .PKT_BURSTWRAP_H           (85),
6270 
                .PKT_BURSTWRAP_L           (79),
6271 
                .PKT_BYTE_CNT_H            (78),
6272 
                .PKT_BYTE_CNT_L            (72),
6273 
                .PKT_ADDR_H                (65),
6274 
                .PKT_ADDR_L                (36),
6275 
                .PKT_TRANS_COMPRESSED_READ (66),
6276 
                .PKT_TRANS_POSTED          (67),
6277 
                .PKT_TRANS_WRITE           (68),
6278 
                .PKT_TRANS_READ            (69),
6279 
                .PKT_DATA_H                (31),
6280 
                .PKT_DATA_L                (0),
6281 
                .PKT_BYTEEN_H              (35),
6282 
                .PKT_BYTEEN_L              (32),
6283 
                .PKT_SRC_ID_H              (99),
6284 
                .PKT_SRC_ID_L              (95),
6285 
                .PKT_DEST_ID_H             (104),
6286 
                .PKT_DEST_ID_L             (100),
6287 
                .PKT_SYMBOL_W              (8),
6288 
                .ST_CHANNEL_W              (22),
6289 
                .ST_DATA_W                 (129),
6290 
                .AVS_BURSTCOUNT_W          (3),
6291 
                .SUPPRESS_0_BYTEEN_CMD     (1),
6292 
                .PREVENT_FIFO_OVERFLOW     (1),
6293 
                .USE_READRESPONSE          (0),
6294 
                .USE_WRITERESPONSE         (0),
6295 
                .ECC_ENABLE                (0)
6296 
        ) data_info_s1_agent (
6297 
                .clk                     (clk_0_clk_clk),                                    //             clk.clk
6298 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),   //       clk_reset.reset
6299 
                .m0_address              (data_info_s1_agent_m0_address),                    //              m0.address
6300 
                .m0_burstcount           (data_info_s1_agent_m0_burstcount),                 //                .burstcount
6301 
                .m0_byteenable           (data_info_s1_agent_m0_byteenable),                 //                .byteenable
6302 
                .m0_debugaccess          (data_info_s1_agent_m0_debugaccess),                //                .debugaccess
6303 
                .m0_lock                 (data_info_s1_agent_m0_lock),                       //                .lock
6304 
                .m0_readdata             (data_info_s1_agent_m0_readdata),                   //                .readdata
6305 
                .m0_readdatavalid        (data_info_s1_agent_m0_readdatavalid),              //                .readdatavalid
6306 
                .m0_read                 (data_info_s1_agent_m0_read),                       //                .read
6307 
                .m0_waitrequest          (data_info_s1_agent_m0_waitrequest),                //                .waitrequest
6308 
                .m0_writedata            (data_info_s1_agent_m0_writedata),                  //                .writedata
6309 
                .m0_write                (data_info_s1_agent_m0_write),                      //                .write
6310 
                .rp_endofpacket          (data_info_s1_agent_rp_endofpacket),                //              rp.endofpacket
6311 
                .rp_ready                (data_info_s1_agent_rp_ready),                      //                .ready
6312 
                .rp_valid                (data_info_s1_agent_rp_valid),                      //                .valid
6313 
                .rp_data                 (data_info_s1_agent_rp_data),                       //                .data
6314 
                .rp_startofpacket        (data_info_s1_agent_rp_startofpacket),              //                .startofpacket
6315 
                .cp_ready                (data_info_s1_burst_adapter_source0_ready),         //              cp.ready
6316 
                .cp_valid                (data_info_s1_burst_adapter_source0_valid),         //                .valid
6317 
                .cp_data                 (data_info_s1_burst_adapter_source0_data),          //                .data
6318 
                .cp_startofpacket        (data_info_s1_burst_adapter_source0_startofpacket), //                .startofpacket
6319 
                .cp_endofpacket          (data_info_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
6320 
                .cp_channel              (data_info_s1_burst_adapter_source0_channel),       //                .channel
6321 
                .rf_sink_ready           (data_info_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
6322 
                .rf_sink_valid           (data_info_s1_agent_rsp_fifo_out_valid),            //                .valid
6323 
                .rf_sink_startofpacket   (data_info_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
6324 
                .rf_sink_endofpacket     (data_info_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
6325 
                .rf_sink_data            (data_info_s1_agent_rsp_fifo_out_data),             //                .data
6326 
                .rf_source_ready         (data_info_s1_agent_rf_source_ready),               //       rf_source.ready
6327 
                .rf_source_valid         (data_info_s1_agent_rf_source_valid),               //                .valid
6328 
                .rf_source_startofpacket (data_info_s1_agent_rf_source_startofpacket),       //                .startofpacket
6329 
                .rf_source_endofpacket   (data_info_s1_agent_rf_source_endofpacket),         //                .endofpacket
6330 
                .rf_source_data          (data_info_s1_agent_rf_source_data),                //                .data
6331 
                .rdata_fifo_sink_ready   (avalon_st_adapter_017_out_0_ready),                // rdata_fifo_sink.ready
6332 
                .rdata_fifo_sink_valid   (avalon_st_adapter_017_out_0_valid),                //                .valid
6333 
                .rdata_fifo_sink_data    (avalon_st_adapter_017_out_0_data),                 //                .data
6334 
                .rdata_fifo_sink_error   (avalon_st_adapter_017_out_0_error),                //                .error
6335 
                .rdata_fifo_src_ready    (data_info_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
6336 
                .rdata_fifo_src_valid    (data_info_s1_agent_rdata_fifo_src_valid),          //                .valid
6337 
                .rdata_fifo_src_data     (data_info_s1_agent_rdata_fifo_src_data),           //                .data
6338 
                .m0_response             (2'b00),                                            //     (terminated)
6339 
                .m0_writeresponsevalid   (1'b0)                                              //     (terminated)
6340 
        );
6341 
 
6342 
        altera_avalon_sc_fifo #(
6343 
                .SYMBOLS_PER_BEAT    (1),
6344 
                .BITS_PER_SYMBOL     (130),
6345 
                .FIFO_DEPTH          (2),
6346 
                .CHANNEL_WIDTH       (0),
6347 
                .ERROR_WIDTH         (0),
6348 
                .USE_PACKETS         (1),
6349 
                .USE_FILL_LEVEL      (0),
6350 
                .EMPTY_LATENCY       (1),
6351 
                .USE_MEMORY_BLOCKS   (0),
6352 
                .USE_STORE_FORWARD   (0),
6353 
                .USE_ALMOST_FULL_IF  (0),
6354 
                .USE_ALMOST_EMPTY_IF (0)
6355 
        ) data_info_s1_agent_rsp_fifo (
6356 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
6357 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
6358 
                .in_data           (data_info_s1_agent_rf_source_data),              //        in.data
6359 
                .in_valid          (data_info_s1_agent_rf_source_valid),             //          .valid
6360 
                .in_ready          (data_info_s1_agent_rf_source_ready),             //          .ready
6361 
                .in_startofpacket  (data_info_s1_agent_rf_source_startofpacket),     //          .startofpacket
6362 
                .in_endofpacket    (data_info_s1_agent_rf_source_endofpacket),       //          .endofpacket
6363 
                .out_data          (data_info_s1_agent_rsp_fifo_out_data),           //       out.data
6364 
                .out_valid         (data_info_s1_agent_rsp_fifo_out_valid),          //          .valid
6365 
                .out_ready         (data_info_s1_agent_rsp_fifo_out_ready),          //          .ready
6366 
                .out_startofpacket (data_info_s1_agent_rsp_fifo_out_startofpacket),  //          .startofpacket
6367 
                .out_endofpacket   (data_info_s1_agent_rsp_fifo_out_endofpacket),    //          .endofpacket
6368 
                .csr_address       (2'b00),                                          // (terminated)
6369 
                .csr_read          (1'b0),                                           // (terminated)
6370 
                .csr_write         (1'b0),                                           // (terminated)
6371 
                .csr_readdata      (),                                               // (terminated)
6372 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
6373 
                .almost_full_data  (),                                               // (terminated)
6374 
                .almost_empty_data (),                                               // (terminated)
6375 
                .in_empty          (1'b0),                                           // (terminated)
6376 
                .out_empty         (),                                               // (terminated)
6377 
                .in_error          (1'b0),                                           // (terminated)
6378 
                .out_error         (),                                               // (terminated)
6379 
                .in_channel        (1'b0),                                           // (terminated)
6380 
                .out_channel       ()                                                // (terminated)
6381 
        );
6382 
 
6383 
        altera_avalon_sc_fifo #(
6384 
                .SYMBOLS_PER_BEAT    (1),
6385 
                .BITS_PER_SYMBOL     (34),
6386 
                .FIFO_DEPTH          (2),
6387 
                .CHANNEL_WIDTH       (0),
6388 
                .ERROR_WIDTH         (0),
6389 
                .USE_PACKETS         (0),
6390 
                .USE_FILL_LEVEL      (0),
6391 
                .EMPTY_LATENCY       (0),
6392 
                .USE_MEMORY_BLOCKS   (0),
6393 
                .USE_STORE_FORWARD   (0),
6394 
                .USE_ALMOST_FULL_IF  (0),
6395 
                .USE_ALMOST_EMPTY_IF (0)
6396 
        ) data_info_s1_agent_rdata_fifo (
6397 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
6398 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
6399 
                .in_data           (data_info_s1_agent_rdata_fifo_src_data),         //        in.data
6400 
                .in_valid          (data_info_s1_agent_rdata_fifo_src_valid),        //          .valid
6401 
                .in_ready          (data_info_s1_agent_rdata_fifo_src_ready),        //          .ready
6402 
                .out_data          (data_info_s1_agent_rdata_fifo_out_data),         //       out.data
6403 
                .out_valid         (data_info_s1_agent_rdata_fifo_out_valid),        //          .valid
6404 
                .out_ready         (data_info_s1_agent_rdata_fifo_out_ready),        //          .ready
6405 
                .csr_address       (2'b00),                                          // (terminated)
6406 
                .csr_read          (1'b0),                                           // (terminated)
6407 
                .csr_write         (1'b0),                                           // (terminated)
6408 
                .csr_readdata      (),                                               // (terminated)
6409 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
6410 
                .almost_full_data  (),                                               // (terminated)
6411 
                .almost_empty_data (),                                               // (terminated)
6412 
                .in_startofpacket  (1'b0),                                           // (terminated)
6413 
                .in_endofpacket    (1'b0),                                           // (terminated)
6414 
                .out_startofpacket (),                                               // (terminated)
6415 
                .out_endofpacket   (),                                               // (terminated)
6416 
                .in_empty          (1'b0),                                           // (terminated)
6417 
                .out_empty         (),                                               // (terminated)
6418 
                .in_error          (1'b0),                                           // (terminated)
6419 
                .out_error         (),                                               // (terminated)
6420 
                .in_channel        (1'b0),                                           // (terminated)
6421 
                .out_channel       ()                                                // (terminated)
6422 
        );
6423 
 
6424 
        altera_merlin_slave_agent #(
6425 
                .PKT_ORI_BURST_SIZE_H      (128),
6426 
                .PKT_ORI_BURST_SIZE_L      (126),
6427 
                .PKT_RESPONSE_STATUS_H     (125),
6428 
                .PKT_RESPONSE_STATUS_L     (124),
6429 
                .PKT_BURST_SIZE_H          (88),
6430 
                .PKT_BURST_SIZE_L          (86),
6431 
                .PKT_TRANS_LOCK            (70),
6432 
                .PKT_BEGIN_BURST           (93),
6433 
                .PKT_PROTECTION_H          (119),
6434 
                .PKT_PROTECTION_L          (117),
6435 
                .PKT_BURSTWRAP_H           (85),
6436 
                .PKT_BURSTWRAP_L           (79),
6437 
                .PKT_BYTE_CNT_H            (78),
6438 
                .PKT_BYTE_CNT_L            (72),
6439 
                .PKT_ADDR_H                (65),
6440 
                .PKT_ADDR_L                (36),
6441 
                .PKT_TRANS_COMPRESSED_READ (66),
6442 
                .PKT_TRANS_POSTED          (67),
6443 
                .PKT_TRANS_WRITE           (68),
6444 
                .PKT_TRANS_READ            (69),
6445 
                .PKT_DATA_H                (31),
6446 
                .PKT_DATA_L                (0),
6447 
                .PKT_BYTEEN_H              (35),
6448 
                .PKT_BYTEEN_L              (32),
6449 
                .PKT_SRC_ID_H              (99),
6450 
                .PKT_SRC_ID_L              (95),
6451 
                .PKT_DEST_ID_H             (104),
6452 
                .PKT_DEST_ID_L             (100),
6453 
                .PKT_SYMBOL_W              (8),
6454 
                .ST_CHANNEL_W              (22),
6455 
                .ST_DATA_W                 (129),
6456 
                .AVS_BURSTCOUNT_W          (3),
6457 
                .SUPPRESS_0_BYTEEN_CMD     (1),
6458 
                .PREVENT_FIFO_OVERFLOW     (1),
6459 
                .USE_READRESPONSE          (0),
6460 
                .USE_WRITERESPONSE         (0),
6461 
                .ECC_ENABLE                (0)
6462 
        ) clock_sel_s1_agent (
6463 
                .clk                     (clk_0_clk_clk),                                    //             clk.clk
6464 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),   //       clk_reset.reset
6465 
                .m0_address              (clock_sel_s1_agent_m0_address),                    //              m0.address
6466 
                .m0_burstcount           (clock_sel_s1_agent_m0_burstcount),                 //                .burstcount
6467 
                .m0_byteenable           (clock_sel_s1_agent_m0_byteenable),                 //                .byteenable
6468 
                .m0_debugaccess          (clock_sel_s1_agent_m0_debugaccess),                //                .debugaccess
6469 
                .m0_lock                 (clock_sel_s1_agent_m0_lock),                       //                .lock
6470 
                .m0_readdata             (clock_sel_s1_agent_m0_readdata),                   //                .readdata
6471 
                .m0_readdatavalid        (clock_sel_s1_agent_m0_readdatavalid),              //                .readdatavalid
6472 
                .m0_read                 (clock_sel_s1_agent_m0_read),                       //                .read
6473 
                .m0_waitrequest          (clock_sel_s1_agent_m0_waitrequest),                //                .waitrequest
6474 
                .m0_writedata            (clock_sel_s1_agent_m0_writedata),                  //                .writedata
6475 
                .m0_write                (clock_sel_s1_agent_m0_write),                      //                .write
6476 
                .rp_endofpacket          (clock_sel_s1_agent_rp_endofpacket),                //              rp.endofpacket
6477 
                .rp_ready                (clock_sel_s1_agent_rp_ready),                      //                .ready
6478 
                .rp_valid                (clock_sel_s1_agent_rp_valid),                      //                .valid
6479 
                .rp_data                 (clock_sel_s1_agent_rp_data),                       //                .data
6480 
                .rp_startofpacket        (clock_sel_s1_agent_rp_startofpacket),              //                .startofpacket
6481 
                .cp_ready                (clock_sel_s1_burst_adapter_source0_ready),         //              cp.ready
6482 
                .cp_valid                (clock_sel_s1_burst_adapter_source0_valid),         //                .valid
6483 
                .cp_data                 (clock_sel_s1_burst_adapter_source0_data),          //                .data
6484 
                .cp_startofpacket        (clock_sel_s1_burst_adapter_source0_startofpacket), //                .startofpacket
6485 
                .cp_endofpacket          (clock_sel_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
6486 
                .cp_channel              (clock_sel_s1_burst_adapter_source0_channel),       //                .channel
6487 
                .rf_sink_ready           (clock_sel_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
6488 
                .rf_sink_valid           (clock_sel_s1_agent_rsp_fifo_out_valid),            //                .valid
6489 
                .rf_sink_startofpacket   (clock_sel_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
6490 
                .rf_sink_endofpacket     (clock_sel_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
6491 
                .rf_sink_data            (clock_sel_s1_agent_rsp_fifo_out_data),             //                .data
6492 
                .rf_source_ready         (clock_sel_s1_agent_rf_source_ready),               //       rf_source.ready
6493 
                .rf_source_valid         (clock_sel_s1_agent_rf_source_valid),               //                .valid
6494 
                .rf_source_startofpacket (clock_sel_s1_agent_rf_source_startofpacket),       //                .startofpacket
6495 
                .rf_source_endofpacket   (clock_sel_s1_agent_rf_source_endofpacket),         //                .endofpacket
6496 
                .rf_source_data          (clock_sel_s1_agent_rf_source_data),                //                .data
6497 
                .rdata_fifo_sink_ready   (avalon_st_adapter_018_out_0_ready),                // rdata_fifo_sink.ready
6498 
                .rdata_fifo_sink_valid   (avalon_st_adapter_018_out_0_valid),                //                .valid
6499 
                .rdata_fifo_sink_data    (avalon_st_adapter_018_out_0_data),                 //                .data
6500 
                .rdata_fifo_sink_error   (avalon_st_adapter_018_out_0_error),                //                .error
6501 
                .rdata_fifo_src_ready    (clock_sel_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
6502 
                .rdata_fifo_src_valid    (clock_sel_s1_agent_rdata_fifo_src_valid),          //                .valid
6503 
                .rdata_fifo_src_data     (clock_sel_s1_agent_rdata_fifo_src_data),           //                .data
6504 
                .m0_response             (2'b00),                                            //     (terminated)
6505 
                .m0_writeresponsevalid   (1'b0)                                              //     (terminated)
6506 
        );
6507 
 
6508 
        altera_avalon_sc_fifo #(
6509 
                .SYMBOLS_PER_BEAT    (1),
6510 
                .BITS_PER_SYMBOL     (130),
6511 
                .FIFO_DEPTH          (2),
6512 
                .CHANNEL_WIDTH       (0),
6513 
                .ERROR_WIDTH         (0),
6514 
                .USE_PACKETS         (1),
6515 
                .USE_FILL_LEVEL      (0),
6516 
                .EMPTY_LATENCY       (1),
6517 
                .USE_MEMORY_BLOCKS   (0),
6518 
                .USE_STORE_FORWARD   (0),
6519 
                .USE_ALMOST_FULL_IF  (0),
6520 
                .USE_ALMOST_EMPTY_IF (0)
6521 
        ) clock_sel_s1_agent_rsp_fifo (
6522 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
6523 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
6524 
                .in_data           (clock_sel_s1_agent_rf_source_data),              //        in.data
6525 
                .in_valid          (clock_sel_s1_agent_rf_source_valid),             //          .valid
6526 
                .in_ready          (clock_sel_s1_agent_rf_source_ready),             //          .ready
6527 
                .in_startofpacket  (clock_sel_s1_agent_rf_source_startofpacket),     //          .startofpacket
6528 
                .in_endofpacket    (clock_sel_s1_agent_rf_source_endofpacket),       //          .endofpacket
6529 
                .out_data          (clock_sel_s1_agent_rsp_fifo_out_data),           //       out.data
6530 
                .out_valid         (clock_sel_s1_agent_rsp_fifo_out_valid),          //          .valid
6531 
                .out_ready         (clock_sel_s1_agent_rsp_fifo_out_ready),          //          .ready
6532 
                .out_startofpacket (clock_sel_s1_agent_rsp_fifo_out_startofpacket),  //          .startofpacket
6533 
                .out_endofpacket   (clock_sel_s1_agent_rsp_fifo_out_endofpacket),    //          .endofpacket
6534 
                .csr_address       (2'b00),                                          // (terminated)
6535 
                .csr_read          (1'b0),                                           // (terminated)
6536 
                .csr_write         (1'b0),                                           // (terminated)
6537 
                .csr_readdata      (),                                               // (terminated)
6538 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
6539 
                .almost_full_data  (),                                               // (terminated)
6540 
                .almost_empty_data (),                                               // (terminated)
6541 
                .in_empty          (1'b0),                                           // (terminated)
6542 
                .out_empty         (),                                               // (terminated)
6543 
                .in_error          (1'b0),                                           // (terminated)
6544 
                .out_error         (),                                               // (terminated)
6545 
                .in_channel        (1'b0),                                           // (terminated)
6546 
                .out_channel       ()                                                // (terminated)
6547 
        );
6548 
 
6549 
        altera_avalon_sc_fifo #(
6550 
                .SYMBOLS_PER_BEAT    (1),
6551 
                .BITS_PER_SYMBOL     (34),
6552 
                .FIFO_DEPTH          (2),
6553 
                .CHANNEL_WIDTH       (0),
6554 
                .ERROR_WIDTH         (0),
6555 
                .USE_PACKETS         (0),
6556 
                .USE_FILL_LEVEL      (0),
6557 
                .EMPTY_LATENCY       (0),
6558 
                .USE_MEMORY_BLOCKS   (0),
6559 
                .USE_STORE_FORWARD   (0),
6560 
                .USE_ALMOST_FULL_IF  (0),
6561 
                .USE_ALMOST_EMPTY_IF (0)
6562 
        ) clock_sel_s1_agent_rdata_fifo (
6563 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
6564 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
6565 
                .in_data           (clock_sel_s1_agent_rdata_fifo_src_data),         //        in.data
6566 
                .in_valid          (clock_sel_s1_agent_rdata_fifo_src_valid),        //          .valid
6567 
                .in_ready          (clock_sel_s1_agent_rdata_fifo_src_ready),        //          .ready
6568 
                .out_data          (clock_sel_s1_agent_rdata_fifo_out_data),         //       out.data
6569 
                .out_valid         (clock_sel_s1_agent_rdata_fifo_out_valid),        //          .valid
6570 
                .out_ready         (clock_sel_s1_agent_rdata_fifo_out_ready),        //          .ready
6571 
                .csr_address       (2'b00),                                          // (terminated)
6572 
                .csr_read          (1'b0),                                           // (terminated)
6573 
                .csr_write         (1'b0),                                           // (terminated)
6574 
                .csr_readdata      (),                                               // (terminated)
6575 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
6576 
                .almost_full_data  (),                                               // (terminated)
6577 
                .almost_empty_data (),                                               // (terminated)
6578 
                .in_startofpacket  (1'b0),                                           // (terminated)
6579 
                .in_endofpacket    (1'b0),                                           // (terminated)
6580 
                .out_startofpacket (),                                               // (terminated)
6581 
                .out_endofpacket   (),                                               // (terminated)
6582 
                .in_empty          (1'b0),                                           // (terminated)
6583 
                .out_empty         (),                                               // (terminated)
6584 
                .in_error          (1'b0),                                           // (terminated)
6585 
                .out_error         (),                                               // (terminated)
6586 
                .in_channel        (1'b0),                                           // (terminated)
6587 
                .out_channel       ()                                                // (terminated)
6588 
        );
6589 
 
6590 
        altera_merlin_slave_agent #(
6591 
                .PKT_ORI_BURST_SIZE_H      (128),
6592 
                .PKT_ORI_BURST_SIZE_L      (126),
6593 
                .PKT_RESPONSE_STATUS_H     (125),
6594 
                .PKT_RESPONSE_STATUS_L     (124),
6595 
                .PKT_BURST_SIZE_H          (88),
6596 
                .PKT_BURST_SIZE_L          (86),
6597 
                .PKT_TRANS_LOCK            (70),
6598 
                .PKT_BEGIN_BURST           (93),
6599 
                .PKT_PROTECTION_H          (119),
6600 
                .PKT_PROTECTION_L          (117),
6601 
                .PKT_BURSTWRAP_H           (85),
6602 
                .PKT_BURSTWRAP_L           (79),
6603 
                .PKT_BYTE_CNT_H            (78),
6604 
                .PKT_BYTE_CNT_L            (72),
6605 
                .PKT_ADDR_H                (65),
6606 
                .PKT_ADDR_L                (36),
6607 
                .PKT_TRANS_COMPRESSED_READ (66),
6608 
                .PKT_TRANS_POSTED          (67),
6609 
                .PKT_TRANS_WRITE           (68),
6610 
                .PKT_TRANS_READ            (69),
6611 
                .PKT_DATA_H                (31),
6612 
                .PKT_DATA_L                (0),
6613 
                .PKT_BYTEEN_H              (35),
6614 
                .PKT_BYTEEN_L              (32),
6615 
                .PKT_SRC_ID_H              (99),
6616 
                .PKT_SRC_ID_L              (95),
6617 
                .PKT_DEST_ID_H             (104),
6618 
                .PKT_DEST_ID_L             (100),
6619 
                .PKT_SYMBOL_W              (8),
6620 
                .ST_CHANNEL_W              (22),
6621 
                .ST_DATA_W                 (129),
6622 
                .AVS_BURSTCOUNT_W          (3),
6623 
                .SUPPRESS_0_BYTEEN_CMD     (1),
6624 
                .PREVENT_FIFO_OVERFLOW     (1),
6625 
                .USE_READRESPONSE          (0),
6626 
                .USE_WRITERESPONSE         (0),
6627 
                .ECC_ENABLE                (0)
6628 
        ) fsm_info_s1_agent (
6629 
                .clk                     (clk_0_clk_clk),                                   //             clk.clk
6630 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),  //       clk_reset.reset
6631 
                .m0_address              (fsm_info_s1_agent_m0_address),                    //              m0.address
6632 
                .m0_burstcount           (fsm_info_s1_agent_m0_burstcount),                 //                .burstcount
6633 
                .m0_byteenable           (fsm_info_s1_agent_m0_byteenable),                 //                .byteenable
6634 
                .m0_debugaccess          (fsm_info_s1_agent_m0_debugaccess),                //                .debugaccess
6635 
                .m0_lock                 (fsm_info_s1_agent_m0_lock),                       //                .lock
6636 
                .m0_readdata             (fsm_info_s1_agent_m0_readdata),                   //                .readdata
6637 
                .m0_readdatavalid        (fsm_info_s1_agent_m0_readdatavalid),              //                .readdatavalid
6638 
                .m0_read                 (fsm_info_s1_agent_m0_read),                       //                .read
6639 
                .m0_waitrequest          (fsm_info_s1_agent_m0_waitrequest),                //                .waitrequest
6640 
                .m0_writedata            (fsm_info_s1_agent_m0_writedata),                  //                .writedata
6641 
                .m0_write                (fsm_info_s1_agent_m0_write),                      //                .write
6642 
                .rp_endofpacket          (fsm_info_s1_agent_rp_endofpacket),                //              rp.endofpacket
6643 
                .rp_ready                (fsm_info_s1_agent_rp_ready),                      //                .ready
6644 
                .rp_valid                (fsm_info_s1_agent_rp_valid),                      //                .valid
6645 
                .rp_data                 (fsm_info_s1_agent_rp_data),                       //                .data
6646 
                .rp_startofpacket        (fsm_info_s1_agent_rp_startofpacket),              //                .startofpacket
6647 
                .cp_ready                (fsm_info_s1_burst_adapter_source0_ready),         //              cp.ready
6648 
                .cp_valid                (fsm_info_s1_burst_adapter_source0_valid),         //                .valid
6649 
                .cp_data                 (fsm_info_s1_burst_adapter_source0_data),          //                .data
6650 
                .cp_startofpacket        (fsm_info_s1_burst_adapter_source0_startofpacket), //                .startofpacket
6651 
                .cp_endofpacket          (fsm_info_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
6652 
                .cp_channel              (fsm_info_s1_burst_adapter_source0_channel),       //                .channel
6653 
                .rf_sink_ready           (fsm_info_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
6654 
                .rf_sink_valid           (fsm_info_s1_agent_rsp_fifo_out_valid),            //                .valid
6655 
                .rf_sink_startofpacket   (fsm_info_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
6656 
                .rf_sink_endofpacket     (fsm_info_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
6657 
                .rf_sink_data            (fsm_info_s1_agent_rsp_fifo_out_data),             //                .data
6658 
                .rf_source_ready         (fsm_info_s1_agent_rf_source_ready),               //       rf_source.ready
6659 
                .rf_source_valid         (fsm_info_s1_agent_rf_source_valid),               //                .valid
6660 
                .rf_source_startofpacket (fsm_info_s1_agent_rf_source_startofpacket),       //                .startofpacket
6661 
                .rf_source_endofpacket   (fsm_info_s1_agent_rf_source_endofpacket),         //                .endofpacket
6662 
                .rf_source_data          (fsm_info_s1_agent_rf_source_data),                //                .data
6663 
                .rdata_fifo_sink_ready   (avalon_st_adapter_019_out_0_ready),               // rdata_fifo_sink.ready
6664 
                .rdata_fifo_sink_valid   (avalon_st_adapter_019_out_0_valid),               //                .valid
6665 
                .rdata_fifo_sink_data    (avalon_st_adapter_019_out_0_data),                //                .data
6666 
                .rdata_fifo_sink_error   (avalon_st_adapter_019_out_0_error),               //                .error
6667 
                .rdata_fifo_src_ready    (fsm_info_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
6668 
                .rdata_fifo_src_valid    (fsm_info_s1_agent_rdata_fifo_src_valid),          //                .valid
6669 
                .rdata_fifo_src_data     (fsm_info_s1_agent_rdata_fifo_src_data),           //                .data
6670 
                .m0_response             (2'b00),                                           //     (terminated)
6671 
                .m0_writeresponsevalid   (1'b0)                                             //     (terminated)
6672 
        );
6673 
 
6674 
        altera_avalon_sc_fifo #(
6675 
                .SYMBOLS_PER_BEAT    (1),
6676 
                .BITS_PER_SYMBOL     (130),
6677 
                .FIFO_DEPTH          (2),
6678 
                .CHANNEL_WIDTH       (0),
6679 
                .ERROR_WIDTH         (0),
6680 
                .USE_PACKETS         (1),
6681 
                .USE_FILL_LEVEL      (0),
6682 
                .EMPTY_LATENCY       (1),
6683 
                .USE_MEMORY_BLOCKS   (0),
6684 
                .USE_STORE_FORWARD   (0),
6685 
                .USE_ALMOST_FULL_IF  (0),
6686 
                .USE_ALMOST_EMPTY_IF (0)
6687 
        ) fsm_info_s1_agent_rsp_fifo (
6688 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
6689 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
6690 
                .in_data           (fsm_info_s1_agent_rf_source_data),               //        in.data
6691 
                .in_valid          (fsm_info_s1_agent_rf_source_valid),              //          .valid
6692 
                .in_ready          (fsm_info_s1_agent_rf_source_ready),              //          .ready
6693 
                .in_startofpacket  (fsm_info_s1_agent_rf_source_startofpacket),      //          .startofpacket
6694 
                .in_endofpacket    (fsm_info_s1_agent_rf_source_endofpacket),        //          .endofpacket
6695 
                .out_data          (fsm_info_s1_agent_rsp_fifo_out_data),            //       out.data
6696 
                .out_valid         (fsm_info_s1_agent_rsp_fifo_out_valid),           //          .valid
6697 
                .out_ready         (fsm_info_s1_agent_rsp_fifo_out_ready),           //          .ready
6698 
                .out_startofpacket (fsm_info_s1_agent_rsp_fifo_out_startofpacket),   //          .startofpacket
6699 
                .out_endofpacket   (fsm_info_s1_agent_rsp_fifo_out_endofpacket),     //          .endofpacket
6700 
                .csr_address       (2'b00),                                          // (terminated)
6701 
                .csr_read          (1'b0),                                           // (terminated)
6702 
                .csr_write         (1'b0),                                           // (terminated)
6703 
                .csr_readdata      (),                                               // (terminated)
6704 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
6705 
                .almost_full_data  (),                                               // (terminated)
6706 
                .almost_empty_data (),                                               // (terminated)
6707 
                .in_empty          (1'b0),                                           // (terminated)
6708 
                .out_empty         (),                                               // (terminated)
6709 
                .in_error          (1'b0),                                           // (terminated)
6710 
                .out_error         (),                                               // (terminated)
6711 
                .in_channel        (1'b0),                                           // (terminated)
6712 
                .out_channel       ()                                                // (terminated)
6713 
        );
6714 
 
6715 
        altera_avalon_sc_fifo #(
6716 
                .SYMBOLS_PER_BEAT    (1),
6717 
                .BITS_PER_SYMBOL     (34),
6718 
                .FIFO_DEPTH          (2),
6719 
                .CHANNEL_WIDTH       (0),
6720 
                .ERROR_WIDTH         (0),
6721 
                .USE_PACKETS         (0),
6722 
                .USE_FILL_LEVEL      (0),
6723 
                .EMPTY_LATENCY       (0),
6724 
                .USE_MEMORY_BLOCKS   (0),
6725 
                .USE_STORE_FORWARD   (0),
6726 
                .USE_ALMOST_FULL_IF  (0),
6727 
                .USE_ALMOST_EMPTY_IF (0)
6728 
        ) fsm_info_s1_agent_rdata_fifo (
6729 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
6730 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
6731 
                .in_data           (fsm_info_s1_agent_rdata_fifo_src_data),          //        in.data
6732 
                .in_valid          (fsm_info_s1_agent_rdata_fifo_src_valid),         //          .valid
6733 
                .in_ready          (fsm_info_s1_agent_rdata_fifo_src_ready),         //          .ready
6734 
                .out_data          (fsm_info_s1_agent_rdata_fifo_out_data),          //       out.data
6735 
                .out_valid         (fsm_info_s1_agent_rdata_fifo_out_valid),         //          .valid
6736 
                .out_ready         (fsm_info_s1_agent_rdata_fifo_out_ready),         //          .ready
6737 
                .csr_address       (2'b00),                                          // (terminated)
6738 
                .csr_read          (1'b0),                                           // (terminated)
6739 
                .csr_write         (1'b0),                                           // (terminated)
6740 
                .csr_readdata      (),                                               // (terminated)
6741 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
6742 
                .almost_full_data  (),                                               // (terminated)
6743 
                .almost_empty_data (),                                               // (terminated)
6744 
                .in_startofpacket  (1'b0),                                           // (terminated)
6745 
                .in_endofpacket    (1'b0),                                           // (terminated)
6746 
                .out_startofpacket (),                                               // (terminated)
6747 
                .out_endofpacket   (),                                               // (terminated)
6748 
                .in_empty          (1'b0),                                           // (terminated)
6749 
                .out_empty         (),                                               // (terminated)
6750 
                .in_error          (1'b0),                                           // (terminated)
6751 
                .out_error         (),                                               // (terminated)
6752 
                .in_channel        (1'b0),                                           // (terminated)
6753 
                .out_channel       ()                                                // (terminated)
6754 
        );
6755 
 
6756 
        altera_merlin_slave_agent #(
6757 
                .PKT_ORI_BURST_SIZE_H      (128),
6758 
                .PKT_ORI_BURST_SIZE_L      (126),
6759 
                .PKT_RESPONSE_STATUS_H     (125),
6760 
                .PKT_RESPONSE_STATUS_L     (124),
6761 
                .PKT_BURST_SIZE_H          (88),
6762 
                .PKT_BURST_SIZE_L          (86),
6763 
                .PKT_TRANS_LOCK            (70),
6764 
                .PKT_BEGIN_BURST           (93),
6765 
                .PKT_PROTECTION_H          (119),
6766 
                .PKT_PROTECTION_L          (117),
6767 
                .PKT_BURSTWRAP_H           (85),
6768 
                .PKT_BURSTWRAP_L           (79),
6769 
                .PKT_BYTE_CNT_H            (78),
6770 
                .PKT_BYTE_CNT_L            (72),
6771 
                .PKT_ADDR_H                (65),
6772 
                .PKT_ADDR_L                (36),
6773 
                .PKT_TRANS_COMPRESSED_READ (66),
6774 
                .PKT_TRANS_POSTED          (67),
6775 
                .PKT_TRANS_WRITE           (68),
6776 
                .PKT_TRANS_READ            (69),
6777 
                .PKT_DATA_H                (31),
6778 
                .PKT_DATA_L                (0),
6779 
                .PKT_BYTEEN_H              (35),
6780 
                .PKT_BYTEEN_L              (32),
6781 
                .PKT_SRC_ID_H              (99),
6782 
                .PKT_SRC_ID_L              (95),
6783 
                .PKT_DEST_ID_H             (104),
6784 
                .PKT_DEST_ID_L             (100),
6785 
                .PKT_SYMBOL_W              (8),
6786 
                .ST_CHANNEL_W              (22),
6787 
                .ST_DATA_W                 (129),
6788 
                .AVS_BURSTCOUNT_W          (3),
6789 
                .SUPPRESS_0_BYTEEN_CMD     (1),
6790 
                .PREVENT_FIFO_OVERFLOW     (1),
6791 
                .USE_READRESPONSE          (0),
6792 
                .USE_WRITERESPONSE         (0),
6793 
                .ECC_ENABLE                (0)
6794 
        ) counter_tx_fifo_s1_agent (
6795 
                .clk                     (clk_0_clk_clk),                                          //             clk.clk
6796 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),         //       clk_reset.reset
6797 
                .m0_address              (counter_tx_fifo_s1_agent_m0_address),                    //              m0.address
6798 
                .m0_burstcount           (counter_tx_fifo_s1_agent_m0_burstcount),                 //                .burstcount
6799 
                .m0_byteenable           (counter_tx_fifo_s1_agent_m0_byteenable),                 //                .byteenable
6800 
                .m0_debugaccess          (counter_tx_fifo_s1_agent_m0_debugaccess),                //                .debugaccess
6801 
                .m0_lock                 (counter_tx_fifo_s1_agent_m0_lock),                       //                .lock
6802 
                .m0_readdata             (counter_tx_fifo_s1_agent_m0_readdata),                   //                .readdata
6803 
                .m0_readdatavalid        (counter_tx_fifo_s1_agent_m0_readdatavalid),              //                .readdatavalid
6804 
                .m0_read                 (counter_tx_fifo_s1_agent_m0_read),                       //                .read
6805 
                .m0_waitrequest          (counter_tx_fifo_s1_agent_m0_waitrequest),                //                .waitrequest
6806 
                .m0_writedata            (counter_tx_fifo_s1_agent_m0_writedata),                  //                .writedata
6807 
                .m0_write                (counter_tx_fifo_s1_agent_m0_write),                      //                .write
6808 
                .rp_endofpacket          (counter_tx_fifo_s1_agent_rp_endofpacket),                //              rp.endofpacket
6809 
                .rp_ready                (counter_tx_fifo_s1_agent_rp_ready),                      //                .ready
6810 
                .rp_valid                (counter_tx_fifo_s1_agent_rp_valid),                      //                .valid
6811 
                .rp_data                 (counter_tx_fifo_s1_agent_rp_data),                       //                .data
6812 
                .rp_startofpacket        (counter_tx_fifo_s1_agent_rp_startofpacket),              //                .startofpacket
6813 
                .cp_ready                (counter_tx_fifo_s1_burst_adapter_source0_ready),         //              cp.ready
6814 
                .cp_valid                (counter_tx_fifo_s1_burst_adapter_source0_valid),         //                .valid
6815 
                .cp_data                 (counter_tx_fifo_s1_burst_adapter_source0_data),          //                .data
6816 
                .cp_startofpacket        (counter_tx_fifo_s1_burst_adapter_source0_startofpacket), //                .startofpacket
6817 
                .cp_endofpacket          (counter_tx_fifo_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
6818 
                .cp_channel              (counter_tx_fifo_s1_burst_adapter_source0_channel),       //                .channel
6819 
                .rf_sink_ready           (counter_tx_fifo_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
6820 
                .rf_sink_valid           (counter_tx_fifo_s1_agent_rsp_fifo_out_valid),            //                .valid
6821 
                .rf_sink_startofpacket   (counter_tx_fifo_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
6822 
                .rf_sink_endofpacket     (counter_tx_fifo_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
6823 
                .rf_sink_data            (counter_tx_fifo_s1_agent_rsp_fifo_out_data),             //                .data
6824 
                .rf_source_ready         (counter_tx_fifo_s1_agent_rf_source_ready),               //       rf_source.ready
6825 
                .rf_source_valid         (counter_tx_fifo_s1_agent_rf_source_valid),               //                .valid
6826 
                .rf_source_startofpacket (counter_tx_fifo_s1_agent_rf_source_startofpacket),       //                .startofpacket
6827 
                .rf_source_endofpacket   (counter_tx_fifo_s1_agent_rf_source_endofpacket),         //                .endofpacket
6828 
                .rf_source_data          (counter_tx_fifo_s1_agent_rf_source_data),                //                .data
6829 
                .rdata_fifo_sink_ready   (avalon_st_adapter_020_out_0_ready),                      // rdata_fifo_sink.ready
6830 
                .rdata_fifo_sink_valid   (avalon_st_adapter_020_out_0_valid),                      //                .valid
6831 
                .rdata_fifo_sink_data    (avalon_st_adapter_020_out_0_data),                       //                .data
6832 
                .rdata_fifo_sink_error   (avalon_st_adapter_020_out_0_error),                      //                .error
6833 
                .rdata_fifo_src_ready    (counter_tx_fifo_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
6834 
                .rdata_fifo_src_valid    (counter_tx_fifo_s1_agent_rdata_fifo_src_valid),          //                .valid
6835 
                .rdata_fifo_src_data     (counter_tx_fifo_s1_agent_rdata_fifo_src_data),           //                .data
6836 
                .m0_response             (2'b00),                                                  //     (terminated)
6837 
                .m0_writeresponsevalid   (1'b0)                                                    //     (terminated)
6838 
        );
6839 
 
6840 
        altera_avalon_sc_fifo #(
6841 
                .SYMBOLS_PER_BEAT    (1),
6842 
                .BITS_PER_SYMBOL     (130),
6843 
                .FIFO_DEPTH          (2),
6844 
                .CHANNEL_WIDTH       (0),
6845 
                .ERROR_WIDTH         (0),
6846 
                .USE_PACKETS         (1),
6847 
                .USE_FILL_LEVEL      (0),
6848 
                .EMPTY_LATENCY       (1),
6849 
                .USE_MEMORY_BLOCKS   (0),
6850 
                .USE_STORE_FORWARD   (0),
6851 
                .USE_ALMOST_FULL_IF  (0),
6852 
                .USE_ALMOST_EMPTY_IF (0)
6853 
        ) counter_tx_fifo_s1_agent_rsp_fifo (
6854 
                .clk               (clk_0_clk_clk),                                       //       clk.clk
6855 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),      // clk_reset.reset
6856 
                .in_data           (counter_tx_fifo_s1_agent_rf_source_data),             //        in.data
6857 
                .in_valid          (counter_tx_fifo_s1_agent_rf_source_valid),            //          .valid
6858 
                .in_ready          (counter_tx_fifo_s1_agent_rf_source_ready),            //          .ready
6859 
                .in_startofpacket  (counter_tx_fifo_s1_agent_rf_source_startofpacket),    //          .startofpacket
6860 
                .in_endofpacket    (counter_tx_fifo_s1_agent_rf_source_endofpacket),      //          .endofpacket
6861 
                .out_data          (counter_tx_fifo_s1_agent_rsp_fifo_out_data),          //       out.data
6862 
                .out_valid         (counter_tx_fifo_s1_agent_rsp_fifo_out_valid),         //          .valid
6863 
                .out_ready         (counter_tx_fifo_s1_agent_rsp_fifo_out_ready),         //          .ready
6864 
                .out_startofpacket (counter_tx_fifo_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
6865 
                .out_endofpacket   (counter_tx_fifo_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
6866 
                .csr_address       (2'b00),                                               // (terminated)
6867 
                .csr_read          (1'b0),                                                // (terminated)
6868 
                .csr_write         (1'b0),                                                // (terminated)
6869 
                .csr_readdata      (),                                                    // (terminated)
6870 
                .csr_writedata     (32'b00000000000000000000000000000000),                // (terminated)
6871 
                .almost_full_data  (),                                                    // (terminated)
6872 
                .almost_empty_data (),                                                    // (terminated)
6873 
                .in_empty          (1'b0),                                                // (terminated)
6874 
                .out_empty         (),                                                    // (terminated)
6875 
                .in_error          (1'b0),                                                // (terminated)
6876 
                .out_error         (),                                                    // (terminated)
6877 
                .in_channel        (1'b0),                                                // (terminated)
6878 
                .out_channel       ()                                                     // (terminated)
6879 
        );
6880 
 
6881 
        altera_avalon_sc_fifo #(
6882 
                .SYMBOLS_PER_BEAT    (1),
6883 
                .BITS_PER_SYMBOL     (34),
6884 
                .FIFO_DEPTH          (2),
6885 
                .CHANNEL_WIDTH       (0),
6886 
                .ERROR_WIDTH         (0),
6887 
                .USE_PACKETS         (0),
6888 
                .USE_FILL_LEVEL      (0),
6889 
                .EMPTY_LATENCY       (0),
6890 
                .USE_MEMORY_BLOCKS   (0),
6891 
                .USE_STORE_FORWARD   (0),
6892 
                .USE_ALMOST_FULL_IF  (0),
6893 
                .USE_ALMOST_EMPTY_IF (0)
6894 
        ) counter_tx_fifo_s1_agent_rdata_fifo (
6895 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
6896 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
6897 
                .in_data           (counter_tx_fifo_s1_agent_rdata_fifo_src_data),   //        in.data
6898 
                .in_valid          (counter_tx_fifo_s1_agent_rdata_fifo_src_valid),  //          .valid
6899 
                .in_ready          (counter_tx_fifo_s1_agent_rdata_fifo_src_ready),  //          .ready
6900 
                .out_data          (counter_tx_fifo_s1_agent_rdata_fifo_out_data),   //       out.data
6901 
                .out_valid         (counter_tx_fifo_s1_agent_rdata_fifo_out_valid),  //          .valid
6902 
                .out_ready         (counter_tx_fifo_s1_agent_rdata_fifo_out_ready),  //          .ready
6903 
                .csr_address       (2'b00),                                          // (terminated)
6904 
                .csr_read          (1'b0),                                           // (terminated)
6905 
                .csr_write         (1'b0),                                           // (terminated)
6906 
                .csr_readdata      (),                                               // (terminated)
6907 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
6908 
                .almost_full_data  (),                                               // (terminated)
6909 
                .almost_empty_data (),                                               // (terminated)
6910 
                .in_startofpacket  (1'b0),                                           // (terminated)
6911 
                .in_endofpacket    (1'b0),                                           // (terminated)
6912 
                .out_startofpacket (),                                               // (terminated)
6913 
                .out_endofpacket   (),                                               // (terminated)
6914 
                .in_empty          (1'b0),                                           // (terminated)
6915 
                .out_empty         (),                                               // (terminated)
6916 
                .in_error          (1'b0),                                           // (terminated)
6917 
                .out_error         (),                                               // (terminated)
6918 
                .in_channel        (1'b0),                                           // (terminated)
6919 
                .out_channel       ()                                                // (terminated)
6920 
        );
6921 
 
6922 
        altera_merlin_slave_agent #(
6923 
                .PKT_ORI_BURST_SIZE_H      (128),
6924 
                .PKT_ORI_BURST_SIZE_L      (126),
6925 
                .PKT_RESPONSE_STATUS_H     (125),
6926 
                .PKT_RESPONSE_STATUS_L     (124),
6927 
                .PKT_BURST_SIZE_H          (88),
6928 
                .PKT_BURST_SIZE_L          (86),
6929 
                .PKT_TRANS_LOCK            (70),
6930 
                .PKT_BEGIN_BURST           (93),
6931 
                .PKT_PROTECTION_H          (119),
6932 
                .PKT_PROTECTION_L          (117),
6933 
                .PKT_BURSTWRAP_H           (85),
6934 
                .PKT_BURSTWRAP_L           (79),
6935 
                .PKT_BYTE_CNT_H            (78),
6936 
                .PKT_BYTE_CNT_L            (72),
6937 
                .PKT_ADDR_H                (65),
6938 
                .PKT_ADDR_L                (36),
6939 
                .PKT_TRANS_COMPRESSED_READ (66),
6940 
                .PKT_TRANS_POSTED          (67),
6941 
                .PKT_TRANS_WRITE           (68),
6942 
                .PKT_TRANS_READ            (69),
6943 
                .PKT_DATA_H                (31),
6944 
                .PKT_DATA_L                (0),
6945 
                .PKT_BYTEEN_H              (35),
6946 
                .PKT_BYTEEN_L              (32),
6947 
                .PKT_SRC_ID_H              (99),
6948 
                .PKT_SRC_ID_L              (95),
6949 
                .PKT_DEST_ID_H             (104),
6950 
                .PKT_DEST_ID_L             (100),
6951 
                .PKT_SYMBOL_W              (8),
6952 
                .ST_CHANNEL_W              (22),
6953 
                .ST_DATA_W                 (129),
6954 
                .AVS_BURSTCOUNT_W          (3),
6955 
                .SUPPRESS_0_BYTEEN_CMD     (1),
6956 
                .PREVENT_FIFO_OVERFLOW     (1),
6957 
                .USE_READRESPONSE          (0),
6958 
                .USE_WRITERESPONSE         (0),
6959 
                .ECC_ENABLE                (0)
6960 
        ) counter_rx_fifo_s1_agent (
6961 
                .clk                     (clk_0_clk_clk),                                          //             clk.clk
6962 
                .reset                   (led_pio_test_reset_reset_bridge_in_reset_reset),         //       clk_reset.reset
6963 
                .m0_address              (counter_rx_fifo_s1_agent_m0_address),                    //              m0.address
6964 
                .m0_burstcount           (counter_rx_fifo_s1_agent_m0_burstcount),                 //                .burstcount
6965 
                .m0_byteenable           (counter_rx_fifo_s1_agent_m0_byteenable),                 //                .byteenable
6966 
                .m0_debugaccess          (counter_rx_fifo_s1_agent_m0_debugaccess),                //                .debugaccess
6967 
                .m0_lock                 (counter_rx_fifo_s1_agent_m0_lock),                       //                .lock
6968 
                .m0_readdata             (counter_rx_fifo_s1_agent_m0_readdata),                   //                .readdata
6969 
                .m0_readdatavalid        (counter_rx_fifo_s1_agent_m0_readdatavalid),              //                .readdatavalid
6970 
                .m0_read                 (counter_rx_fifo_s1_agent_m0_read),                       //                .read
6971 
                .m0_waitrequest          (counter_rx_fifo_s1_agent_m0_waitrequest),                //                .waitrequest
6972 
                .m0_writedata            (counter_rx_fifo_s1_agent_m0_writedata),                  //                .writedata
6973 
                .m0_write                (counter_rx_fifo_s1_agent_m0_write),                      //                .write
6974 
                .rp_endofpacket          (counter_rx_fifo_s1_agent_rp_endofpacket),                //              rp.endofpacket
6975 
                .rp_ready                (counter_rx_fifo_s1_agent_rp_ready),                      //                .ready
6976 
                .rp_valid                (counter_rx_fifo_s1_agent_rp_valid),                      //                .valid
6977 
                .rp_data                 (counter_rx_fifo_s1_agent_rp_data),                       //                .data
6978 
                .rp_startofpacket        (counter_rx_fifo_s1_agent_rp_startofpacket),              //                .startofpacket
6979 
                .cp_ready                (counter_rx_fifo_s1_burst_adapter_source0_ready),         //              cp.ready
6980 
                .cp_valid                (counter_rx_fifo_s1_burst_adapter_source0_valid),         //                .valid
6981 
                .cp_data                 (counter_rx_fifo_s1_burst_adapter_source0_data),          //                .data
6982 
                .cp_startofpacket        (counter_rx_fifo_s1_burst_adapter_source0_startofpacket), //                .startofpacket
6983 
                .cp_endofpacket          (counter_rx_fifo_s1_burst_adapter_source0_endofpacket),   //                .endofpacket
6984 
                .cp_channel              (counter_rx_fifo_s1_burst_adapter_source0_channel),       //                .channel
6985 
                .rf_sink_ready           (counter_rx_fifo_s1_agent_rsp_fifo_out_ready),            //         rf_sink.ready
6986 
                .rf_sink_valid           (counter_rx_fifo_s1_agent_rsp_fifo_out_valid),            //                .valid
6987 
                .rf_sink_startofpacket   (counter_rx_fifo_s1_agent_rsp_fifo_out_startofpacket),    //                .startofpacket
6988 
                .rf_sink_endofpacket     (counter_rx_fifo_s1_agent_rsp_fifo_out_endofpacket),      //                .endofpacket
6989 
                .rf_sink_data            (counter_rx_fifo_s1_agent_rsp_fifo_out_data),             //                .data
6990 
                .rf_source_ready         (counter_rx_fifo_s1_agent_rf_source_ready),               //       rf_source.ready
6991 
                .rf_source_valid         (counter_rx_fifo_s1_agent_rf_source_valid),               //                .valid
6992 
                .rf_source_startofpacket (counter_rx_fifo_s1_agent_rf_source_startofpacket),       //                .startofpacket
6993 
                .rf_source_endofpacket   (counter_rx_fifo_s1_agent_rf_source_endofpacket),         //                .endofpacket
6994 
                .rf_source_data          (counter_rx_fifo_s1_agent_rf_source_data),                //                .data
6995 
                .rdata_fifo_sink_ready   (avalon_st_adapter_021_out_0_ready),                      // rdata_fifo_sink.ready
6996 
                .rdata_fifo_sink_valid   (avalon_st_adapter_021_out_0_valid),                      //                .valid
6997 
                .rdata_fifo_sink_data    (avalon_st_adapter_021_out_0_data),                       //                .data
6998 
                .rdata_fifo_sink_error   (avalon_st_adapter_021_out_0_error),                      //                .error
6999 
                .rdata_fifo_src_ready    (counter_rx_fifo_s1_agent_rdata_fifo_src_ready),          //  rdata_fifo_src.ready
7000 
                .rdata_fifo_src_valid    (counter_rx_fifo_s1_agent_rdata_fifo_src_valid),          //                .valid
7001 
                .rdata_fifo_src_data     (counter_rx_fifo_s1_agent_rdata_fifo_src_data),           //                .data
7002 
                .m0_response             (2'b00),                                                  //     (terminated)
7003 
                .m0_writeresponsevalid   (1'b0)                                                    //     (terminated)
7004 
        );
7005 
 
7006 
        altera_avalon_sc_fifo #(
7007 
                .SYMBOLS_PER_BEAT    (1),
7008 
                .BITS_PER_SYMBOL     (130),
7009 
                .FIFO_DEPTH          (2),
7010 
                .CHANNEL_WIDTH       (0),
7011 
                .ERROR_WIDTH         (0),
7012 
                .USE_PACKETS         (1),
7013 
                .USE_FILL_LEVEL      (0),
7014 
                .EMPTY_LATENCY       (1),
7015 
                .USE_MEMORY_BLOCKS   (0),
7016 
                .USE_STORE_FORWARD   (0),
7017 
                .USE_ALMOST_FULL_IF  (0),
7018 
                .USE_ALMOST_EMPTY_IF (0)
7019 
        ) counter_rx_fifo_s1_agent_rsp_fifo (
7020 
                .clk               (clk_0_clk_clk),                                       //       clk.clk
7021 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset),      // clk_reset.reset
7022 
                .in_data           (counter_rx_fifo_s1_agent_rf_source_data),             //        in.data
7023 
                .in_valid          (counter_rx_fifo_s1_agent_rf_source_valid),            //          .valid
7024 
                .in_ready          (counter_rx_fifo_s1_agent_rf_source_ready),            //          .ready
7025 
                .in_startofpacket  (counter_rx_fifo_s1_agent_rf_source_startofpacket),    //          .startofpacket
7026 
                .in_endofpacket    (counter_rx_fifo_s1_agent_rf_source_endofpacket),      //          .endofpacket
7027 
                .out_data          (counter_rx_fifo_s1_agent_rsp_fifo_out_data),          //       out.data
7028 
                .out_valid         (counter_rx_fifo_s1_agent_rsp_fifo_out_valid),         //          .valid
7029 
                .out_ready         (counter_rx_fifo_s1_agent_rsp_fifo_out_ready),         //          .ready
7030 
                .out_startofpacket (counter_rx_fifo_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
7031 
                .out_endofpacket   (counter_rx_fifo_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
7032 
                .csr_address       (2'b00),                                               // (terminated)
7033 
                .csr_read          (1'b0),                                                // (terminated)
7034 
                .csr_write         (1'b0),                                                // (terminated)
7035 
                .csr_readdata      (),                                                    // (terminated)
7036 
                .csr_writedata     (32'b00000000000000000000000000000000),                // (terminated)
7037 
                .almost_full_data  (),                                                    // (terminated)
7038 
                .almost_empty_data (),                                                    // (terminated)
7039 
                .in_empty          (1'b0),                                                // (terminated)
7040 
                .out_empty         (),                                                    // (terminated)
7041 
                .in_error          (1'b0),                                                // (terminated)
7042 
                .out_error         (),                                                    // (terminated)
7043 
                .in_channel        (1'b0),                                                // (terminated)
7044 
                .out_channel       ()                                                     // (terminated)
7045 
        );
7046 
 
7047 
        altera_avalon_sc_fifo #(
7048 
                .SYMBOLS_PER_BEAT    (1),
7049 
                .BITS_PER_SYMBOL     (34),
7050 
                .FIFO_DEPTH          (2),
7051 
                .CHANNEL_WIDTH       (0),
7052 
                .ERROR_WIDTH         (0),
7053 
                .USE_PACKETS         (0),
7054 
                .USE_FILL_LEVEL      (0),
7055 
                .EMPTY_LATENCY       (0),
7056 
                .USE_MEMORY_BLOCKS   (0),
7057 
                .USE_STORE_FORWARD   (0),
7058 
                .USE_ALMOST_FULL_IF  (0),
7059 
                .USE_ALMOST_EMPTY_IF (0)
7060 
        ) counter_rx_fifo_s1_agent_rdata_fifo (
7061 
                .clk               (clk_0_clk_clk),                                  //       clk.clk
7062 
                .reset             (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7063 
                .in_data           (counter_rx_fifo_s1_agent_rdata_fifo_src_data),   //        in.data
7064 
                .in_valid          (counter_rx_fifo_s1_agent_rdata_fifo_src_valid),  //          .valid
7065 
                .in_ready          (counter_rx_fifo_s1_agent_rdata_fifo_src_ready),  //          .ready
7066 
                .out_data          (counter_rx_fifo_s1_agent_rdata_fifo_out_data),   //       out.data
7067 
                .out_valid         (counter_rx_fifo_s1_agent_rdata_fifo_out_valid),  //          .valid
7068 
                .out_ready         (counter_rx_fifo_s1_agent_rdata_fifo_out_ready),  //          .ready
7069 
                .csr_address       (2'b00),                                          // (terminated)
7070 
                .csr_read          (1'b0),                                           // (terminated)
7071 
                .csr_write         (1'b0),                                           // (terminated)
7072 
                .csr_readdata      (),                                               // (terminated)
7073 
                .csr_writedata     (32'b00000000000000000000000000000000),           // (terminated)
7074 
                .almost_full_data  (),                                               // (terminated)
7075 
                .almost_empty_data (),                                               // (terminated)
7076 
                .in_startofpacket  (1'b0),                                           // (terminated)
7077 
                .in_endofpacket    (1'b0),                                           // (terminated)
7078 
                .out_startofpacket (),                                               // (terminated)
7079 
                .out_endofpacket   (),                                               // (terminated)
7080 
                .in_empty          (1'b0),                                           // (terminated)
7081 
                .out_empty         (),                                               // (terminated)
7082 
                .in_error          (1'b0),                                           // (terminated)
7083 
                .out_error         (),                                               // (terminated)
7084 
                .in_channel        (1'b0),                                           // (terminated)
7085 
                .out_channel       ()                                                // (terminated)
7086 
        );
7087 
 
7088 
        ulight_fifo_mm_interconnect_0_router router (
7089 
                .sink_ready         (hps_0_h2f_axi_master_agent_write_cp_ready),                        //      sink.ready
7090 
                .sink_valid         (hps_0_h2f_axi_master_agent_write_cp_valid),                        //          .valid
7091 
                .sink_data          (hps_0_h2f_axi_master_agent_write_cp_data),                         //          .data
7092 
                .sink_startofpacket (hps_0_h2f_axi_master_agent_write_cp_startofpacket),                //          .startofpacket
7093 
                .sink_endofpacket   (hps_0_h2f_axi_master_agent_write_cp_endofpacket),                  //          .endofpacket
7094 
                .clk                (clk_0_clk_clk),                                                    //       clk.clk
7095 
                .reset              (hps_0_h2f_axi_master_agent_clk_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7096 
                .src_ready          (router_src_ready),                                                 //       src.ready
7097 
                .src_valid          (router_src_valid),                                                 //          .valid
7098 
                .src_data           (router_src_data),                                                  //          .data
7099 
                .src_channel        (router_src_channel),                                               //          .channel
7100 
                .src_startofpacket  (router_src_startofpacket),                                         //          .startofpacket
7101 
                .src_endofpacket    (router_src_endofpacket)                                            //          .endofpacket
7102 
        );
7103 
 
7104 
        ulight_fifo_mm_interconnect_0_router router_001 (
7105 
                .sink_ready         (hps_0_h2f_axi_master_agent_read_cp_ready),                         //      sink.ready
7106 
                .sink_valid         (hps_0_h2f_axi_master_agent_read_cp_valid),                         //          .valid
7107 
                .sink_data          (hps_0_h2f_axi_master_agent_read_cp_data),                          //          .data
7108 
                .sink_startofpacket (hps_0_h2f_axi_master_agent_read_cp_startofpacket),                 //          .startofpacket
7109 
                .sink_endofpacket   (hps_0_h2f_axi_master_agent_read_cp_endofpacket),                   //          .endofpacket
7110 
                .clk                (clk_0_clk_clk),                                                    //       clk.clk
7111 
                .reset              (hps_0_h2f_axi_master_agent_clk_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7112 
                .src_ready          (router_001_src_ready),                                             //       src.ready
7113 
                .src_valid          (router_001_src_valid),                                             //          .valid
7114 
                .src_data           (router_001_src_data),                                              //          .data
7115 
                .src_channel        (router_001_src_channel),                                           //          .channel
7116 
                .src_startofpacket  (router_001_src_startofpacket),                                     //          .startofpacket
7117 
                .src_endofpacket    (router_001_src_endofpacket)                                        //          .endofpacket
7118 
        );
7119 
 
7120 
        ulight_fifo_mm_interconnect_0_router_002 router_002 (
7121 
                .sink_ready         (led_pio_test_s1_agent_rp_ready),                 //      sink.ready
7122 
                .sink_valid         (led_pio_test_s1_agent_rp_valid),                 //          .valid
7123 
                .sink_data          (led_pio_test_s1_agent_rp_data),                  //          .data
7124 
                .sink_startofpacket (led_pio_test_s1_agent_rp_startofpacket),         //          .startofpacket
7125 
                .sink_endofpacket   (led_pio_test_s1_agent_rp_endofpacket),           //          .endofpacket
7126 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7127 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7128 
                .src_ready          (router_002_src_ready),                           //       src.ready
7129 
                .src_valid          (router_002_src_valid),                           //          .valid
7130 
                .src_data           (router_002_src_data),                            //          .data
7131 
                .src_channel        (router_002_src_channel),                         //          .channel
7132 
                .src_startofpacket  (router_002_src_startofpacket),                   //          .startofpacket
7133 
                .src_endofpacket    (router_002_src_endofpacket)                      //          .endofpacket
7134 
        );
7135 
 
7136 
        ulight_fifo_mm_interconnect_0_router_002 router_003 (
7137 
                .sink_ready         (timecode_rx_s1_agent_rp_ready),                  //      sink.ready
7138 
                .sink_valid         (timecode_rx_s1_agent_rp_valid),                  //          .valid
7139 
                .sink_data          (timecode_rx_s1_agent_rp_data),                   //          .data
7140 
                .sink_startofpacket (timecode_rx_s1_agent_rp_startofpacket),          //          .startofpacket
7141 
                .sink_endofpacket   (timecode_rx_s1_agent_rp_endofpacket),            //          .endofpacket
7142 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7143 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7144 
                .src_ready          (router_003_src_ready),                           //       src.ready
7145 
                .src_valid          (router_003_src_valid),                           //          .valid
7146 
                .src_data           (router_003_src_data),                            //          .data
7147 
                .src_channel        (router_003_src_channel),                         //          .channel
7148 
                .src_startofpacket  (router_003_src_startofpacket),                   //          .startofpacket
7149 
                .src_endofpacket    (router_003_src_endofpacket)                      //          .endofpacket
7150 
        );
7151 
 
7152 
        ulight_fifo_mm_interconnect_0_router_002 router_004 (
7153 
                .sink_ready         (timecode_ready_rx_s1_agent_rp_ready),            //      sink.ready
7154 
                .sink_valid         (timecode_ready_rx_s1_agent_rp_valid),            //          .valid
7155 
                .sink_data          (timecode_ready_rx_s1_agent_rp_data),             //          .data
7156 
                .sink_startofpacket (timecode_ready_rx_s1_agent_rp_startofpacket),    //          .startofpacket
7157 
                .sink_endofpacket   (timecode_ready_rx_s1_agent_rp_endofpacket),      //          .endofpacket
7158 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7159 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7160 
                .src_ready          (router_004_src_ready),                           //       src.ready
7161 
                .src_valid          (router_004_src_valid),                           //          .valid
7162 
                .src_data           (router_004_src_data),                            //          .data
7163 
                .src_channel        (router_004_src_channel),                         //          .channel
7164 
                .src_startofpacket  (router_004_src_startofpacket),                   //          .startofpacket
7165 
                .src_endofpacket    (router_004_src_endofpacket)                      //          .endofpacket
7166 
        );
7167 
 
7168 
        ulight_fifo_mm_interconnect_0_router_002 router_005 (
7169 
                .sink_ready         (data_flag_rx_s1_agent_rp_ready),                 //      sink.ready
7170 
                .sink_valid         (data_flag_rx_s1_agent_rp_valid),                 //          .valid
7171 
                .sink_data          (data_flag_rx_s1_agent_rp_data),                  //          .data
7172 
                .sink_startofpacket (data_flag_rx_s1_agent_rp_startofpacket),         //          .startofpacket
7173 
                .sink_endofpacket   (data_flag_rx_s1_agent_rp_endofpacket),           //          .endofpacket
7174 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7175 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7176 
                .src_ready          (router_005_src_ready),                           //       src.ready
7177 
                .src_valid          (router_005_src_valid),                           //          .valid
7178 
                .src_data           (router_005_src_data),                            //          .data
7179 
                .src_channel        (router_005_src_channel),                         //          .channel
7180 
                .src_startofpacket  (router_005_src_startofpacket),                   //          .startofpacket
7181 
                .src_endofpacket    (router_005_src_endofpacket)                      //          .endofpacket
7182 
        );
7183 
 
7184 
        ulight_fifo_mm_interconnect_0_router_002 router_006 (
7185 
                .sink_ready         (data_read_en_rx_s1_agent_rp_ready),              //      sink.ready
7186 
                .sink_valid         (data_read_en_rx_s1_agent_rp_valid),              //          .valid
7187 
                .sink_data          (data_read_en_rx_s1_agent_rp_data),               //          .data
7188 
                .sink_startofpacket (data_read_en_rx_s1_agent_rp_startofpacket),      //          .startofpacket
7189 
                .sink_endofpacket   (data_read_en_rx_s1_agent_rp_endofpacket),        //          .endofpacket
7190 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7191 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7192 
                .src_ready          (router_006_src_ready),                           //       src.ready
7193 
                .src_valid          (router_006_src_valid),                           //          .valid
7194 
                .src_data           (router_006_src_data),                            //          .data
7195 
                .src_channel        (router_006_src_channel),                         //          .channel
7196 
                .src_startofpacket  (router_006_src_startofpacket),                   //          .startofpacket
7197 
                .src_endofpacket    (router_006_src_endofpacket)                      //          .endofpacket
7198 
        );
7199 
 
7200 
        ulight_fifo_mm_interconnect_0_router_002 router_007 (
7201 
                .sink_ready         (fifo_full_rx_status_s1_agent_rp_ready),          //      sink.ready
7202 
                .sink_valid         (fifo_full_rx_status_s1_agent_rp_valid),          //          .valid
7203 
                .sink_data          (fifo_full_rx_status_s1_agent_rp_data),           //          .data
7204 
                .sink_startofpacket (fifo_full_rx_status_s1_agent_rp_startofpacket),  //          .startofpacket
7205 
                .sink_endofpacket   (fifo_full_rx_status_s1_agent_rp_endofpacket),    //          .endofpacket
7206 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7207 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7208 
                .src_ready          (router_007_src_ready),                           //       src.ready
7209 
                .src_valid          (router_007_src_valid),                           //          .valid
7210 
                .src_data           (router_007_src_data),                            //          .data
7211 
                .src_channel        (router_007_src_channel),                         //          .channel
7212 
                .src_startofpacket  (router_007_src_startofpacket),                   //          .startofpacket
7213 
                .src_endofpacket    (router_007_src_endofpacket)                      //          .endofpacket
7214 
        );
7215 
 
7216 
        ulight_fifo_mm_interconnect_0_router_002 router_008 (
7217 
                .sink_ready         (fifo_empty_rx_status_s1_agent_rp_ready),         //      sink.ready
7218 
                .sink_valid         (fifo_empty_rx_status_s1_agent_rp_valid),         //          .valid
7219 
                .sink_data          (fifo_empty_rx_status_s1_agent_rp_data),          //          .data
7220 
                .sink_startofpacket (fifo_empty_rx_status_s1_agent_rp_startofpacket), //          .startofpacket
7221 
                .sink_endofpacket   (fifo_empty_rx_status_s1_agent_rp_endofpacket),   //          .endofpacket
7222 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7223 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7224 
                .src_ready          (router_008_src_ready),                           //       src.ready
7225 
                .src_valid          (router_008_src_valid),                           //          .valid
7226 
                .src_data           (router_008_src_data),                            //          .data
7227 
                .src_channel        (router_008_src_channel),                         //          .channel
7228 
                .src_startofpacket  (router_008_src_startofpacket),                   //          .startofpacket
7229 
                .src_endofpacket    (router_008_src_endofpacket)                      //          .endofpacket
7230 
        );
7231 
 
7232 
        ulight_fifo_mm_interconnect_0_router_002 router_009 (
7233 
                .sink_ready         (link_start_s1_agent_rp_ready),                   //      sink.ready
7234 
                .sink_valid         (link_start_s1_agent_rp_valid),                   //          .valid
7235 
                .sink_data          (link_start_s1_agent_rp_data),                    //          .data
7236 
                .sink_startofpacket (link_start_s1_agent_rp_startofpacket),           //          .startofpacket
7237 
                .sink_endofpacket   (link_start_s1_agent_rp_endofpacket),             //          .endofpacket
7238 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7239 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7240 
                .src_ready          (router_009_src_ready),                           //       src.ready
7241 
                .src_valid          (router_009_src_valid),                           //          .valid
7242 
                .src_data           (router_009_src_data),                            //          .data
7243 
                .src_channel        (router_009_src_channel),                         //          .channel
7244 
                .src_startofpacket  (router_009_src_startofpacket),                   //          .startofpacket
7245 
                .src_endofpacket    (router_009_src_endofpacket)                      //          .endofpacket
7246 
        );
7247 
 
7248 
        ulight_fifo_mm_interconnect_0_router_002 router_010 (
7249 
                .sink_ready         (auto_start_s1_agent_rp_ready),                   //      sink.ready
7250 
                .sink_valid         (auto_start_s1_agent_rp_valid),                   //          .valid
7251 
                .sink_data          (auto_start_s1_agent_rp_data),                    //          .data
7252 
                .sink_startofpacket (auto_start_s1_agent_rp_startofpacket),           //          .startofpacket
7253 
                .sink_endofpacket   (auto_start_s1_agent_rp_endofpacket),             //          .endofpacket
7254 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7255 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7256 
                .src_ready          (router_010_src_ready),                           //       src.ready
7257 
                .src_valid          (router_010_src_valid),                           //          .valid
7258 
                .src_data           (router_010_src_data),                            //          .data
7259 
                .src_channel        (router_010_src_channel),                         //          .channel
7260 
                .src_startofpacket  (router_010_src_startofpacket),                   //          .startofpacket
7261 
                .src_endofpacket    (router_010_src_endofpacket)                      //          .endofpacket
7262 
        );
7263 
 
7264 
        ulight_fifo_mm_interconnect_0_router_002 router_011 (
7265 
                .sink_ready         (link_disable_s1_agent_rp_ready),                 //      sink.ready
7266 
                .sink_valid         (link_disable_s1_agent_rp_valid),                 //          .valid
7267 
                .sink_data          (link_disable_s1_agent_rp_data),                  //          .data
7268 
                .sink_startofpacket (link_disable_s1_agent_rp_startofpacket),         //          .startofpacket
7269 
                .sink_endofpacket   (link_disable_s1_agent_rp_endofpacket),           //          .endofpacket
7270 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7271 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7272 
                .src_ready          (router_011_src_ready),                           //       src.ready
7273 
                .src_valid          (router_011_src_valid),                           //          .valid
7274 
                .src_data           (router_011_src_data),                            //          .data
7275 
                .src_channel        (router_011_src_channel),                         //          .channel
7276 
                .src_startofpacket  (router_011_src_startofpacket),                   //          .startofpacket
7277 
                .src_endofpacket    (router_011_src_endofpacket)                      //          .endofpacket
7278 
        );
7279 
 
7280 
        ulight_fifo_mm_interconnect_0_router_002 router_012 (
7281 
                .sink_ready         (write_data_fifo_tx_s1_agent_rp_ready),           //      sink.ready
7282 
                .sink_valid         (write_data_fifo_tx_s1_agent_rp_valid),           //          .valid
7283 
                .sink_data          (write_data_fifo_tx_s1_agent_rp_data),            //          .data
7284 
                .sink_startofpacket (write_data_fifo_tx_s1_agent_rp_startofpacket),   //          .startofpacket
7285 
                .sink_endofpacket   (write_data_fifo_tx_s1_agent_rp_endofpacket),     //          .endofpacket
7286 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7287 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7288 
                .src_ready          (router_012_src_ready),                           //       src.ready
7289 
                .src_valid          (router_012_src_valid),                           //          .valid
7290 
                .src_data           (router_012_src_data),                            //          .data
7291 
                .src_channel        (router_012_src_channel),                         //          .channel
7292 
                .src_startofpacket  (router_012_src_startofpacket),                   //          .startofpacket
7293 
                .src_endofpacket    (router_012_src_endofpacket)                      //          .endofpacket
7294 
        );
7295 
 
7296 
        ulight_fifo_mm_interconnect_0_router_002 router_013 (
7297 
                .sink_ready         (write_en_tx_s1_agent_rp_ready),                  //      sink.ready
7298 
                .sink_valid         (write_en_tx_s1_agent_rp_valid),                  //          .valid
7299 
                .sink_data          (write_en_tx_s1_agent_rp_data),                   //          .data
7300 
                .sink_startofpacket (write_en_tx_s1_agent_rp_startofpacket),          //          .startofpacket
7301 
                .sink_endofpacket   (write_en_tx_s1_agent_rp_endofpacket),            //          .endofpacket
7302 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7303 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7304 
                .src_ready          (router_013_src_ready),                           //       src.ready
7305 
                .src_valid          (router_013_src_valid),                           //          .valid
7306 
                .src_data           (router_013_src_data),                            //          .data
7307 
                .src_channel        (router_013_src_channel),                         //          .channel
7308 
                .src_startofpacket  (router_013_src_startofpacket),                   //          .startofpacket
7309 
                .src_endofpacket    (router_013_src_endofpacket)                      //          .endofpacket
7310 
        );
7311 
 
7312 
        ulight_fifo_mm_interconnect_0_router_002 router_014 (
7313 
                .sink_ready         (fifo_full_tx_status_s1_agent_rp_ready),          //      sink.ready
7314 
                .sink_valid         (fifo_full_tx_status_s1_agent_rp_valid),          //          .valid
7315 
                .sink_data          (fifo_full_tx_status_s1_agent_rp_data),           //          .data
7316 
                .sink_startofpacket (fifo_full_tx_status_s1_agent_rp_startofpacket),  //          .startofpacket
7317 
                .sink_endofpacket   (fifo_full_tx_status_s1_agent_rp_endofpacket),    //          .endofpacket
7318 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7319 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7320 
                .src_ready          (router_014_src_ready),                           //       src.ready
7321 
                .src_valid          (router_014_src_valid),                           //          .valid
7322 
                .src_data           (router_014_src_data),                            //          .data
7323 
                .src_channel        (router_014_src_channel),                         //          .channel
7324 
                .src_startofpacket  (router_014_src_startofpacket),                   //          .startofpacket
7325 
                .src_endofpacket    (router_014_src_endofpacket)                      //          .endofpacket
7326 
        );
7327 
 
7328 
        ulight_fifo_mm_interconnect_0_router_002 router_015 (
7329 
                .sink_ready         (fifo_empty_tx_status_s1_agent_rp_ready),         //      sink.ready
7330 
                .sink_valid         (fifo_empty_tx_status_s1_agent_rp_valid),         //          .valid
7331 
                .sink_data          (fifo_empty_tx_status_s1_agent_rp_data),          //          .data
7332 
                .sink_startofpacket (fifo_empty_tx_status_s1_agent_rp_startofpacket), //          .startofpacket
7333 
                .sink_endofpacket   (fifo_empty_tx_status_s1_agent_rp_endofpacket),   //          .endofpacket
7334 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7335 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7336 
                .src_ready          (router_015_src_ready),                           //       src.ready
7337 
                .src_valid          (router_015_src_valid),                           //          .valid
7338 
                .src_data           (router_015_src_data),                            //          .data
7339 
                .src_channel        (router_015_src_channel),                         //          .channel
7340 
                .src_startofpacket  (router_015_src_startofpacket),                   //          .startofpacket
7341 
                .src_endofpacket    (router_015_src_endofpacket)                      //          .endofpacket
7342 
        );
7343 
 
7344 
        ulight_fifo_mm_interconnect_0_router_002 router_016 (
7345 
                .sink_ready         (timecode_tx_data_s1_agent_rp_ready),             //      sink.ready
7346 
                .sink_valid         (timecode_tx_data_s1_agent_rp_valid),             //          .valid
7347 
                .sink_data          (timecode_tx_data_s1_agent_rp_data),              //          .data
7348 
                .sink_startofpacket (timecode_tx_data_s1_agent_rp_startofpacket),     //          .startofpacket
7349 
                .sink_endofpacket   (timecode_tx_data_s1_agent_rp_endofpacket),       //          .endofpacket
7350 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7351 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7352 
                .src_ready          (router_016_src_ready),                           //       src.ready
7353 
                .src_valid          (router_016_src_valid),                           //          .valid
7354 
                .src_data           (router_016_src_data),                            //          .data
7355 
                .src_channel        (router_016_src_channel),                         //          .channel
7356 
                .src_startofpacket  (router_016_src_startofpacket),                   //          .startofpacket
7357 
                .src_endofpacket    (router_016_src_endofpacket)                      //          .endofpacket
7358 
        );
7359 
 
7360 
        ulight_fifo_mm_interconnect_0_router_002 router_017 (
7361 
                .sink_ready         (timecode_tx_enable_s1_agent_rp_ready),           //      sink.ready
7362 
                .sink_valid         (timecode_tx_enable_s1_agent_rp_valid),           //          .valid
7363 
                .sink_data          (timecode_tx_enable_s1_agent_rp_data),            //          .data
7364 
                .sink_startofpacket (timecode_tx_enable_s1_agent_rp_startofpacket),   //          .startofpacket
7365 
                .sink_endofpacket   (timecode_tx_enable_s1_agent_rp_endofpacket),     //          .endofpacket
7366 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7367 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7368 
                .src_ready          (router_017_src_ready),                           //       src.ready
7369 
                .src_valid          (router_017_src_valid),                           //          .valid
7370 
                .src_data           (router_017_src_data),                            //          .data
7371 
                .src_channel        (router_017_src_channel),                         //          .channel
7372 
                .src_startofpacket  (router_017_src_startofpacket),                   //          .startofpacket
7373 
                .src_endofpacket    (router_017_src_endofpacket)                      //          .endofpacket
7374 
        );
7375 
 
7376 
        ulight_fifo_mm_interconnect_0_router_002 router_018 (
7377 
                .sink_ready         (timecode_tx_ready_s1_agent_rp_ready),            //      sink.ready
7378 
                .sink_valid         (timecode_tx_ready_s1_agent_rp_valid),            //          .valid
7379 
                .sink_data          (timecode_tx_ready_s1_agent_rp_data),             //          .data
7380 
                .sink_startofpacket (timecode_tx_ready_s1_agent_rp_startofpacket),    //          .startofpacket
7381 
                .sink_endofpacket   (timecode_tx_ready_s1_agent_rp_endofpacket),      //          .endofpacket
7382 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7383 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7384 
                .src_ready          (router_018_src_ready),                           //       src.ready
7385 
                .src_valid          (router_018_src_valid),                           //          .valid
7386 
                .src_data           (router_018_src_data),                            //          .data
7387 
                .src_channel        (router_018_src_channel),                         //          .channel
7388 
                .src_startofpacket  (router_018_src_startofpacket),                   //          .startofpacket
7389 
                .src_endofpacket    (router_018_src_endofpacket)                      //          .endofpacket
7390 
        );
7391 
 
7392 
        ulight_fifo_mm_interconnect_0_router_002 router_019 (
7393 
                .sink_ready         (data_info_s1_agent_rp_ready),                    //      sink.ready
7394 
                .sink_valid         (data_info_s1_agent_rp_valid),                    //          .valid
7395 
                .sink_data          (data_info_s1_agent_rp_data),                     //          .data
7396 
                .sink_startofpacket (data_info_s1_agent_rp_startofpacket),            //          .startofpacket
7397 
                .sink_endofpacket   (data_info_s1_agent_rp_endofpacket),              //          .endofpacket
7398 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7399 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7400 
                .src_ready          (router_019_src_ready),                           //       src.ready
7401 
                .src_valid          (router_019_src_valid),                           //          .valid
7402 
                .src_data           (router_019_src_data),                            //          .data
7403 
                .src_channel        (router_019_src_channel),                         //          .channel
7404 
                .src_startofpacket  (router_019_src_startofpacket),                   //          .startofpacket
7405 
                .src_endofpacket    (router_019_src_endofpacket)                      //          .endofpacket
7406 
        );
7407 
 
7408 
        ulight_fifo_mm_interconnect_0_router_002 router_020 (
7409 
                .sink_ready         (clock_sel_s1_agent_rp_ready),                    //      sink.ready
7410 
                .sink_valid         (clock_sel_s1_agent_rp_valid),                    //          .valid
7411 
                .sink_data          (clock_sel_s1_agent_rp_data),                     //          .data
7412 
                .sink_startofpacket (clock_sel_s1_agent_rp_startofpacket),            //          .startofpacket
7413 
                .sink_endofpacket   (clock_sel_s1_agent_rp_endofpacket),              //          .endofpacket
7414 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7415 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7416 
                .src_ready          (router_020_src_ready),                           //       src.ready
7417 
                .src_valid          (router_020_src_valid),                           //          .valid
7418 
                .src_data           (router_020_src_data),                            //          .data
7419 
                .src_channel        (router_020_src_channel),                         //          .channel
7420 
                .src_startofpacket  (router_020_src_startofpacket),                   //          .startofpacket
7421 
                .src_endofpacket    (router_020_src_endofpacket)                      //          .endofpacket
7422 
        );
7423 
 
7424 
        ulight_fifo_mm_interconnect_0_router_002 router_021 (
7425 
                .sink_ready         (fsm_info_s1_agent_rp_ready),                     //      sink.ready
7426 
                .sink_valid         (fsm_info_s1_agent_rp_valid),                     //          .valid
7427 
                .sink_data          (fsm_info_s1_agent_rp_data),                      //          .data
7428 
                .sink_startofpacket (fsm_info_s1_agent_rp_startofpacket),             //          .startofpacket
7429 
                .sink_endofpacket   (fsm_info_s1_agent_rp_endofpacket),               //          .endofpacket
7430 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7431 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7432 
                .src_ready          (router_021_src_ready),                           //       src.ready
7433 
                .src_valid          (router_021_src_valid),                           //          .valid
7434 
                .src_data           (router_021_src_data),                            //          .data
7435 
                .src_channel        (router_021_src_channel),                         //          .channel
7436 
                .src_startofpacket  (router_021_src_startofpacket),                   //          .startofpacket
7437 
                .src_endofpacket    (router_021_src_endofpacket)                      //          .endofpacket
7438 
        );
7439 
 
7440 
        ulight_fifo_mm_interconnect_0_router_002 router_022 (
7441 
                .sink_ready         (counter_tx_fifo_s1_agent_rp_ready),              //      sink.ready
7442 
                .sink_valid         (counter_tx_fifo_s1_agent_rp_valid),              //          .valid
7443 
                .sink_data          (counter_tx_fifo_s1_agent_rp_data),               //          .data
7444 
                .sink_startofpacket (counter_tx_fifo_s1_agent_rp_startofpacket),      //          .startofpacket
7445 
                .sink_endofpacket   (counter_tx_fifo_s1_agent_rp_endofpacket),        //          .endofpacket
7446 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7447 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7448 
                .src_ready          (router_022_src_ready),                           //       src.ready
7449 
                .src_valid          (router_022_src_valid),                           //          .valid
7450 
                .src_data           (router_022_src_data),                            //          .data
7451 
                .src_channel        (router_022_src_channel),                         //          .channel
7452 
                .src_startofpacket  (router_022_src_startofpacket),                   //          .startofpacket
7453 
                .src_endofpacket    (router_022_src_endofpacket)                      //          .endofpacket
7454 
        );
7455 
 
7456 
        ulight_fifo_mm_interconnect_0_router_002 router_023 (
7457 
                .sink_ready         (counter_rx_fifo_s1_agent_rp_ready),              //      sink.ready
7458 
                .sink_valid         (counter_rx_fifo_s1_agent_rp_valid),              //          .valid
7459 
                .sink_data          (counter_rx_fifo_s1_agent_rp_data),               //          .data
7460 
                .sink_startofpacket (counter_rx_fifo_s1_agent_rp_startofpacket),      //          .startofpacket
7461 
                .sink_endofpacket   (counter_rx_fifo_s1_agent_rp_endofpacket),        //          .endofpacket
7462 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
7463 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7464 
                .src_ready          (router_023_src_ready),                           //       src.ready
7465 
                .src_valid          (router_023_src_valid),                           //          .valid
7466 
                .src_data           (router_023_src_data),                            //          .data
7467 
                .src_channel        (router_023_src_channel),                         //          .channel
7468 
                .src_startofpacket  (router_023_src_startofpacket),                   //          .startofpacket
7469 
                .src_endofpacket    (router_023_src_endofpacket)                      //          .endofpacket
7470 
        );
7471 
 
7472 
        altera_merlin_traffic_limiter #(
7473 
                .PKT_DEST_ID_H             (104),
7474 
                .PKT_DEST_ID_L             (100),
7475 
                .PKT_SRC_ID_H              (99),
7476 
                .PKT_SRC_ID_L              (95),
7477 
                .PKT_BYTE_CNT_H            (78),
7478 
                .PKT_BYTE_CNT_L            (72),
7479 
                .PKT_BYTEEN_H              (35),
7480 
                .PKT_BYTEEN_L              (32),
7481 
                .PKT_TRANS_POSTED          (67),
7482 
                .PKT_TRANS_WRITE           (68),
7483 
                .MAX_OUTSTANDING_RESPONSES (3),
7484 
                .PIPELINED                 (0),
7485 
                .ST_DATA_W                 (129),
7486 
                .ST_CHANNEL_W              (22),
7487 
                .VALID_WIDTH               (22),
7488 
                .ENFORCE_ORDER             (1),
7489 
                .PREVENT_HAZARDS           (0),
7490 
                .SUPPORTS_POSTED_WRITES    (1),
7491 
                .SUPPORTS_NONPOSTED_WRITES (0),
7492 
                .REORDER                   (0)
7493 
        ) hps_0_h2f_axi_master_wr_limiter (
7494 
                .clk                    (clk_0_clk_clk),                                                    //       clk.clk
7495 
                .reset                  (hps_0_h2f_axi_master_agent_clk_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7496 
                .cmd_sink_ready         (router_src_ready),                                                 //  cmd_sink.ready
7497 
                .cmd_sink_valid         (router_src_valid),                                                 //          .valid
7498 
                .cmd_sink_data          (router_src_data),                                                  //          .data
7499 
                .cmd_sink_channel       (router_src_channel),                                               //          .channel
7500 
                .cmd_sink_startofpacket (router_src_startofpacket),                                         //          .startofpacket
7501 
                .cmd_sink_endofpacket   (router_src_endofpacket),                                           //          .endofpacket
7502 
                .cmd_src_ready          (hps_0_h2f_axi_master_wr_limiter_cmd_src_ready),                    //   cmd_src.ready
7503 
                .cmd_src_data           (hps_0_h2f_axi_master_wr_limiter_cmd_src_data),                     //          .data
7504 
                .cmd_src_channel        (hps_0_h2f_axi_master_wr_limiter_cmd_src_channel),                  //          .channel
7505 
                .cmd_src_startofpacket  (hps_0_h2f_axi_master_wr_limiter_cmd_src_startofpacket),            //          .startofpacket
7506 
                .cmd_src_endofpacket    (hps_0_h2f_axi_master_wr_limiter_cmd_src_endofpacket),              //          .endofpacket
7507 
                .rsp_sink_ready         (rsp_mux_src_ready),                                                //  rsp_sink.ready
7508 
                .rsp_sink_valid         (rsp_mux_src_valid),                                                //          .valid
7509 
                .rsp_sink_channel       (rsp_mux_src_channel),                                              //          .channel
7510 
                .rsp_sink_data          (rsp_mux_src_data),                                                 //          .data
7511 
                .rsp_sink_startofpacket (rsp_mux_src_startofpacket),                                        //          .startofpacket
7512 
                .rsp_sink_endofpacket   (rsp_mux_src_endofpacket),                                          //          .endofpacket
7513 
                .rsp_src_ready          (hps_0_h2f_axi_master_wr_limiter_rsp_src_ready),                    //   rsp_src.ready
7514 
                .rsp_src_valid          (hps_0_h2f_axi_master_wr_limiter_rsp_src_valid),                    //          .valid
7515 
                .rsp_src_data           (hps_0_h2f_axi_master_wr_limiter_rsp_src_data),                     //          .data
7516 
                .rsp_src_channel        (hps_0_h2f_axi_master_wr_limiter_rsp_src_channel),                  //          .channel
7517 
                .rsp_src_startofpacket  (hps_0_h2f_axi_master_wr_limiter_rsp_src_startofpacket),            //          .startofpacket
7518 
                .rsp_src_endofpacket    (hps_0_h2f_axi_master_wr_limiter_rsp_src_endofpacket),              //          .endofpacket
7519 
                .cmd_src_valid          (hps_0_h2f_axi_master_wr_limiter_cmd_valid_data)                    // cmd_valid.data
7520 
        );
7521 
 
7522 
        altera_merlin_traffic_limiter #(
7523 
                .PKT_DEST_ID_H             (104),
7524 
                .PKT_DEST_ID_L             (100),
7525 
                .PKT_SRC_ID_H              (99),
7526 
                .PKT_SRC_ID_L              (95),
7527 
                .PKT_BYTE_CNT_H            (78),
7528 
                .PKT_BYTE_CNT_L            (72),
7529 
                .PKT_BYTEEN_H              (35),
7530 
                .PKT_BYTEEN_L              (32),
7531 
                .PKT_TRANS_POSTED          (67),
7532 
                .PKT_TRANS_WRITE           (68),
7533 
                .MAX_OUTSTANDING_RESPONSES (3),
7534 
                .PIPELINED                 (0),
7535 
                .ST_DATA_W                 (129),
7536 
                .ST_CHANNEL_W              (22),
7537 
                .VALID_WIDTH               (22),
7538 
                .ENFORCE_ORDER             (1),
7539 
                .PREVENT_HAZARDS           (0),
7540 
                .SUPPORTS_POSTED_WRITES    (1),
7541 
                .SUPPORTS_NONPOSTED_WRITES (0),
7542 
                .REORDER                   (0)
7543 
        ) hps_0_h2f_axi_master_rd_limiter (
7544 
                .clk                    (clk_0_clk_clk),                                                    //       clk.clk
7545 
                .reset                  (hps_0_h2f_axi_master_agent_clk_reset_reset_bridge_in_reset_reset), // clk_reset.reset
7546 
                .cmd_sink_ready         (router_001_src_ready),                                             //  cmd_sink.ready
7547 
                .cmd_sink_valid         (router_001_src_valid),                                             //          .valid
7548 
                .cmd_sink_data          (router_001_src_data),                                              //          .data
7549 
                .cmd_sink_channel       (router_001_src_channel),                                           //          .channel
7550 
                .cmd_sink_startofpacket (router_001_src_startofpacket),                                     //          .startofpacket
7551 
                .cmd_sink_endofpacket   (router_001_src_endofpacket),                                       //          .endofpacket
7552 
                .cmd_src_ready          (hps_0_h2f_axi_master_rd_limiter_cmd_src_ready),                    //   cmd_src.ready
7553 
                .cmd_src_data           (hps_0_h2f_axi_master_rd_limiter_cmd_src_data),                     //          .data
7554 
                .cmd_src_channel        (hps_0_h2f_axi_master_rd_limiter_cmd_src_channel),                  //          .channel
7555 
                .cmd_src_startofpacket  (hps_0_h2f_axi_master_rd_limiter_cmd_src_startofpacket),            //          .startofpacket
7556 
                .cmd_src_endofpacket    (hps_0_h2f_axi_master_rd_limiter_cmd_src_endofpacket),              //          .endofpacket
7557 
                .rsp_sink_ready         (rsp_mux_001_src_ready),                                            //  rsp_sink.ready
7558 
                .rsp_sink_valid         (rsp_mux_001_src_valid),                                            //          .valid
7559 
                .rsp_sink_channel       (rsp_mux_001_src_channel),                                          //          .channel
7560 
                .rsp_sink_data          (rsp_mux_001_src_data),                                             //          .data
7561 
                .rsp_sink_startofpacket (rsp_mux_001_src_startofpacket),                                    //          .startofpacket
7562 
                .rsp_sink_endofpacket   (rsp_mux_001_src_endofpacket),                                      //          .endofpacket
7563 
                .rsp_src_ready          (hps_0_h2f_axi_master_rd_limiter_rsp_src_ready),                    //   rsp_src.ready
7564 
                .rsp_src_valid          (hps_0_h2f_axi_master_rd_limiter_rsp_src_valid),                    //          .valid
7565 
                .rsp_src_data           (hps_0_h2f_axi_master_rd_limiter_rsp_src_data),                     //          .data
7566 
                .rsp_src_channel        (hps_0_h2f_axi_master_rd_limiter_rsp_src_channel),                  //          .channel
7567 
                .rsp_src_startofpacket  (hps_0_h2f_axi_master_rd_limiter_rsp_src_startofpacket),            //          .startofpacket
7568 
                .rsp_src_endofpacket    (hps_0_h2f_axi_master_rd_limiter_rsp_src_endofpacket),              //          .endofpacket
7569 
                .cmd_src_valid          (hps_0_h2f_axi_master_rd_limiter_cmd_valid_data)                    // cmd_valid.data
7570 
        );
7571 
 
7572 
        altera_merlin_burst_adapter #(
7573 
                .PKT_ADDR_H                (65),
7574 
                .PKT_ADDR_L                (36),
7575 
                .PKT_BEGIN_BURST           (93),
7576 
                .PKT_BYTE_CNT_H            (78),
7577 
                .PKT_BYTE_CNT_L            (72),
7578 
                .PKT_BYTEEN_H              (35),
7579 
                .PKT_BYTEEN_L              (32),
7580 
                .PKT_BURST_SIZE_H          (88),
7581 
                .PKT_BURST_SIZE_L          (86),
7582 
                .PKT_BURST_TYPE_H          (90),
7583 
                .PKT_BURST_TYPE_L          (89),
7584 
                .PKT_BURSTWRAP_H           (85),
7585 
                .PKT_BURSTWRAP_L           (79),
7586 
                .PKT_TRANS_COMPRESSED_READ (66),
7587 
                .PKT_TRANS_WRITE           (68),
7588 
                .PKT_TRANS_READ            (69),
7589 
                .OUT_NARROW_SIZE           (0),
7590 
                .IN_NARROW_SIZE            (1),
7591 
                .OUT_FIXED                 (0),
7592 
                .OUT_COMPLETE_WRAP         (0),
7593 
                .ST_DATA_W                 (129),
7594 
                .ST_CHANNEL_W              (22),
7595 
                .OUT_BYTE_CNT_H            (74),
7596 
                .OUT_BURSTWRAP_H           (85),
7597 
                .COMPRESSED_READ_SUPPORT   (1),
7598 
                .BYTEENABLE_SYNTHESIS      (1),
7599 
                .PIPE_INPUTS               (0),
7600 
                .NO_WRAP_SUPPORT           (0),
7601 
                .INCOMPLETE_WRAP_SUPPORT   (0),
7602 
                .BURSTWRAP_CONST_MASK      (0),
7603 
                .BURSTWRAP_CONST_VALUE     (0),
7604 
                .ADAPTER_VERSION           ("13.1")
7605 
        ) led_pio_test_s1_burst_adapter (
7606 
                .clk                   (clk_0_clk_clk),                                       //       cr0.clk
7607 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),      // cr0_reset.reset
7608 
                .sink0_valid           (cmd_mux_src_valid),                                   //     sink0.valid
7609 
                .sink0_data            (cmd_mux_src_data),                                    //          .data
7610 
                .sink0_channel         (cmd_mux_src_channel),                                 //          .channel
7611 
                .sink0_startofpacket   (cmd_mux_src_startofpacket),                           //          .startofpacket
7612 
                .sink0_endofpacket     (cmd_mux_src_endofpacket),                             //          .endofpacket
7613 
                .sink0_ready           (cmd_mux_src_ready),                                   //          .ready
7614 
                .source0_valid         (led_pio_test_s1_burst_adapter_source0_valid),         //   source0.valid
7615 
                .source0_data          (led_pio_test_s1_burst_adapter_source0_data),          //          .data
7616 
                .source0_channel       (led_pio_test_s1_burst_adapter_source0_channel),       //          .channel
7617 
                .source0_startofpacket (led_pio_test_s1_burst_adapter_source0_startofpacket), //          .startofpacket
7618 
                .source0_endofpacket   (led_pio_test_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
7619 
                .source0_ready         (led_pio_test_s1_burst_adapter_source0_ready)          //          .ready
7620 
        );
7621 
 
7622 
        altera_merlin_burst_adapter #(
7623 
                .PKT_ADDR_H                (65),
7624 
                .PKT_ADDR_L                (36),
7625 
                .PKT_BEGIN_BURST           (93),
7626 
                .PKT_BYTE_CNT_H            (78),
7627 
                .PKT_BYTE_CNT_L            (72),
7628 
                .PKT_BYTEEN_H              (35),
7629 
                .PKT_BYTEEN_L              (32),
7630 
                .PKT_BURST_SIZE_H          (88),
7631 
                .PKT_BURST_SIZE_L          (86),
7632 
                .PKT_BURST_TYPE_H          (90),
7633 
                .PKT_BURST_TYPE_L          (89),
7634 
                .PKT_BURSTWRAP_H           (85),
7635 
                .PKT_BURSTWRAP_L           (79),
7636 
                .PKT_TRANS_COMPRESSED_READ (66),
7637 
                .PKT_TRANS_WRITE           (68),
7638 
                .PKT_TRANS_READ            (69),
7639 
                .OUT_NARROW_SIZE           (0),
7640 
                .IN_NARROW_SIZE            (1),
7641 
                .OUT_FIXED                 (0),
7642 
                .OUT_COMPLETE_WRAP         (0),
7643 
                .ST_DATA_W                 (129),
7644 
                .ST_CHANNEL_W              (22),
7645 
                .OUT_BYTE_CNT_H            (74),
7646 
                .OUT_BURSTWRAP_H           (85),
7647 
                .COMPRESSED_READ_SUPPORT   (1),
7648 
                .BYTEENABLE_SYNTHESIS      (1),
7649 
                .PIPE_INPUTS               (0),
7650 
                .NO_WRAP_SUPPORT           (0),
7651 
                .INCOMPLETE_WRAP_SUPPORT   (0),
7652 
                .BURSTWRAP_CONST_MASK      (0),
7653 
                .BURSTWRAP_CONST_VALUE     (0),
7654 
                .ADAPTER_VERSION           ("13.1")
7655 
        ) timecode_rx_s1_burst_adapter (
7656 
                .clk                   (clk_0_clk_clk),                                      //       cr0.clk
7657 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),     // cr0_reset.reset
7658 
                .sink0_valid           (cmd_mux_001_src_valid),                              //     sink0.valid
7659 
                .sink0_data            (cmd_mux_001_src_data),                               //          .data
7660 
                .sink0_channel         (cmd_mux_001_src_channel),                            //          .channel
7661 
                .sink0_startofpacket   (cmd_mux_001_src_startofpacket),                      //          .startofpacket
7662 
                .sink0_endofpacket     (cmd_mux_001_src_endofpacket),                        //          .endofpacket
7663 
                .sink0_ready           (cmd_mux_001_src_ready),                              //          .ready
7664 
                .source0_valid         (timecode_rx_s1_burst_adapter_source0_valid),         //   source0.valid
7665 
                .source0_data          (timecode_rx_s1_burst_adapter_source0_data),          //          .data
7666 
                .source0_channel       (timecode_rx_s1_burst_adapter_source0_channel),       //          .channel
7667 
                .source0_startofpacket (timecode_rx_s1_burst_adapter_source0_startofpacket), //          .startofpacket
7668 
                .source0_endofpacket   (timecode_rx_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
7669 
                .source0_ready         (timecode_rx_s1_burst_adapter_source0_ready)          //          .ready
7670 
        );
7671 
 
7672 
        altera_merlin_burst_adapter #(
7673 
                .PKT_ADDR_H                (65),
7674 
                .PKT_ADDR_L                (36),
7675 
                .PKT_BEGIN_BURST           (93),
7676 
                .PKT_BYTE_CNT_H            (78),
7677 
                .PKT_BYTE_CNT_L            (72),
7678 
                .PKT_BYTEEN_H              (35),
7679 
                .PKT_BYTEEN_L              (32),
7680 
                .PKT_BURST_SIZE_H          (88),
7681 
                .PKT_BURST_SIZE_L          (86),
7682 
                .PKT_BURST_TYPE_H          (90),
7683 
                .PKT_BURST_TYPE_L          (89),
7684 
                .PKT_BURSTWRAP_H           (85),
7685 
                .PKT_BURSTWRAP_L           (79),
7686 
                .PKT_TRANS_COMPRESSED_READ (66),
7687 
                .PKT_TRANS_WRITE           (68),
7688 
                .PKT_TRANS_READ            (69),
7689 
                .OUT_NARROW_SIZE           (0),
7690 
                .IN_NARROW_SIZE            (1),
7691 
                .OUT_FIXED                 (0),
7692 
                .OUT_COMPLETE_WRAP         (0),
7693 
                .ST_DATA_W                 (129),
7694 
                .ST_CHANNEL_W              (22),
7695 
                .OUT_BYTE_CNT_H            (74),
7696 
                .OUT_BURSTWRAP_H           (85),
7697 
                .COMPRESSED_READ_SUPPORT   (1),
7698 
                .BYTEENABLE_SYNTHESIS      (1),
7699 
                .PIPE_INPUTS               (0),
7700 
                .NO_WRAP_SUPPORT           (0),
7701 
                .INCOMPLETE_WRAP_SUPPORT   (0),
7702 
                .BURSTWRAP_CONST_MASK      (0),
7703 
                .BURSTWRAP_CONST_VALUE     (0),
7704 
                .ADAPTER_VERSION           ("13.1")
7705 
        ) timecode_ready_rx_s1_burst_adapter (
7706 
                .clk                   (clk_0_clk_clk),                                            //       cr0.clk
7707 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),           // cr0_reset.reset
7708 
                .sink0_valid           (cmd_mux_002_src_valid),                                    //     sink0.valid
7709 
                .sink0_data            (cmd_mux_002_src_data),                                     //          .data
7710 
                .sink0_channel         (cmd_mux_002_src_channel),                                  //          .channel
7711 
                .sink0_startofpacket   (cmd_mux_002_src_startofpacket),                            //          .startofpacket
7712 
                .sink0_endofpacket     (cmd_mux_002_src_endofpacket),                              //          .endofpacket
7713 
                .sink0_ready           (cmd_mux_002_src_ready),                                    //          .ready
7714 
                .source0_valid         (timecode_ready_rx_s1_burst_adapter_source0_valid),         //   source0.valid
7715 
                .source0_data          (timecode_ready_rx_s1_burst_adapter_source0_data),          //          .data
7716 
                .source0_channel       (timecode_ready_rx_s1_burst_adapter_source0_channel),       //          .channel
7717 
                .source0_startofpacket (timecode_ready_rx_s1_burst_adapter_source0_startofpacket), //          .startofpacket
7718 
                .source0_endofpacket   (timecode_ready_rx_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
7719 
                .source0_ready         (timecode_ready_rx_s1_burst_adapter_source0_ready)          //          .ready
7720 
        );
7721 
 
7722 
        altera_merlin_burst_adapter #(
7723 
                .PKT_ADDR_H                (65),
7724 
                .PKT_ADDR_L                (36),
7725 
                .PKT_BEGIN_BURST           (93),
7726 
                .PKT_BYTE_CNT_H            (78),
7727 
                .PKT_BYTE_CNT_L            (72),
7728 
                .PKT_BYTEEN_H              (35),
7729 
                .PKT_BYTEEN_L              (32),
7730 
                .PKT_BURST_SIZE_H          (88),
7731 
                .PKT_BURST_SIZE_L          (86),
7732 
                .PKT_BURST_TYPE_H          (90),
7733 
                .PKT_BURST_TYPE_L          (89),
7734 
                .PKT_BURSTWRAP_H           (85),
7735 
                .PKT_BURSTWRAP_L           (79),
7736 
                .PKT_TRANS_COMPRESSED_READ (66),
7737 
                .PKT_TRANS_WRITE           (68),
7738 
                .PKT_TRANS_READ            (69),
7739 
                .OUT_NARROW_SIZE           (0),
7740 
                .IN_NARROW_SIZE            (1),
7741 
                .OUT_FIXED                 (0),
7742 
                .OUT_COMPLETE_WRAP         (0),
7743 
                .ST_DATA_W                 (129),
7744 
                .ST_CHANNEL_W              (22),
7745 
                .OUT_BYTE_CNT_H            (74),
7746 
                .OUT_BURSTWRAP_H           (85),
7747 
                .COMPRESSED_READ_SUPPORT   (1),
7748 
                .BYTEENABLE_SYNTHESIS      (1),
7749 
                .PIPE_INPUTS               (0),
7750 
                .NO_WRAP_SUPPORT           (0),
7751 
                .INCOMPLETE_WRAP_SUPPORT   (0),
7752 
                .BURSTWRAP_CONST_MASK      (0),
7753 
                .BURSTWRAP_CONST_VALUE     (0),
7754 
                .ADAPTER_VERSION           ("13.1")
7755 
        ) data_flag_rx_s1_burst_adapter (
7756 
                .clk                   (clk_0_clk_clk),                                       //       cr0.clk
7757 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),      // cr0_reset.reset
7758 
                .sink0_valid           (cmd_mux_003_src_valid),                               //     sink0.valid
7759 
                .sink0_data            (cmd_mux_003_src_data),                                //          .data
7760 
                .sink0_channel         (cmd_mux_003_src_channel),                             //          .channel
7761 
                .sink0_startofpacket   (cmd_mux_003_src_startofpacket),                       //          .startofpacket
7762 
                .sink0_endofpacket     (cmd_mux_003_src_endofpacket),                         //          .endofpacket
7763 
                .sink0_ready           (cmd_mux_003_src_ready),                               //          .ready
7764 
                .source0_valid         (data_flag_rx_s1_burst_adapter_source0_valid),         //   source0.valid
7765 
                .source0_data          (data_flag_rx_s1_burst_adapter_source0_data),          //          .data
7766 
                .source0_channel       (data_flag_rx_s1_burst_adapter_source0_channel),       //          .channel
7767 
                .source0_startofpacket (data_flag_rx_s1_burst_adapter_source0_startofpacket), //          .startofpacket
7768 
                .source0_endofpacket   (data_flag_rx_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
7769 
                .source0_ready         (data_flag_rx_s1_burst_adapter_source0_ready)          //          .ready
7770 
        );
7771 
 
7772 
        altera_merlin_burst_adapter #(
7773 
                .PKT_ADDR_H                (65),
7774 
                .PKT_ADDR_L                (36),
7775 
                .PKT_BEGIN_BURST           (93),
7776 
                .PKT_BYTE_CNT_H            (78),
7777 
                .PKT_BYTE_CNT_L            (72),
7778 
                .PKT_BYTEEN_H              (35),
7779 
                .PKT_BYTEEN_L              (32),
7780 
                .PKT_BURST_SIZE_H          (88),
7781 
                .PKT_BURST_SIZE_L          (86),
7782 
                .PKT_BURST_TYPE_H          (90),
7783 
                .PKT_BURST_TYPE_L          (89),
7784 
                .PKT_BURSTWRAP_H           (85),
7785 
                .PKT_BURSTWRAP_L           (79),
7786 
                .PKT_TRANS_COMPRESSED_READ (66),
7787 
                .PKT_TRANS_WRITE           (68),
7788 
                .PKT_TRANS_READ            (69),
7789 
                .OUT_NARROW_SIZE           (0),
7790 
                .IN_NARROW_SIZE            (1),
7791 
                .OUT_FIXED                 (0),
7792 
                .OUT_COMPLETE_WRAP         (0),
7793 
                .ST_DATA_W                 (129),
7794 
                .ST_CHANNEL_W              (22),
7795 
                .OUT_BYTE_CNT_H            (74),
7796 
                .OUT_BURSTWRAP_H           (85),
7797 
                .COMPRESSED_READ_SUPPORT   (1),
7798 
                .BYTEENABLE_SYNTHESIS      (1),
7799 
                .PIPE_INPUTS               (0),
7800 
                .NO_WRAP_SUPPORT           (0),
7801 
                .INCOMPLETE_WRAP_SUPPORT   (0),
7802 
                .BURSTWRAP_CONST_MASK      (0),
7803 
                .BURSTWRAP_CONST_VALUE     (0),
7804 
                .ADAPTER_VERSION           ("13.1")
7805 
        ) data_read_en_rx_s1_burst_adapter (
7806 
                .clk                   (clk_0_clk_clk),                                          //       cr0.clk
7807 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),         // cr0_reset.reset
7808 
                .sink0_valid           (cmd_mux_004_src_valid),                                  //     sink0.valid
7809 
                .sink0_data            (cmd_mux_004_src_data),                                   //          .data
7810 
                .sink0_channel         (cmd_mux_004_src_channel),                                //          .channel
7811 
                .sink0_startofpacket   (cmd_mux_004_src_startofpacket),                          //          .startofpacket
7812 
                .sink0_endofpacket     (cmd_mux_004_src_endofpacket),                            //          .endofpacket
7813 
                .sink0_ready           (cmd_mux_004_src_ready),                                  //          .ready
7814 
                .source0_valid         (data_read_en_rx_s1_burst_adapter_source0_valid),         //   source0.valid
7815 
                .source0_data          (data_read_en_rx_s1_burst_adapter_source0_data),          //          .data
7816 
                .source0_channel       (data_read_en_rx_s1_burst_adapter_source0_channel),       //          .channel
7817 
                .source0_startofpacket (data_read_en_rx_s1_burst_adapter_source0_startofpacket), //          .startofpacket
7818 
                .source0_endofpacket   (data_read_en_rx_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
7819 
                .source0_ready         (data_read_en_rx_s1_burst_adapter_source0_ready)          //          .ready
7820 
        );
7821 
 
7822 
        altera_merlin_burst_adapter #(
7823 
                .PKT_ADDR_H                (65),
7824 
                .PKT_ADDR_L                (36),
7825 
                .PKT_BEGIN_BURST           (93),
7826 
                .PKT_BYTE_CNT_H            (78),
7827 
                .PKT_BYTE_CNT_L            (72),
7828 
                .PKT_BYTEEN_H              (35),
7829 
                .PKT_BYTEEN_L              (32),
7830 
                .PKT_BURST_SIZE_H          (88),
7831 
                .PKT_BURST_SIZE_L          (86),
7832 
                .PKT_BURST_TYPE_H          (90),
7833 
                .PKT_BURST_TYPE_L          (89),
7834 
                .PKT_BURSTWRAP_H           (85),
7835 
                .PKT_BURSTWRAP_L           (79),
7836 
                .PKT_TRANS_COMPRESSED_READ (66),
7837 
                .PKT_TRANS_WRITE           (68),
7838 
                .PKT_TRANS_READ            (69),
7839 
                .OUT_NARROW_SIZE           (0),
7840 
                .IN_NARROW_SIZE            (1),
7841 
                .OUT_FIXED                 (0),
7842 
                .OUT_COMPLETE_WRAP         (0),
7843 
                .ST_DATA_W                 (129),
7844 
                .ST_CHANNEL_W              (22),
7845 
                .OUT_BYTE_CNT_H            (74),
7846 
                .OUT_BURSTWRAP_H           (85),
7847 
                .COMPRESSED_READ_SUPPORT   (1),
7848 
                .BYTEENABLE_SYNTHESIS      (1),
7849 
                .PIPE_INPUTS               (0),
7850 
                .NO_WRAP_SUPPORT           (0),
7851 
                .INCOMPLETE_WRAP_SUPPORT   (0),
7852 
                .BURSTWRAP_CONST_MASK      (0),
7853 
                .BURSTWRAP_CONST_VALUE     (0),
7854 
                .ADAPTER_VERSION           ("13.1")
7855 
        ) fifo_full_rx_status_s1_burst_adapter (
7856 
                .clk                   (clk_0_clk_clk),                                              //       cr0.clk
7857 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),             // cr0_reset.reset
7858 
                .sink0_valid           (cmd_mux_005_src_valid),                                      //     sink0.valid
7859 
                .sink0_data            (cmd_mux_005_src_data),                                       //          .data
7860 
                .sink0_channel         (cmd_mux_005_src_channel),                                    //          .channel
7861 
                .sink0_startofpacket   (cmd_mux_005_src_startofpacket),                              //          .startofpacket
7862 
                .sink0_endofpacket     (cmd_mux_005_src_endofpacket),                                //          .endofpacket
7863 
                .sink0_ready           (cmd_mux_005_src_ready),                                      //          .ready
7864 
                .source0_valid         (fifo_full_rx_status_s1_burst_adapter_source0_valid),         //   source0.valid
7865 
                .source0_data          (fifo_full_rx_status_s1_burst_adapter_source0_data),          //          .data
7866 
                .source0_channel       (fifo_full_rx_status_s1_burst_adapter_source0_channel),       //          .channel
7867 
                .source0_startofpacket (fifo_full_rx_status_s1_burst_adapter_source0_startofpacket), //          .startofpacket
7868 
                .source0_endofpacket   (fifo_full_rx_status_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
7869 
                .source0_ready         (fifo_full_rx_status_s1_burst_adapter_source0_ready)          //          .ready
7870 
        );
7871 
 
7872 
        altera_merlin_burst_adapter #(
7873 
                .PKT_ADDR_H                (65),
7874 
                .PKT_ADDR_L                (36),
7875 
                .PKT_BEGIN_BURST           (93),
7876 
                .PKT_BYTE_CNT_H            (78),
7877 
                .PKT_BYTE_CNT_L            (72),
7878 
                .PKT_BYTEEN_H              (35),
7879 
                .PKT_BYTEEN_L              (32),
7880 
                .PKT_BURST_SIZE_H          (88),
7881 
                .PKT_BURST_SIZE_L          (86),
7882 
                .PKT_BURST_TYPE_H          (90),
7883 
                .PKT_BURST_TYPE_L          (89),
7884 
                .PKT_BURSTWRAP_H           (85),
7885 
                .PKT_BURSTWRAP_L           (79),
7886 
                .PKT_TRANS_COMPRESSED_READ (66),
7887 
                .PKT_TRANS_WRITE           (68),
7888 
                .PKT_TRANS_READ            (69),
7889 
                .OUT_NARROW_SIZE           (0),
7890 
                .IN_NARROW_SIZE            (1),
7891 
                .OUT_FIXED                 (0),
7892 
                .OUT_COMPLETE_WRAP         (0),
7893 
                .ST_DATA_W                 (129),
7894 
                .ST_CHANNEL_W              (22),
7895 
                .OUT_BYTE_CNT_H            (74),
7896 
                .OUT_BURSTWRAP_H           (85),
7897 
                .COMPRESSED_READ_SUPPORT   (1),
7898 
                .BYTEENABLE_SYNTHESIS      (1),
7899 
                .PIPE_INPUTS               (0),
7900 
                .NO_WRAP_SUPPORT           (0),
7901 
                .INCOMPLETE_WRAP_SUPPORT   (0),
7902 
                .BURSTWRAP_CONST_MASK      (0),
7903 
                .BURSTWRAP_CONST_VALUE     (0),
7904 
                .ADAPTER_VERSION           ("13.1")
7905 
        ) fifo_empty_rx_status_s1_burst_adapter (
7906 
                .clk                   (clk_0_clk_clk),                                               //       cr0.clk
7907 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),              // cr0_reset.reset
7908 
                .sink0_valid           (cmd_mux_006_src_valid),                                       //     sink0.valid
7909 
                .sink0_data            (cmd_mux_006_src_data),                                        //          .data
7910 
                .sink0_channel         (cmd_mux_006_src_channel),                                     //          .channel
7911 
                .sink0_startofpacket   (cmd_mux_006_src_startofpacket),                               //          .startofpacket
7912 
                .sink0_endofpacket     (cmd_mux_006_src_endofpacket),                                 //          .endofpacket
7913 
                .sink0_ready           (cmd_mux_006_src_ready),                                       //          .ready
7914 
                .source0_valid         (fifo_empty_rx_status_s1_burst_adapter_source0_valid),         //   source0.valid
7915 
                .source0_data          (fifo_empty_rx_status_s1_burst_adapter_source0_data),          //          .data
7916 
                .source0_channel       (fifo_empty_rx_status_s1_burst_adapter_source0_channel),       //          .channel
7917 
                .source0_startofpacket (fifo_empty_rx_status_s1_burst_adapter_source0_startofpacket), //          .startofpacket
7918 
                .source0_endofpacket   (fifo_empty_rx_status_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
7919 
                .source0_ready         (fifo_empty_rx_status_s1_burst_adapter_source0_ready)          //          .ready
7920 
        );
7921 
 
7922 
        altera_merlin_burst_adapter #(
7923 
                .PKT_ADDR_H                (65),
7924 
                .PKT_ADDR_L                (36),
7925 
                .PKT_BEGIN_BURST           (93),
7926 
                .PKT_BYTE_CNT_H            (78),
7927 
                .PKT_BYTE_CNT_L            (72),
7928 
                .PKT_BYTEEN_H              (35),
7929 
                .PKT_BYTEEN_L              (32),
7930 
                .PKT_BURST_SIZE_H          (88),
7931 
                .PKT_BURST_SIZE_L          (86),
7932 
                .PKT_BURST_TYPE_H          (90),
7933 
                .PKT_BURST_TYPE_L          (89),
7934 
                .PKT_BURSTWRAP_H           (85),
7935 
                .PKT_BURSTWRAP_L           (79),
7936 
                .PKT_TRANS_COMPRESSED_READ (66),
7937 
                .PKT_TRANS_WRITE           (68),
7938 
                .PKT_TRANS_READ            (69),
7939 
                .OUT_NARROW_SIZE           (0),
7940 
                .IN_NARROW_SIZE            (1),
7941 
                .OUT_FIXED                 (0),
7942 
                .OUT_COMPLETE_WRAP         (0),
7943 
                .ST_DATA_W                 (129),
7944 
                .ST_CHANNEL_W              (22),
7945 
                .OUT_BYTE_CNT_H            (74),
7946 
                .OUT_BURSTWRAP_H           (85),
7947 
                .COMPRESSED_READ_SUPPORT   (1),
7948 
                .BYTEENABLE_SYNTHESIS      (1),
7949 
                .PIPE_INPUTS               (0),
7950 
                .NO_WRAP_SUPPORT           (0),
7951 
                .INCOMPLETE_WRAP_SUPPORT   (0),
7952 
                .BURSTWRAP_CONST_MASK      (0),
7953 
                .BURSTWRAP_CONST_VALUE     (0),
7954 
                .ADAPTER_VERSION           ("13.1")
7955 
        ) link_start_s1_burst_adapter (
7956 
                .clk                   (clk_0_clk_clk),                                     //       cr0.clk
7957 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),    // cr0_reset.reset
7958 
                .sink0_valid           (cmd_mux_007_src_valid),                             //     sink0.valid
7959 
                .sink0_data            (cmd_mux_007_src_data),                              //          .data
7960 
                .sink0_channel         (cmd_mux_007_src_channel),                           //          .channel
7961 
                .sink0_startofpacket   (cmd_mux_007_src_startofpacket),                     //          .startofpacket
7962 
                .sink0_endofpacket     (cmd_mux_007_src_endofpacket),                       //          .endofpacket
7963 
                .sink0_ready           (cmd_mux_007_src_ready),                             //          .ready
7964 
                .source0_valid         (link_start_s1_burst_adapter_source0_valid),         //   source0.valid
7965 
                .source0_data          (link_start_s1_burst_adapter_source0_data),          //          .data
7966 
                .source0_channel       (link_start_s1_burst_adapter_source0_channel),       //          .channel
7967 
                .source0_startofpacket (link_start_s1_burst_adapter_source0_startofpacket), //          .startofpacket
7968 
                .source0_endofpacket   (link_start_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
7969 
                .source0_ready         (link_start_s1_burst_adapter_source0_ready)          //          .ready
7970 
        );
7971 
 
7972 
        altera_merlin_burst_adapter #(
7973 
                .PKT_ADDR_H                (65),
7974 
                .PKT_ADDR_L                (36),
7975 
                .PKT_BEGIN_BURST           (93),
7976 
                .PKT_BYTE_CNT_H            (78),
7977 
                .PKT_BYTE_CNT_L            (72),
7978 
                .PKT_BYTEEN_H              (35),
7979 
                .PKT_BYTEEN_L              (32),
7980 
                .PKT_BURST_SIZE_H          (88),
7981 
                .PKT_BURST_SIZE_L          (86),
7982 
                .PKT_BURST_TYPE_H          (90),
7983 
                .PKT_BURST_TYPE_L          (89),
7984 
                .PKT_BURSTWRAP_H           (85),
7985 
                .PKT_BURSTWRAP_L           (79),
7986 
                .PKT_TRANS_COMPRESSED_READ (66),
7987 
                .PKT_TRANS_WRITE           (68),
7988 
                .PKT_TRANS_READ            (69),
7989 
                .OUT_NARROW_SIZE           (0),
7990 
                .IN_NARROW_SIZE            (1),
7991 
                .OUT_FIXED                 (0),
7992 
                .OUT_COMPLETE_WRAP         (0),
7993 
                .ST_DATA_W                 (129),
7994 
                .ST_CHANNEL_W              (22),
7995 
                .OUT_BYTE_CNT_H            (74),
7996 
                .OUT_BURSTWRAP_H           (85),
7997 
                .COMPRESSED_READ_SUPPORT   (1),
7998 
                .BYTEENABLE_SYNTHESIS      (1),
7999 
                .PIPE_INPUTS               (0),
8000 
                .NO_WRAP_SUPPORT           (0),
8001 
                .INCOMPLETE_WRAP_SUPPORT   (0),
8002 
                .BURSTWRAP_CONST_MASK      (0),
8003 
                .BURSTWRAP_CONST_VALUE     (0),
8004 
                .ADAPTER_VERSION           ("13.1")
8005 
        ) auto_start_s1_burst_adapter (
8006 
                .clk                   (clk_0_clk_clk),                                     //       cr0.clk
8007 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),    // cr0_reset.reset
8008 
                .sink0_valid           (cmd_mux_008_src_valid),                             //     sink0.valid
8009 
                .sink0_data            (cmd_mux_008_src_data),                              //          .data
8010 
                .sink0_channel         (cmd_mux_008_src_channel),                           //          .channel
8011 
                .sink0_startofpacket   (cmd_mux_008_src_startofpacket),                     //          .startofpacket
8012 
                .sink0_endofpacket     (cmd_mux_008_src_endofpacket),                       //          .endofpacket
8013 
                .sink0_ready           (cmd_mux_008_src_ready),                             //          .ready
8014 
                .source0_valid         (auto_start_s1_burst_adapter_source0_valid),         //   source0.valid
8015 
                .source0_data          (auto_start_s1_burst_adapter_source0_data),          //          .data
8016 
                .source0_channel       (auto_start_s1_burst_adapter_source0_channel),       //          .channel
8017 
                .source0_startofpacket (auto_start_s1_burst_adapter_source0_startofpacket), //          .startofpacket
8018 
                .source0_endofpacket   (auto_start_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
8019 
                .source0_ready         (auto_start_s1_burst_adapter_source0_ready)          //          .ready
8020 
        );
8021 
 
8022 
        altera_merlin_burst_adapter #(
8023 
                .PKT_ADDR_H                (65),
8024 
                .PKT_ADDR_L                (36),
8025 
                .PKT_BEGIN_BURST           (93),
8026 
                .PKT_BYTE_CNT_H            (78),
8027 
                .PKT_BYTE_CNT_L            (72),
8028 
                .PKT_BYTEEN_H              (35),
8029 
                .PKT_BYTEEN_L              (32),
8030 
                .PKT_BURST_SIZE_H          (88),
8031 
                .PKT_BURST_SIZE_L          (86),
8032 
                .PKT_BURST_TYPE_H          (90),
8033 
                .PKT_BURST_TYPE_L          (89),
8034 
                .PKT_BURSTWRAP_H           (85),
8035 
                .PKT_BURSTWRAP_L           (79),
8036 
                .PKT_TRANS_COMPRESSED_READ (66),
8037 
                .PKT_TRANS_WRITE           (68),
8038 
                .PKT_TRANS_READ            (69),
8039 
                .OUT_NARROW_SIZE           (0),
8040 
                .IN_NARROW_SIZE            (1),
8041 
                .OUT_FIXED                 (0),
8042 
                .OUT_COMPLETE_WRAP         (0),
8043 
                .ST_DATA_W                 (129),
8044 
                .ST_CHANNEL_W              (22),
8045 
                .OUT_BYTE_CNT_H            (74),
8046 
                .OUT_BURSTWRAP_H           (85),
8047 
                .COMPRESSED_READ_SUPPORT   (1),
8048 
                .BYTEENABLE_SYNTHESIS      (1),
8049 
                .PIPE_INPUTS               (0),
8050 
                .NO_WRAP_SUPPORT           (0),
8051 
                .INCOMPLETE_WRAP_SUPPORT   (0),
8052 
                .BURSTWRAP_CONST_MASK      (0),
8053 
                .BURSTWRAP_CONST_VALUE     (0),
8054 
                .ADAPTER_VERSION           ("13.1")
8055 
        ) link_disable_s1_burst_adapter (
8056 
                .clk                   (clk_0_clk_clk),                                       //       cr0.clk
8057 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),      // cr0_reset.reset
8058 
                .sink0_valid           (cmd_mux_009_src_valid),                               //     sink0.valid
8059 
                .sink0_data            (cmd_mux_009_src_data),                                //          .data
8060 
                .sink0_channel         (cmd_mux_009_src_channel),                             //          .channel
8061 
                .sink0_startofpacket   (cmd_mux_009_src_startofpacket),                       //          .startofpacket
8062 
                .sink0_endofpacket     (cmd_mux_009_src_endofpacket),                         //          .endofpacket
8063 
                .sink0_ready           (cmd_mux_009_src_ready),                               //          .ready
8064 
                .source0_valid         (link_disable_s1_burst_adapter_source0_valid),         //   source0.valid
8065 
                .source0_data          (link_disable_s1_burst_adapter_source0_data),          //          .data
8066 
                .source0_channel       (link_disable_s1_burst_adapter_source0_channel),       //          .channel
8067 
                .source0_startofpacket (link_disable_s1_burst_adapter_source0_startofpacket), //          .startofpacket
8068 
                .source0_endofpacket   (link_disable_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
8069 
                .source0_ready         (link_disable_s1_burst_adapter_source0_ready)          //          .ready
8070 
        );
8071 
 
8072 
        altera_merlin_burst_adapter #(
8073 
                .PKT_ADDR_H                (65),
8074 
                .PKT_ADDR_L                (36),
8075 
                .PKT_BEGIN_BURST           (93),
8076 
                .PKT_BYTE_CNT_H            (78),
8077 
                .PKT_BYTE_CNT_L            (72),
8078 
                .PKT_BYTEEN_H              (35),
8079 
                .PKT_BYTEEN_L              (32),
8080 
                .PKT_BURST_SIZE_H          (88),
8081 
                .PKT_BURST_SIZE_L          (86),
8082 
                .PKT_BURST_TYPE_H          (90),
8083 
                .PKT_BURST_TYPE_L          (89),
8084 
                .PKT_BURSTWRAP_H           (85),
8085 
                .PKT_BURSTWRAP_L           (79),
8086 
                .PKT_TRANS_COMPRESSED_READ (66),
8087 
                .PKT_TRANS_WRITE           (68),
8088 
                .PKT_TRANS_READ            (69),
8089 
                .OUT_NARROW_SIZE           (0),
8090 
                .IN_NARROW_SIZE            (1),
8091 
                .OUT_FIXED                 (0),
8092 
                .OUT_COMPLETE_WRAP         (0),
8093 
                .ST_DATA_W                 (129),
8094 
                .ST_CHANNEL_W              (22),
8095 
                .OUT_BYTE_CNT_H            (74),
8096 
                .OUT_BURSTWRAP_H           (85),
8097 
                .COMPRESSED_READ_SUPPORT   (1),
8098 
                .BYTEENABLE_SYNTHESIS      (1),
8099 
                .PIPE_INPUTS               (0),
8100 
                .NO_WRAP_SUPPORT           (0),
8101 
                .INCOMPLETE_WRAP_SUPPORT   (0),
8102 
                .BURSTWRAP_CONST_MASK      (0),
8103 
                .BURSTWRAP_CONST_VALUE     (0),
8104 
                .ADAPTER_VERSION           ("13.1")
8105 
        ) write_data_fifo_tx_s1_burst_adapter (
8106 
                .clk                   (clk_0_clk_clk),                                             //       cr0.clk
8107 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),            // cr0_reset.reset
8108 
                .sink0_valid           (cmd_mux_010_src_valid),                                     //     sink0.valid
8109 
                .sink0_data            (cmd_mux_010_src_data),                                      //          .data
8110 
                .sink0_channel         (cmd_mux_010_src_channel),                                   //          .channel
8111 
                .sink0_startofpacket   (cmd_mux_010_src_startofpacket),                             //          .startofpacket
8112 
                .sink0_endofpacket     (cmd_mux_010_src_endofpacket),                               //          .endofpacket
8113 
                .sink0_ready           (cmd_mux_010_src_ready),                                     //          .ready
8114 
                .source0_valid         (write_data_fifo_tx_s1_burst_adapter_source0_valid),         //   source0.valid
8115 
                .source0_data          (write_data_fifo_tx_s1_burst_adapter_source0_data),          //          .data
8116 
                .source0_channel       (write_data_fifo_tx_s1_burst_adapter_source0_channel),       //          .channel
8117 
                .source0_startofpacket (write_data_fifo_tx_s1_burst_adapter_source0_startofpacket), //          .startofpacket
8118 
                .source0_endofpacket   (write_data_fifo_tx_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
8119 
                .source0_ready         (write_data_fifo_tx_s1_burst_adapter_source0_ready)          //          .ready
8120 
        );
8121 
 
8122 
        altera_merlin_burst_adapter #(
8123 
                .PKT_ADDR_H                (65),
8124 
                .PKT_ADDR_L                (36),
8125 
                .PKT_BEGIN_BURST           (93),
8126 
                .PKT_BYTE_CNT_H            (78),
8127 
                .PKT_BYTE_CNT_L            (72),
8128 
                .PKT_BYTEEN_H              (35),
8129 
                .PKT_BYTEEN_L              (32),
8130 
                .PKT_BURST_SIZE_H          (88),
8131 
                .PKT_BURST_SIZE_L          (86),
8132 
                .PKT_BURST_TYPE_H          (90),
8133 
                .PKT_BURST_TYPE_L          (89),
8134 
                .PKT_BURSTWRAP_H           (85),
8135 
                .PKT_BURSTWRAP_L           (79),
8136 
                .PKT_TRANS_COMPRESSED_READ (66),
8137 
                .PKT_TRANS_WRITE           (68),
8138 
                .PKT_TRANS_READ            (69),
8139 
                .OUT_NARROW_SIZE           (0),
8140 
                .IN_NARROW_SIZE            (1),
8141 
                .OUT_FIXED                 (0),
8142 
                .OUT_COMPLETE_WRAP         (0),
8143 
                .ST_DATA_W                 (129),
8144 
                .ST_CHANNEL_W              (22),
8145 
                .OUT_BYTE_CNT_H            (74),
8146 
                .OUT_BURSTWRAP_H           (85),
8147 
                .COMPRESSED_READ_SUPPORT   (1),
8148 
                .BYTEENABLE_SYNTHESIS      (1),
8149 
                .PIPE_INPUTS               (0),
8150 
                .NO_WRAP_SUPPORT           (0),
8151 
                .INCOMPLETE_WRAP_SUPPORT   (0),
8152 
                .BURSTWRAP_CONST_MASK      (0),
8153 
                .BURSTWRAP_CONST_VALUE     (0),
8154 
                .ADAPTER_VERSION           ("13.1")
8155 
        ) write_en_tx_s1_burst_adapter (
8156 
                .clk                   (clk_0_clk_clk),                                      //       cr0.clk
8157 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),     // cr0_reset.reset
8158 
                .sink0_valid           (cmd_mux_011_src_valid),                              //     sink0.valid
8159 
                .sink0_data            (cmd_mux_011_src_data),                               //          .data
8160 
                .sink0_channel         (cmd_mux_011_src_channel),                            //          .channel
8161 
                .sink0_startofpacket   (cmd_mux_011_src_startofpacket),                      //          .startofpacket
8162 
                .sink0_endofpacket     (cmd_mux_011_src_endofpacket),                        //          .endofpacket
8163 
                .sink0_ready           (cmd_mux_011_src_ready),                              //          .ready
8164 
                .source0_valid         (write_en_tx_s1_burst_adapter_source0_valid),         //   source0.valid
8165 
                .source0_data          (write_en_tx_s1_burst_adapter_source0_data),          //          .data
8166 
                .source0_channel       (write_en_tx_s1_burst_adapter_source0_channel),       //          .channel
8167 
                .source0_startofpacket (write_en_tx_s1_burst_adapter_source0_startofpacket), //          .startofpacket
8168 
                .source0_endofpacket   (write_en_tx_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
8169 
                .source0_ready         (write_en_tx_s1_burst_adapter_source0_ready)          //          .ready
8170 
        );
8171 
 
8172 
        altera_merlin_burst_adapter #(
8173 
                .PKT_ADDR_H                (65),
8174 
                .PKT_ADDR_L                (36),
8175 
                .PKT_BEGIN_BURST           (93),
8176 
                .PKT_BYTE_CNT_H            (78),
8177 
                .PKT_BYTE_CNT_L            (72),
8178 
                .PKT_BYTEEN_H              (35),
8179 
                .PKT_BYTEEN_L              (32),
8180 
                .PKT_BURST_SIZE_H          (88),
8181 
                .PKT_BURST_SIZE_L          (86),
8182 
                .PKT_BURST_TYPE_H          (90),
8183 
                .PKT_BURST_TYPE_L          (89),
8184 
                .PKT_BURSTWRAP_H           (85),
8185 
                .PKT_BURSTWRAP_L           (79),
8186 
                .PKT_TRANS_COMPRESSED_READ (66),
8187 
                .PKT_TRANS_WRITE           (68),
8188 
                .PKT_TRANS_READ            (69),
8189 
                .OUT_NARROW_SIZE           (0),
8190 
                .IN_NARROW_SIZE            (1),
8191 
                .OUT_FIXED                 (0),
8192 
                .OUT_COMPLETE_WRAP         (0),
8193 
                .ST_DATA_W                 (129),
8194 
                .ST_CHANNEL_W              (22),
8195 
                .OUT_BYTE_CNT_H            (74),
8196 
                .OUT_BURSTWRAP_H           (85),
8197 
                .COMPRESSED_READ_SUPPORT   (1),
8198 
                .BYTEENABLE_SYNTHESIS      (1),
8199 
                .PIPE_INPUTS               (0),
8200 
                .NO_WRAP_SUPPORT           (0),
8201 
                .INCOMPLETE_WRAP_SUPPORT   (0),
8202 
                .BURSTWRAP_CONST_MASK      (0),
8203 
                .BURSTWRAP_CONST_VALUE     (0),
8204 
                .ADAPTER_VERSION           ("13.1")
8205 
        ) fifo_full_tx_status_s1_burst_adapter (
8206 
                .clk                   (clk_0_clk_clk),                                              //       cr0.clk
8207 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),             // cr0_reset.reset
8208 
                .sink0_valid           (cmd_mux_012_src_valid),                                      //     sink0.valid
8209 
                .sink0_data            (cmd_mux_012_src_data),                                       //          .data
8210 
                .sink0_channel         (cmd_mux_012_src_channel),                                    //          .channel
8211 
                .sink0_startofpacket   (cmd_mux_012_src_startofpacket),                              //          .startofpacket
8212 
                .sink0_endofpacket     (cmd_mux_012_src_endofpacket),                                //          .endofpacket
8213 
                .sink0_ready           (cmd_mux_012_src_ready),                                      //          .ready
8214 
                .source0_valid         (fifo_full_tx_status_s1_burst_adapter_source0_valid),         //   source0.valid
8215 
                .source0_data          (fifo_full_tx_status_s1_burst_adapter_source0_data),          //          .data
8216 
                .source0_channel       (fifo_full_tx_status_s1_burst_adapter_source0_channel),       //          .channel
8217 
                .source0_startofpacket (fifo_full_tx_status_s1_burst_adapter_source0_startofpacket), //          .startofpacket
8218 
                .source0_endofpacket   (fifo_full_tx_status_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
8219 
                .source0_ready         (fifo_full_tx_status_s1_burst_adapter_source0_ready)          //          .ready
8220 
        );
8221 
 
8222 
        altera_merlin_burst_adapter #(
8223 
                .PKT_ADDR_H                (65),
8224 
                .PKT_ADDR_L                (36),
8225 
                .PKT_BEGIN_BURST           (93),
8226 
                .PKT_BYTE_CNT_H            (78),
8227 
                .PKT_BYTE_CNT_L            (72),
8228 
                .PKT_BYTEEN_H              (35),
8229 
                .PKT_BYTEEN_L              (32),
8230 
                .PKT_BURST_SIZE_H          (88),
8231 
                .PKT_BURST_SIZE_L          (86),
8232 
                .PKT_BURST_TYPE_H          (90),
8233 
                .PKT_BURST_TYPE_L          (89),
8234 
                .PKT_BURSTWRAP_H           (85),
8235 
                .PKT_BURSTWRAP_L           (79),
8236 
                .PKT_TRANS_COMPRESSED_READ (66),
8237 
                .PKT_TRANS_WRITE           (68),
8238 
                .PKT_TRANS_READ            (69),
8239 
                .OUT_NARROW_SIZE           (0),
8240 
                .IN_NARROW_SIZE            (1),
8241 
                .OUT_FIXED                 (0),
8242 
                .OUT_COMPLETE_WRAP         (0),
8243 
                .ST_DATA_W                 (129),
8244 
                .ST_CHANNEL_W              (22),
8245 
                .OUT_BYTE_CNT_H            (74),
8246 
                .OUT_BURSTWRAP_H           (85),
8247 
                .COMPRESSED_READ_SUPPORT   (1),
8248 
                .BYTEENABLE_SYNTHESIS      (1),
8249 
                .PIPE_INPUTS               (0),
8250 
                .NO_WRAP_SUPPORT           (0),
8251 
                .INCOMPLETE_WRAP_SUPPORT   (0),
8252 
                .BURSTWRAP_CONST_MASK      (0),
8253 
                .BURSTWRAP_CONST_VALUE     (0),
8254 
                .ADAPTER_VERSION           ("13.1")
8255 
        ) fifo_empty_tx_status_s1_burst_adapter (
8256 
                .clk                   (clk_0_clk_clk),                                               //       cr0.clk
8257 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),              // cr0_reset.reset
8258 
                .sink0_valid           (cmd_mux_013_src_valid),                                       //     sink0.valid
8259 
                .sink0_data            (cmd_mux_013_src_data),                                        //          .data
8260 
                .sink0_channel         (cmd_mux_013_src_channel),                                     //          .channel
8261 
                .sink0_startofpacket   (cmd_mux_013_src_startofpacket),                               //          .startofpacket
8262 
                .sink0_endofpacket     (cmd_mux_013_src_endofpacket),                                 //          .endofpacket
8263 
                .sink0_ready           (cmd_mux_013_src_ready),                                       //          .ready
8264 
                .source0_valid         (fifo_empty_tx_status_s1_burst_adapter_source0_valid),         //   source0.valid
8265 
                .source0_data          (fifo_empty_tx_status_s1_burst_adapter_source0_data),          //          .data
8266 
                .source0_channel       (fifo_empty_tx_status_s1_burst_adapter_source0_channel),       //          .channel
8267 
                .source0_startofpacket (fifo_empty_tx_status_s1_burst_adapter_source0_startofpacket), //          .startofpacket
8268 
                .source0_endofpacket   (fifo_empty_tx_status_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
8269 
                .source0_ready         (fifo_empty_tx_status_s1_burst_adapter_source0_ready)          //          .ready
8270 
        );
8271 
 
8272 
        altera_merlin_burst_adapter #(
8273 
                .PKT_ADDR_H                (65),
8274 
                .PKT_ADDR_L                (36),
8275 
                .PKT_BEGIN_BURST           (93),
8276 
                .PKT_BYTE_CNT_H            (78),
8277 
                .PKT_BYTE_CNT_L            (72),
8278 
                .PKT_BYTEEN_H              (35),
8279 
                .PKT_BYTEEN_L              (32),
8280 
                .PKT_BURST_SIZE_H          (88),
8281 
                .PKT_BURST_SIZE_L          (86),
8282 
                .PKT_BURST_TYPE_H          (90),
8283 
                .PKT_BURST_TYPE_L          (89),
8284 
                .PKT_BURSTWRAP_H           (85),
8285 
                .PKT_BURSTWRAP_L           (79),
8286 
                .PKT_TRANS_COMPRESSED_READ (66),
8287 
                .PKT_TRANS_WRITE           (68),
8288 
                .PKT_TRANS_READ            (69),
8289 
                .OUT_NARROW_SIZE           (0),
8290 
                .IN_NARROW_SIZE            (1),
8291 
                .OUT_FIXED                 (0),
8292 
                .OUT_COMPLETE_WRAP         (0),
8293 
                .ST_DATA_W                 (129),
8294 
                .ST_CHANNEL_W              (22),
8295 
                .OUT_BYTE_CNT_H            (74),
8296 
                .OUT_BURSTWRAP_H           (85),
8297 
                .COMPRESSED_READ_SUPPORT   (1),
8298 
                .BYTEENABLE_SYNTHESIS      (1),
8299 
                .PIPE_INPUTS               (0),
8300 
                .NO_WRAP_SUPPORT           (0),
8301 
                .INCOMPLETE_WRAP_SUPPORT   (0),
8302 
                .BURSTWRAP_CONST_MASK      (0),
8303 
                .BURSTWRAP_CONST_VALUE     (0),
8304 
                .ADAPTER_VERSION           ("13.1")
8305 
        ) timecode_tx_data_s1_burst_adapter (
8306 
                .clk                   (clk_0_clk_clk),                                           //       cr0.clk
8307 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),          // cr0_reset.reset
8308 
                .sink0_valid           (cmd_mux_014_src_valid),                                   //     sink0.valid
8309 
                .sink0_data            (cmd_mux_014_src_data),                                    //          .data
8310 
                .sink0_channel         (cmd_mux_014_src_channel),                                 //          .channel
8311 
                .sink0_startofpacket   (cmd_mux_014_src_startofpacket),                           //          .startofpacket
8312 
                .sink0_endofpacket     (cmd_mux_014_src_endofpacket),                             //          .endofpacket
8313 
                .sink0_ready           (cmd_mux_014_src_ready),                                   //          .ready
8314 
                .source0_valid         (timecode_tx_data_s1_burst_adapter_source0_valid),         //   source0.valid
8315 
                .source0_data          (timecode_tx_data_s1_burst_adapter_source0_data),          //          .data
8316 
                .source0_channel       (timecode_tx_data_s1_burst_adapter_source0_channel),       //          .channel
8317 
                .source0_startofpacket (timecode_tx_data_s1_burst_adapter_source0_startofpacket), //          .startofpacket
8318 
                .source0_endofpacket   (timecode_tx_data_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
8319 
                .source0_ready         (timecode_tx_data_s1_burst_adapter_source0_ready)          //          .ready
8320 
        );
8321 
 
8322 
        altera_merlin_burst_adapter #(
8323 
                .PKT_ADDR_H                (65),
8324 
                .PKT_ADDR_L                (36),
8325 
                .PKT_BEGIN_BURST           (93),
8326 
                .PKT_BYTE_CNT_H            (78),
8327 
                .PKT_BYTE_CNT_L            (72),
8328 
                .PKT_BYTEEN_H              (35),
8329 
                .PKT_BYTEEN_L              (32),
8330 
                .PKT_BURST_SIZE_H          (88),
8331 
                .PKT_BURST_SIZE_L          (86),
8332 
                .PKT_BURST_TYPE_H          (90),
8333 
                .PKT_BURST_TYPE_L          (89),
8334 
                .PKT_BURSTWRAP_H           (85),
8335 
                .PKT_BURSTWRAP_L           (79),
8336 
                .PKT_TRANS_COMPRESSED_READ (66),
8337 
                .PKT_TRANS_WRITE           (68),
8338 
                .PKT_TRANS_READ            (69),
8339 
                .OUT_NARROW_SIZE           (0),
8340 
                .IN_NARROW_SIZE            (1),
8341 
                .OUT_FIXED                 (0),
8342 
                .OUT_COMPLETE_WRAP         (0),
8343 
                .ST_DATA_W                 (129),
8344 
                .ST_CHANNEL_W              (22),
8345 
                .OUT_BYTE_CNT_H            (74),
8346 
                .OUT_BURSTWRAP_H           (85),
8347 
                .COMPRESSED_READ_SUPPORT   (1),
8348 
                .BYTEENABLE_SYNTHESIS      (1),
8349 
                .PIPE_INPUTS               (0),
8350 
                .NO_WRAP_SUPPORT           (0),
8351 
                .INCOMPLETE_WRAP_SUPPORT   (0),
8352 
                .BURSTWRAP_CONST_MASK      (0),
8353 
                .BURSTWRAP_CONST_VALUE     (0),
8354 
                .ADAPTER_VERSION           ("13.1")
8355 
        ) timecode_tx_enable_s1_burst_adapter (
8356 
                .clk                   (clk_0_clk_clk),                                             //       cr0.clk
8357 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),            // cr0_reset.reset
8358 
                .sink0_valid           (cmd_mux_015_src_valid),                                     //     sink0.valid
8359 
                .sink0_data            (cmd_mux_015_src_data),                                      //          .data
8360 
                .sink0_channel         (cmd_mux_015_src_channel),                                   //          .channel
8361 
                .sink0_startofpacket   (cmd_mux_015_src_startofpacket),                             //          .startofpacket
8362 
                .sink0_endofpacket     (cmd_mux_015_src_endofpacket),                               //          .endofpacket
8363 
                .sink0_ready           (cmd_mux_015_src_ready),                                     //          .ready
8364 
                .source0_valid         (timecode_tx_enable_s1_burst_adapter_source0_valid),         //   source0.valid
8365 
                .source0_data          (timecode_tx_enable_s1_burst_adapter_source0_data),          //          .data
8366 
                .source0_channel       (timecode_tx_enable_s1_burst_adapter_source0_channel),       //          .channel
8367 
                .source0_startofpacket (timecode_tx_enable_s1_burst_adapter_source0_startofpacket), //          .startofpacket
8368 
                .source0_endofpacket   (timecode_tx_enable_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
8369 
                .source0_ready         (timecode_tx_enable_s1_burst_adapter_source0_ready)          //          .ready
8370 
        );
8371 
 
8372 
        altera_merlin_burst_adapter #(
8373 
                .PKT_ADDR_H                (65),
8374 
                .PKT_ADDR_L                (36),
8375 
                .PKT_BEGIN_BURST           (93),
8376 
                .PKT_BYTE_CNT_H            (78),
8377 
                .PKT_BYTE_CNT_L            (72),
8378 
                .PKT_BYTEEN_H              (35),
8379 
                .PKT_BYTEEN_L              (32),
8380 
                .PKT_BURST_SIZE_H          (88),
8381 
                .PKT_BURST_SIZE_L          (86),
8382 
                .PKT_BURST_TYPE_H          (90),
8383 
                .PKT_BURST_TYPE_L          (89),
8384 
                .PKT_BURSTWRAP_H           (85),
8385 
                .PKT_BURSTWRAP_L           (79),
8386 
                .PKT_TRANS_COMPRESSED_READ (66),
8387 
                .PKT_TRANS_WRITE           (68),
8388 
                .PKT_TRANS_READ            (69),
8389 
                .OUT_NARROW_SIZE           (0),
8390 
                .IN_NARROW_SIZE            (1),
8391 
                .OUT_FIXED                 (0),
8392 
                .OUT_COMPLETE_WRAP         (0),
8393 
                .ST_DATA_W                 (129),
8394 
                .ST_CHANNEL_W              (22),
8395 
                .OUT_BYTE_CNT_H            (74),
8396 
                .OUT_BURSTWRAP_H           (85),
8397 
                .COMPRESSED_READ_SUPPORT   (1),
8398 
                .BYTEENABLE_SYNTHESIS      (1),
8399 
                .PIPE_INPUTS               (0),
8400 
                .NO_WRAP_SUPPORT           (0),
8401 
                .INCOMPLETE_WRAP_SUPPORT   (0),
8402 
                .BURSTWRAP_CONST_MASK      (0),
8403 
                .BURSTWRAP_CONST_VALUE     (0),
8404 
                .ADAPTER_VERSION           ("13.1")
8405 
        ) timecode_tx_ready_s1_burst_adapter (
8406 
                .clk                   (clk_0_clk_clk),                                            //       cr0.clk
8407 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),           // cr0_reset.reset
8408 
                .sink0_valid           (cmd_mux_016_src_valid),                                    //     sink0.valid
8409 
                .sink0_data            (cmd_mux_016_src_data),                                     //          .data
8410 
                .sink0_channel         (cmd_mux_016_src_channel),                                  //          .channel
8411 
                .sink0_startofpacket   (cmd_mux_016_src_startofpacket),                            //          .startofpacket
8412 
                .sink0_endofpacket     (cmd_mux_016_src_endofpacket),                              //          .endofpacket
8413 
                .sink0_ready           (cmd_mux_016_src_ready),                                    //          .ready
8414 
                .source0_valid         (timecode_tx_ready_s1_burst_adapter_source0_valid),         //   source0.valid
8415 
                .source0_data          (timecode_tx_ready_s1_burst_adapter_source0_data),          //          .data
8416 
                .source0_channel       (timecode_tx_ready_s1_burst_adapter_source0_channel),       //          .channel
8417 
                .source0_startofpacket (timecode_tx_ready_s1_burst_adapter_source0_startofpacket), //          .startofpacket
8418 
                .source0_endofpacket   (timecode_tx_ready_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
8419 
                .source0_ready         (timecode_tx_ready_s1_burst_adapter_source0_ready)          //          .ready
8420 
        );
8421 
 
8422 
        altera_merlin_burst_adapter #(
8423 
                .PKT_ADDR_H                (65),
8424 
                .PKT_ADDR_L                (36),
8425 
                .PKT_BEGIN_BURST           (93),
8426 
                .PKT_BYTE_CNT_H            (78),
8427 
                .PKT_BYTE_CNT_L            (72),
8428 
                .PKT_BYTEEN_H              (35),
8429 
                .PKT_BYTEEN_L              (32),
8430 
                .PKT_BURST_SIZE_H          (88),
8431 
                .PKT_BURST_SIZE_L          (86),
8432 
                .PKT_BURST_TYPE_H          (90),
8433 
                .PKT_BURST_TYPE_L          (89),
8434 
                .PKT_BURSTWRAP_H           (85),
8435 
                .PKT_BURSTWRAP_L           (79),
8436 
                .PKT_TRANS_COMPRESSED_READ (66),
8437 
                .PKT_TRANS_WRITE           (68),
8438 
                .PKT_TRANS_READ            (69),
8439 
                .OUT_NARROW_SIZE           (0),
8440 
                .IN_NARROW_SIZE            (1),
8441 
                .OUT_FIXED                 (0),
8442 
                .OUT_COMPLETE_WRAP         (0),
8443 
                .ST_DATA_W                 (129),
8444 
                .ST_CHANNEL_W              (22),
8445 
                .OUT_BYTE_CNT_H            (74),
8446 
                .OUT_BURSTWRAP_H           (85),
8447 
                .COMPRESSED_READ_SUPPORT   (1),
8448 
                .BYTEENABLE_SYNTHESIS      (1),
8449 
                .PIPE_INPUTS               (0),
8450 
                .NO_WRAP_SUPPORT           (0),
8451 
                .INCOMPLETE_WRAP_SUPPORT   (0),
8452 
                .BURSTWRAP_CONST_MASK      (0),
8453 
                .BURSTWRAP_CONST_VALUE     (0),
8454 
                .ADAPTER_VERSION           ("13.1")
8455 
        ) data_info_s1_burst_adapter (
8456 
                .clk                   (clk_0_clk_clk),                                    //       cr0.clk
8457 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),   // cr0_reset.reset
8458 
                .sink0_valid           (cmd_mux_017_src_valid),                            //     sink0.valid
8459 
                .sink0_data            (cmd_mux_017_src_data),                             //          .data
8460 
                .sink0_channel         (cmd_mux_017_src_channel),                          //          .channel
8461 
                .sink0_startofpacket   (cmd_mux_017_src_startofpacket),                    //          .startofpacket
8462 
                .sink0_endofpacket     (cmd_mux_017_src_endofpacket),                      //          .endofpacket
8463 
                .sink0_ready           (cmd_mux_017_src_ready),                            //          .ready
8464 
                .source0_valid         (data_info_s1_burst_adapter_source0_valid),         //   source0.valid
8465 
                .source0_data          (data_info_s1_burst_adapter_source0_data),          //          .data
8466 
                .source0_channel       (data_info_s1_burst_adapter_source0_channel),       //          .channel
8467 
                .source0_startofpacket (data_info_s1_burst_adapter_source0_startofpacket), //          .startofpacket
8468 
                .source0_endofpacket   (data_info_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
8469 
                .source0_ready         (data_info_s1_burst_adapter_source0_ready)          //          .ready
8470 
        );
8471 
 
8472 
        altera_merlin_burst_adapter #(
8473 
                .PKT_ADDR_H                (65),
8474 
                .PKT_ADDR_L                (36),
8475 
                .PKT_BEGIN_BURST           (93),
8476 
                .PKT_BYTE_CNT_H            (78),
8477 
                .PKT_BYTE_CNT_L            (72),
8478 
                .PKT_BYTEEN_H              (35),
8479 
                .PKT_BYTEEN_L              (32),
8480 
                .PKT_BURST_SIZE_H          (88),
8481 
                .PKT_BURST_SIZE_L          (86),
8482 
                .PKT_BURST_TYPE_H          (90),
8483 
                .PKT_BURST_TYPE_L          (89),
8484 
                .PKT_BURSTWRAP_H           (85),
8485 
                .PKT_BURSTWRAP_L           (79),
8486 
                .PKT_TRANS_COMPRESSED_READ (66),
8487 
                .PKT_TRANS_WRITE           (68),
8488 
                .PKT_TRANS_READ            (69),
8489 
                .OUT_NARROW_SIZE           (0),
8490 
                .IN_NARROW_SIZE            (1),
8491 
                .OUT_FIXED                 (0),
8492 
                .OUT_COMPLETE_WRAP         (0),
8493 
                .ST_DATA_W                 (129),
8494 
                .ST_CHANNEL_W              (22),
8495 
                .OUT_BYTE_CNT_H            (74),
8496 
                .OUT_BURSTWRAP_H           (85),
8497 
                .COMPRESSED_READ_SUPPORT   (1),
8498 
                .BYTEENABLE_SYNTHESIS      (1),
8499 
                .PIPE_INPUTS               (0),
8500 
                .NO_WRAP_SUPPORT           (0),
8501 
                .INCOMPLETE_WRAP_SUPPORT   (0),
8502 
                .BURSTWRAP_CONST_MASK      (0),
8503 
                .BURSTWRAP_CONST_VALUE     (0),
8504 
                .ADAPTER_VERSION           ("13.1")
8505 
        ) clock_sel_s1_burst_adapter (
8506 
                .clk                   (clk_0_clk_clk),                                    //       cr0.clk
8507 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),   // cr0_reset.reset
8508 
                .sink0_valid           (cmd_mux_018_src_valid),                            //     sink0.valid
8509 
                .sink0_data            (cmd_mux_018_src_data),                             //          .data
8510 
                .sink0_channel         (cmd_mux_018_src_channel),                          //          .channel
8511 
                .sink0_startofpacket   (cmd_mux_018_src_startofpacket),                    //          .startofpacket
8512 
                .sink0_endofpacket     (cmd_mux_018_src_endofpacket),                      //          .endofpacket
8513 
                .sink0_ready           (cmd_mux_018_src_ready),                            //          .ready
8514 
                .source0_valid         (clock_sel_s1_burst_adapter_source0_valid),         //   source0.valid
8515 
                .source0_data          (clock_sel_s1_burst_adapter_source0_data),          //          .data
8516 
                .source0_channel       (clock_sel_s1_burst_adapter_source0_channel),       //          .channel
8517 
                .source0_startofpacket (clock_sel_s1_burst_adapter_source0_startofpacket), //          .startofpacket
8518 
                .source0_endofpacket   (clock_sel_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
8519 
                .source0_ready         (clock_sel_s1_burst_adapter_source0_ready)          //          .ready
8520 
        );
8521 
 
8522 
        altera_merlin_burst_adapter #(
8523 
                .PKT_ADDR_H                (65),
8524 
                .PKT_ADDR_L                (36),
8525 
                .PKT_BEGIN_BURST           (93),
8526 
                .PKT_BYTE_CNT_H            (78),
8527 
                .PKT_BYTE_CNT_L            (72),
8528 
                .PKT_BYTEEN_H              (35),
8529 
                .PKT_BYTEEN_L              (32),
8530 
                .PKT_BURST_SIZE_H          (88),
8531 
                .PKT_BURST_SIZE_L          (86),
8532 
                .PKT_BURST_TYPE_H          (90),
8533 
                .PKT_BURST_TYPE_L          (89),
8534 
                .PKT_BURSTWRAP_H           (85),
8535 
                .PKT_BURSTWRAP_L           (79),
8536 
                .PKT_TRANS_COMPRESSED_READ (66),
8537 
                .PKT_TRANS_WRITE           (68),
8538 
                .PKT_TRANS_READ            (69),
8539 
                .OUT_NARROW_SIZE           (0),
8540 
                .IN_NARROW_SIZE            (1),
8541 
                .OUT_FIXED                 (0),
8542 
                .OUT_COMPLETE_WRAP         (0),
8543 
                .ST_DATA_W                 (129),
8544 
                .ST_CHANNEL_W              (22),
8545 
                .OUT_BYTE_CNT_H            (74),
8546 
                .OUT_BURSTWRAP_H           (85),
8547 
                .COMPRESSED_READ_SUPPORT   (1),
8548 
                .BYTEENABLE_SYNTHESIS      (1),
8549 
                .PIPE_INPUTS               (0),
8550 
                .NO_WRAP_SUPPORT           (0),
8551 
                .INCOMPLETE_WRAP_SUPPORT   (0),
8552 
                .BURSTWRAP_CONST_MASK      (0),
8553 
                .BURSTWRAP_CONST_VALUE     (0),
8554 
                .ADAPTER_VERSION           ("13.1")
8555 
        ) fsm_info_s1_burst_adapter (
8556 
                .clk                   (clk_0_clk_clk),                                   //       cr0.clk
8557 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),  // cr0_reset.reset
8558 
                .sink0_valid           (cmd_mux_019_src_valid),                           //     sink0.valid
8559 
                .sink0_data            (cmd_mux_019_src_data),                            //          .data
8560 
                .sink0_channel         (cmd_mux_019_src_channel),                         //          .channel
8561 
                .sink0_startofpacket   (cmd_mux_019_src_startofpacket),                   //          .startofpacket
8562 
                .sink0_endofpacket     (cmd_mux_019_src_endofpacket),                     //          .endofpacket
8563 
                .sink0_ready           (cmd_mux_019_src_ready),                           //          .ready
8564 
                .source0_valid         (fsm_info_s1_burst_adapter_source0_valid),         //   source0.valid
8565 
                .source0_data          (fsm_info_s1_burst_adapter_source0_data),          //          .data
8566 
                .source0_channel       (fsm_info_s1_burst_adapter_source0_channel),       //          .channel
8567 
                .source0_startofpacket (fsm_info_s1_burst_adapter_source0_startofpacket), //          .startofpacket
8568 
                .source0_endofpacket   (fsm_info_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
8569 
                .source0_ready         (fsm_info_s1_burst_adapter_source0_ready)          //          .ready
8570 
        );
8571 
 
8572 
        altera_merlin_burst_adapter #(
8573 
                .PKT_ADDR_H                (65),
8574 
                .PKT_ADDR_L                (36),
8575 
                .PKT_BEGIN_BURST           (93),
8576 
                .PKT_BYTE_CNT_H            (78),
8577 
                .PKT_BYTE_CNT_L            (72),
8578 
                .PKT_BYTEEN_H              (35),
8579 
                .PKT_BYTEEN_L              (32),
8580 
                .PKT_BURST_SIZE_H          (88),
8581 
                .PKT_BURST_SIZE_L          (86),
8582 
                .PKT_BURST_TYPE_H          (90),
8583 
                .PKT_BURST_TYPE_L          (89),
8584 
                .PKT_BURSTWRAP_H           (85),
8585 
                .PKT_BURSTWRAP_L           (79),
8586 
                .PKT_TRANS_COMPRESSED_READ (66),
8587 
                .PKT_TRANS_WRITE           (68),
8588 
                .PKT_TRANS_READ            (69),
8589 
                .OUT_NARROW_SIZE           (0),
8590 
                .IN_NARROW_SIZE            (1),
8591 
                .OUT_FIXED                 (0),
8592 
                .OUT_COMPLETE_WRAP         (0),
8593 
                .ST_DATA_W                 (129),
8594 
                .ST_CHANNEL_W              (22),
8595 
                .OUT_BYTE_CNT_H            (74),
8596 
                .OUT_BURSTWRAP_H           (85),
8597 
                .COMPRESSED_READ_SUPPORT   (1),
8598 
                .BYTEENABLE_SYNTHESIS      (1),
8599 
                .PIPE_INPUTS               (0),
8600 
                .NO_WRAP_SUPPORT           (0),
8601 
                .INCOMPLETE_WRAP_SUPPORT   (0),
8602 
                .BURSTWRAP_CONST_MASK      (0),
8603 
                .BURSTWRAP_CONST_VALUE     (0),
8604 
                .ADAPTER_VERSION           ("13.1")
8605 
        ) counter_tx_fifo_s1_burst_adapter (
8606 
                .clk                   (clk_0_clk_clk),                                          //       cr0.clk
8607 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),         // cr0_reset.reset
8608 
                .sink0_valid           (cmd_mux_020_src_valid),                                  //     sink0.valid
8609 
                .sink0_data            (cmd_mux_020_src_data),                                   //          .data
8610 
                .sink0_channel         (cmd_mux_020_src_channel),                                //          .channel
8611 
                .sink0_startofpacket   (cmd_mux_020_src_startofpacket),                          //          .startofpacket
8612 
                .sink0_endofpacket     (cmd_mux_020_src_endofpacket),                            //          .endofpacket
8613 
                .sink0_ready           (cmd_mux_020_src_ready),                                  //          .ready
8614 
                .source0_valid         (counter_tx_fifo_s1_burst_adapter_source0_valid),         //   source0.valid
8615 
                .source0_data          (counter_tx_fifo_s1_burst_adapter_source0_data),          //          .data
8616 
                .source0_channel       (counter_tx_fifo_s1_burst_adapter_source0_channel),       //          .channel
8617 
                .source0_startofpacket (counter_tx_fifo_s1_burst_adapter_source0_startofpacket), //          .startofpacket
8618 
                .source0_endofpacket   (counter_tx_fifo_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
8619 
                .source0_ready         (counter_tx_fifo_s1_burst_adapter_source0_ready)          //          .ready
8620 
        );
8621 
 
8622 
        altera_merlin_burst_adapter #(
8623 
                .PKT_ADDR_H                (65),
8624 
                .PKT_ADDR_L                (36),
8625 
                .PKT_BEGIN_BURST           (93),
8626 
                .PKT_BYTE_CNT_H            (78),
8627 
                .PKT_BYTE_CNT_L            (72),
8628 
                .PKT_BYTEEN_H              (35),
8629 
                .PKT_BYTEEN_L              (32),
8630 
                .PKT_BURST_SIZE_H          (88),
8631 
                .PKT_BURST_SIZE_L          (86),
8632 
                .PKT_BURST_TYPE_H          (90),
8633 
                .PKT_BURST_TYPE_L          (89),
8634 
                .PKT_BURSTWRAP_H           (85),
8635 
                .PKT_BURSTWRAP_L           (79),
8636 
                .PKT_TRANS_COMPRESSED_READ (66),
8637 
                .PKT_TRANS_WRITE           (68),
8638 
                .PKT_TRANS_READ            (69),
8639 
                .OUT_NARROW_SIZE           (0),
8640 
                .IN_NARROW_SIZE            (1),
8641 
                .OUT_FIXED                 (0),
8642 
                .OUT_COMPLETE_WRAP         (0),
8643 
                .ST_DATA_W                 (129),
8644 
                .ST_CHANNEL_W              (22),
8645 
                .OUT_BYTE_CNT_H            (74),
8646 
                .OUT_BURSTWRAP_H           (85),
8647 
                .COMPRESSED_READ_SUPPORT   (1),
8648 
                .BYTEENABLE_SYNTHESIS      (1),
8649 
                .PIPE_INPUTS               (0),
8650 
                .NO_WRAP_SUPPORT           (0),
8651 
                .INCOMPLETE_WRAP_SUPPORT   (0),
8652 
                .BURSTWRAP_CONST_MASK      (0),
8653 
                .BURSTWRAP_CONST_VALUE     (0),
8654 
                .ADAPTER_VERSION           ("13.1")
8655 
        ) counter_rx_fifo_s1_burst_adapter (
8656 
                .clk                   (clk_0_clk_clk),                                          //       cr0.clk
8657 
                .reset                 (led_pio_test_reset_reset_bridge_in_reset_reset),         // cr0_reset.reset
8658 
                .sink0_valid           (cmd_mux_021_src_valid),                                  //     sink0.valid
8659 
                .sink0_data            (cmd_mux_021_src_data),                                   //          .data
8660 
                .sink0_channel         (cmd_mux_021_src_channel),                                //          .channel
8661 
                .sink0_startofpacket   (cmd_mux_021_src_startofpacket),                          //          .startofpacket
8662 
                .sink0_endofpacket     (cmd_mux_021_src_endofpacket),                            //          .endofpacket
8663 
                .sink0_ready           (cmd_mux_021_src_ready),                                  //          .ready
8664 
                .source0_valid         (counter_rx_fifo_s1_burst_adapter_source0_valid),         //   source0.valid
8665 
                .source0_data          (counter_rx_fifo_s1_burst_adapter_source0_data),          //          .data
8666 
                .source0_channel       (counter_rx_fifo_s1_burst_adapter_source0_channel),       //          .channel
8667 
                .source0_startofpacket (counter_rx_fifo_s1_burst_adapter_source0_startofpacket), //          .startofpacket
8668 
                .source0_endofpacket   (counter_rx_fifo_s1_burst_adapter_source0_endofpacket),   //          .endofpacket
8669 
                .source0_ready         (counter_rx_fifo_s1_burst_adapter_source0_ready)          //          .ready
8670 
        );
8671 
 
8672 
        ulight_fifo_mm_interconnect_0_cmd_demux cmd_demux (
8673 
                .clk                 (clk_0_clk_clk),                                                    //        clk.clk
8674 
                .reset               (hps_0_h2f_axi_master_agent_clk_reset_reset_bridge_in_reset_reset), //  clk_reset.reset
8675 
                .sink_ready          (hps_0_h2f_axi_master_wr_limiter_cmd_src_ready),                    //       sink.ready
8676 
                .sink_channel        (hps_0_h2f_axi_master_wr_limiter_cmd_src_channel),                  //           .channel
8677 
                .sink_data           (hps_0_h2f_axi_master_wr_limiter_cmd_src_data),                     //           .data
8678 
                .sink_startofpacket  (hps_0_h2f_axi_master_wr_limiter_cmd_src_startofpacket),            //           .startofpacket
8679 
                .sink_endofpacket    (hps_0_h2f_axi_master_wr_limiter_cmd_src_endofpacket),              //           .endofpacket
8680 
                .sink_valid          (hps_0_h2f_axi_master_wr_limiter_cmd_valid_data),                   // sink_valid.data
8681 
                .src0_ready          (cmd_demux_src0_ready),                                             //       src0.ready
8682 
                .src0_valid          (cmd_demux_src0_valid),                                             //           .valid
8683 
                .src0_data           (cmd_demux_src0_data),                                              //           .data
8684 
                .src0_channel        (cmd_demux_src0_channel),                                           //           .channel
8685 
                .src0_startofpacket  (cmd_demux_src0_startofpacket),                                     //           .startofpacket
8686 
                .src0_endofpacket    (cmd_demux_src0_endofpacket),                                       //           .endofpacket
8687 
                .src1_ready          (cmd_demux_src1_ready),                                             //       src1.ready
8688 
                .src1_valid          (cmd_demux_src1_valid),                                             //           .valid
8689 
                .src1_data           (cmd_demux_src1_data),                                              //           .data
8690 
                .src1_channel        (cmd_demux_src1_channel),                                           //           .channel
8691 
                .src1_startofpacket  (cmd_demux_src1_startofpacket),                                     //           .startofpacket
8692 
                .src1_endofpacket    (cmd_demux_src1_endofpacket),                                       //           .endofpacket
8693 
                .src2_ready          (cmd_demux_src2_ready),                                             //       src2.ready
8694 
                .src2_valid          (cmd_demux_src2_valid),                                             //           .valid
8695 
                .src2_data           (cmd_demux_src2_data),                                              //           .data
8696 
                .src2_channel        (cmd_demux_src2_channel),                                           //           .channel
8697 
                .src2_startofpacket  (cmd_demux_src2_startofpacket),                                     //           .startofpacket
8698 
                .src2_endofpacket    (cmd_demux_src2_endofpacket),                                       //           .endofpacket
8699 
                .src3_ready          (cmd_demux_src3_ready),                                             //       src3.ready
8700 
                .src3_valid          (cmd_demux_src3_valid),                                             //           .valid
8701 
                .src3_data           (cmd_demux_src3_data),                                              //           .data
8702 
                .src3_channel        (cmd_demux_src3_channel),                                           //           .channel
8703 
                .src3_startofpacket  (cmd_demux_src3_startofpacket),                                     //           .startofpacket
8704 
                .src3_endofpacket    (cmd_demux_src3_endofpacket),                                       //           .endofpacket
8705 
                .src4_ready          (cmd_demux_src4_ready),                                             //       src4.ready
8706 
                .src4_valid          (cmd_demux_src4_valid),                                             //           .valid
8707 
                .src4_data           (cmd_demux_src4_data),                                              //           .data
8708 
                .src4_channel        (cmd_demux_src4_channel),                                           //           .channel
8709 
                .src4_startofpacket  (cmd_demux_src4_startofpacket),                                     //           .startofpacket
8710 
                .src4_endofpacket    (cmd_demux_src4_endofpacket),                                       //           .endofpacket
8711 
                .src5_ready          (cmd_demux_src5_ready),                                             //       src5.ready
8712 
                .src5_valid          (cmd_demux_src5_valid),                                             //           .valid
8713 
                .src5_data           (cmd_demux_src5_data),                                              //           .data
8714 
                .src5_channel        (cmd_demux_src5_channel),                                           //           .channel
8715 
                .src5_startofpacket  (cmd_demux_src5_startofpacket),                                     //           .startofpacket
8716 
                .src5_endofpacket    (cmd_demux_src5_endofpacket),                                       //           .endofpacket
8717 
                .src6_ready          (cmd_demux_src6_ready),                                             //       src6.ready
8718 
                .src6_valid          (cmd_demux_src6_valid),                                             //           .valid
8719 
                .src6_data           (cmd_demux_src6_data),                                              //           .data
8720 
                .src6_channel        (cmd_demux_src6_channel),                                           //           .channel
8721 
                .src6_startofpacket  (cmd_demux_src6_startofpacket),                                     //           .startofpacket
8722 
                .src6_endofpacket    (cmd_demux_src6_endofpacket),                                       //           .endofpacket
8723 
                .src7_ready          (cmd_demux_src7_ready),                                             //       src7.ready
8724 
                .src7_valid          (cmd_demux_src7_valid),                                             //           .valid
8725 
                .src7_data           (cmd_demux_src7_data),                                              //           .data
8726 
                .src7_channel        (cmd_demux_src7_channel),                                           //           .channel
8727 
                .src7_startofpacket  (cmd_demux_src7_startofpacket),                                     //           .startofpacket
8728 
                .src7_endofpacket    (cmd_demux_src7_endofpacket),                                       //           .endofpacket
8729 
                .src8_ready          (cmd_demux_src8_ready),                                             //       src8.ready
8730 
                .src8_valid          (cmd_demux_src8_valid),                                             //           .valid
8731 
                .src8_data           (cmd_demux_src8_data),                                              //           .data
8732 
                .src8_channel        (cmd_demux_src8_channel),                                           //           .channel
8733 
                .src8_startofpacket  (cmd_demux_src8_startofpacket),                                     //           .startofpacket
8734 
                .src8_endofpacket    (cmd_demux_src8_endofpacket),                                       //           .endofpacket
8735 
                .src9_ready          (cmd_demux_src9_ready),                                             //       src9.ready
8736 
                .src9_valid          (cmd_demux_src9_valid),                                             //           .valid
8737 
                .src9_data           (cmd_demux_src9_data),                                              //           .data
8738 
                .src9_channel        (cmd_demux_src9_channel),                                           //           .channel
8739 
                .src9_startofpacket  (cmd_demux_src9_startofpacket),                                     //           .startofpacket
8740 
                .src9_endofpacket    (cmd_demux_src9_endofpacket),                                       //           .endofpacket
8741 
                .src10_ready         (cmd_demux_src10_ready),                                            //      src10.ready
8742 
                .src10_valid         (cmd_demux_src10_valid),                                            //           .valid
8743 
                .src10_data          (cmd_demux_src10_data),                                             //           .data
8744 
                .src10_channel       (cmd_demux_src10_channel),                                          //           .channel
8745 
                .src10_startofpacket (cmd_demux_src10_startofpacket),                                    //           .startofpacket
8746 
                .src10_endofpacket   (cmd_demux_src10_endofpacket),                                      //           .endofpacket
8747 
                .src11_ready         (cmd_demux_src11_ready),                                            //      src11.ready
8748 
                .src11_valid         (cmd_demux_src11_valid),                                            //           .valid
8749 
                .src11_data          (cmd_demux_src11_data),                                             //           .data
8750 
                .src11_channel       (cmd_demux_src11_channel),                                          //           .channel
8751 
                .src11_startofpacket (cmd_demux_src11_startofpacket),                                    //           .startofpacket
8752 
                .src11_endofpacket   (cmd_demux_src11_endofpacket),                                      //           .endofpacket
8753 
                .src12_ready         (cmd_demux_src12_ready),                                            //      src12.ready
8754 
                .src12_valid         (cmd_demux_src12_valid),                                            //           .valid
8755 
                .src12_data          (cmd_demux_src12_data),                                             //           .data
8756 
                .src12_channel       (cmd_demux_src12_channel),                                          //           .channel
8757 
                .src12_startofpacket (cmd_demux_src12_startofpacket),                                    //           .startofpacket
8758 
                .src12_endofpacket   (cmd_demux_src12_endofpacket),                                      //           .endofpacket
8759 
                .src13_ready         (cmd_demux_src13_ready),                                            //      src13.ready
8760 
                .src13_valid         (cmd_demux_src13_valid),                                            //           .valid
8761 
                .src13_data          (cmd_demux_src13_data),                                             //           .data
8762 
                .src13_channel       (cmd_demux_src13_channel),                                          //           .channel
8763 
                .src13_startofpacket (cmd_demux_src13_startofpacket),                                    //           .startofpacket
8764 
                .src13_endofpacket   (cmd_demux_src13_endofpacket),                                      //           .endofpacket
8765 
                .src14_ready         (cmd_demux_src14_ready),                                            //      src14.ready
8766 
                .src14_valid         (cmd_demux_src14_valid),                                            //           .valid
8767 
                .src14_data          (cmd_demux_src14_data),                                             //           .data
8768 
                .src14_channel       (cmd_demux_src14_channel),                                          //           .channel
8769 
                .src14_startofpacket (cmd_demux_src14_startofpacket),                                    //           .startofpacket
8770 
                .src14_endofpacket   (cmd_demux_src14_endofpacket),                                      //           .endofpacket
8771 
                .src15_ready         (cmd_demux_src15_ready),                                            //      src15.ready
8772 
                .src15_valid         (cmd_demux_src15_valid),                                            //           .valid
8773 
                .src15_data          (cmd_demux_src15_data),                                             //           .data
8774 
                .src15_channel       (cmd_demux_src15_channel),                                          //           .channel
8775 
                .src15_startofpacket (cmd_demux_src15_startofpacket),                                    //           .startofpacket
8776 
                .src15_endofpacket   (cmd_demux_src15_endofpacket),                                      //           .endofpacket
8777 
                .src16_ready         (cmd_demux_src16_ready),                                            //      src16.ready
8778 
                .src16_valid         (cmd_demux_src16_valid),                                            //           .valid
8779 
                .src16_data          (cmd_demux_src16_data),                                             //           .data
8780 
                .src16_channel       (cmd_demux_src16_channel),                                          //           .channel
8781 
                .src16_startofpacket (cmd_demux_src16_startofpacket),                                    //           .startofpacket
8782 
                .src16_endofpacket   (cmd_demux_src16_endofpacket),                                      //           .endofpacket
8783 
                .src17_ready         (cmd_demux_src17_ready),                                            //      src17.ready
8784 
                .src17_valid         (cmd_demux_src17_valid),                                            //           .valid
8785 
                .src17_data          (cmd_demux_src17_data),                                             //           .data
8786 
                .src17_channel       (cmd_demux_src17_channel),                                          //           .channel
8787 
                .src17_startofpacket (cmd_demux_src17_startofpacket),                                    //           .startofpacket
8788 
                .src17_endofpacket   (cmd_demux_src17_endofpacket),                                      //           .endofpacket
8789 
                .src18_ready         (cmd_demux_src18_ready),                                            //      src18.ready
8790 
                .src18_valid         (cmd_demux_src18_valid),                                            //           .valid
8791 
                .src18_data          (cmd_demux_src18_data),                                             //           .data
8792 
                .src18_channel       (cmd_demux_src18_channel),                                          //           .channel
8793 
                .src18_startofpacket (cmd_demux_src18_startofpacket),                                    //           .startofpacket
8794 
                .src18_endofpacket   (cmd_demux_src18_endofpacket),                                      //           .endofpacket
8795 
                .src19_ready         (cmd_demux_src19_ready),                                            //      src19.ready
8796 
                .src19_valid         (cmd_demux_src19_valid),                                            //           .valid
8797 
                .src19_data          (cmd_demux_src19_data),                                             //           .data
8798 
                .src19_channel       (cmd_demux_src19_channel),                                          //           .channel
8799 
                .src19_startofpacket (cmd_demux_src19_startofpacket),                                    //           .startofpacket
8800 
                .src19_endofpacket   (cmd_demux_src19_endofpacket),                                      //           .endofpacket
8801 
                .src20_ready         (cmd_demux_src20_ready),                                            //      src20.ready
8802 
                .src20_valid         (cmd_demux_src20_valid),                                            //           .valid
8803 
                .src20_data          (cmd_demux_src20_data),                                             //           .data
8804 
                .src20_channel       (cmd_demux_src20_channel),                                          //           .channel
8805 
                .src20_startofpacket (cmd_demux_src20_startofpacket),                                    //           .startofpacket
8806 
                .src20_endofpacket   (cmd_demux_src20_endofpacket),                                      //           .endofpacket
8807 
                .src21_ready         (cmd_demux_src21_ready),                                            //      src21.ready
8808 
                .src21_valid         (cmd_demux_src21_valid),                                            //           .valid
8809 
                .src21_data          (cmd_demux_src21_data),                                             //           .data
8810 
                .src21_channel       (cmd_demux_src21_channel),                                          //           .channel
8811 
                .src21_startofpacket (cmd_demux_src21_startofpacket),                                    //           .startofpacket
8812 
                .src21_endofpacket   (cmd_demux_src21_endofpacket)                                       //           .endofpacket
8813 
        );
8814 
 
8815 
        ulight_fifo_mm_interconnect_0_cmd_demux cmd_demux_001 (
8816 
                .clk                 (clk_0_clk_clk),                                                    //        clk.clk
8817 
                .reset               (hps_0_h2f_axi_master_agent_clk_reset_reset_bridge_in_reset_reset), //  clk_reset.reset
8818 
                .sink_ready          (hps_0_h2f_axi_master_rd_limiter_cmd_src_ready),                    //       sink.ready
8819 
                .sink_channel        (hps_0_h2f_axi_master_rd_limiter_cmd_src_channel),                  //           .channel
8820 
                .sink_data           (hps_0_h2f_axi_master_rd_limiter_cmd_src_data),                     //           .data
8821 
                .sink_startofpacket  (hps_0_h2f_axi_master_rd_limiter_cmd_src_startofpacket),            //           .startofpacket
8822 
                .sink_endofpacket    (hps_0_h2f_axi_master_rd_limiter_cmd_src_endofpacket),              //           .endofpacket
8823 
                .sink_valid          (hps_0_h2f_axi_master_rd_limiter_cmd_valid_data),                   // sink_valid.data
8824 
                .src0_ready          (cmd_demux_001_src0_ready),                                         //       src0.ready
8825 
                .src0_valid          (cmd_demux_001_src0_valid),                                         //           .valid
8826 
                .src0_data           (cmd_demux_001_src0_data),                                          //           .data
8827 
                .src0_channel        (cmd_demux_001_src0_channel),                                       //           .channel
8828 
                .src0_startofpacket  (cmd_demux_001_src0_startofpacket),                                 //           .startofpacket
8829 
                .src0_endofpacket    (cmd_demux_001_src0_endofpacket),                                   //           .endofpacket
8830 
                .src1_ready          (cmd_demux_001_src1_ready),                                         //       src1.ready
8831 
                .src1_valid          (cmd_demux_001_src1_valid),                                         //           .valid
8832 
                .src1_data           (cmd_demux_001_src1_data),                                          //           .data
8833 
                .src1_channel        (cmd_demux_001_src1_channel),                                       //           .channel
8834 
                .src1_startofpacket  (cmd_demux_001_src1_startofpacket),                                 //           .startofpacket
8835 
                .src1_endofpacket    (cmd_demux_001_src1_endofpacket),                                   //           .endofpacket
8836 
                .src2_ready          (cmd_demux_001_src2_ready),                                         //       src2.ready
8837 
                .src2_valid          (cmd_demux_001_src2_valid),                                         //           .valid
8838 
                .src2_data           (cmd_demux_001_src2_data),                                          //           .data
8839 
                .src2_channel        (cmd_demux_001_src2_channel),                                       //           .channel
8840 
                .src2_startofpacket  (cmd_demux_001_src2_startofpacket),                                 //           .startofpacket
8841 
                .src2_endofpacket    (cmd_demux_001_src2_endofpacket),                                   //           .endofpacket
8842 
                .src3_ready          (cmd_demux_001_src3_ready),                                         //       src3.ready
8843 
                .src3_valid          (cmd_demux_001_src3_valid),                                         //           .valid
8844 
                .src3_data           (cmd_demux_001_src3_data),                                          //           .data
8845 
                .src3_channel        (cmd_demux_001_src3_channel),                                       //           .channel
8846 
                .src3_startofpacket  (cmd_demux_001_src3_startofpacket),                                 //           .startofpacket
8847 
                .src3_endofpacket    (cmd_demux_001_src3_endofpacket),                                   //           .endofpacket
8848 
                .src4_ready          (cmd_demux_001_src4_ready),                                         //       src4.ready
8849 
                .src4_valid          (cmd_demux_001_src4_valid),                                         //           .valid
8850 
                .src4_data           (cmd_demux_001_src4_data),                                          //           .data
8851 
                .src4_channel        (cmd_demux_001_src4_channel),                                       //           .channel
8852 
                .src4_startofpacket  (cmd_demux_001_src4_startofpacket),                                 //           .startofpacket
8853 
                .src4_endofpacket    (cmd_demux_001_src4_endofpacket),                                   //           .endofpacket
8854 
                .src5_ready          (cmd_demux_001_src5_ready),                                         //       src5.ready
8855 
                .src5_valid          (cmd_demux_001_src5_valid),                                         //           .valid
8856 
                .src5_data           (cmd_demux_001_src5_data),                                          //           .data
8857 
                .src5_channel        (cmd_demux_001_src5_channel),                                       //           .channel
8858 
                .src5_startofpacket  (cmd_demux_001_src5_startofpacket),                                 //           .startofpacket
8859 
                .src5_endofpacket    (cmd_demux_001_src5_endofpacket),                                   //           .endofpacket
8860 
                .src6_ready          (cmd_demux_001_src6_ready),                                         //       src6.ready
8861 
                .src6_valid          (cmd_demux_001_src6_valid),                                         //           .valid
8862 
                .src6_data           (cmd_demux_001_src6_data),                                          //           .data
8863 
                .src6_channel        (cmd_demux_001_src6_channel),                                       //           .channel
8864 
                .src6_startofpacket  (cmd_demux_001_src6_startofpacket),                                 //           .startofpacket
8865 
                .src6_endofpacket    (cmd_demux_001_src6_endofpacket),                                   //           .endofpacket
8866 
                .src7_ready          (cmd_demux_001_src7_ready),                                         //       src7.ready
8867 
                .src7_valid          (cmd_demux_001_src7_valid),                                         //           .valid
8868 
                .src7_data           (cmd_demux_001_src7_data),                                          //           .data
8869 
                .src7_channel        (cmd_demux_001_src7_channel),                                       //           .channel
8870 
                .src7_startofpacket  (cmd_demux_001_src7_startofpacket),                                 //           .startofpacket
8871 
                .src7_endofpacket    (cmd_demux_001_src7_endofpacket),                                   //           .endofpacket
8872 
                .src8_ready          (cmd_demux_001_src8_ready),                                         //       src8.ready
8873 
                .src8_valid          (cmd_demux_001_src8_valid),                                         //           .valid
8874 
                .src8_data           (cmd_demux_001_src8_data),                                          //           .data
8875 
                .src8_channel        (cmd_demux_001_src8_channel),                                       //           .channel
8876 
                .src8_startofpacket  (cmd_demux_001_src8_startofpacket),                                 //           .startofpacket
8877 
                .src8_endofpacket    (cmd_demux_001_src8_endofpacket),                                   //           .endofpacket
8878 
                .src9_ready          (cmd_demux_001_src9_ready),                                         //       src9.ready
8879 
                .src9_valid          (cmd_demux_001_src9_valid),                                         //           .valid
8880 
                .src9_data           (cmd_demux_001_src9_data),                                          //           .data
8881 
                .src9_channel        (cmd_demux_001_src9_channel),                                       //           .channel
8882 
                .src9_startofpacket  (cmd_demux_001_src9_startofpacket),                                 //           .startofpacket
8883 
                .src9_endofpacket    (cmd_demux_001_src9_endofpacket),                                   //           .endofpacket
8884 
                .src10_ready         (cmd_demux_001_src10_ready),                                        //      src10.ready
8885 
                .src10_valid         (cmd_demux_001_src10_valid),                                        //           .valid
8886 
                .src10_data          (cmd_demux_001_src10_data),                                         //           .data
8887 
                .src10_channel       (cmd_demux_001_src10_channel),                                      //           .channel
8888 
                .src10_startofpacket (cmd_demux_001_src10_startofpacket),                                //           .startofpacket
8889 
                .src10_endofpacket   (cmd_demux_001_src10_endofpacket),                                  //           .endofpacket
8890 
                .src11_ready         (cmd_demux_001_src11_ready),                                        //      src11.ready
8891 
                .src11_valid         (cmd_demux_001_src11_valid),                                        //           .valid
8892 
                .src11_data          (cmd_demux_001_src11_data),                                         //           .data
8893 
                .src11_channel       (cmd_demux_001_src11_channel),                                      //           .channel
8894 
                .src11_startofpacket (cmd_demux_001_src11_startofpacket),                                //           .startofpacket
8895 
                .src11_endofpacket   (cmd_demux_001_src11_endofpacket),                                  //           .endofpacket
8896 
                .src12_ready         (cmd_demux_001_src12_ready),                                        //      src12.ready
8897 
                .src12_valid         (cmd_demux_001_src12_valid),                                        //           .valid
8898 
                .src12_data          (cmd_demux_001_src12_data),                                         //           .data
8899 
                .src12_channel       (cmd_demux_001_src12_channel),                                      //           .channel
8900 
                .src12_startofpacket (cmd_demux_001_src12_startofpacket),                                //           .startofpacket
8901 
                .src12_endofpacket   (cmd_demux_001_src12_endofpacket),                                  //           .endofpacket
8902 
                .src13_ready         (cmd_demux_001_src13_ready),                                        //      src13.ready
8903 
                .src13_valid         (cmd_demux_001_src13_valid),                                        //           .valid
8904 
                .src13_data          (cmd_demux_001_src13_data),                                         //           .data
8905 
                .src13_channel       (cmd_demux_001_src13_channel),                                      //           .channel
8906 
                .src13_startofpacket (cmd_demux_001_src13_startofpacket),                                //           .startofpacket
8907 
                .src13_endofpacket   (cmd_demux_001_src13_endofpacket),                                  //           .endofpacket
8908 
                .src14_ready         (cmd_demux_001_src14_ready),                                        //      src14.ready
8909 
                .src14_valid         (cmd_demux_001_src14_valid),                                        //           .valid
8910 
                .src14_data          (cmd_demux_001_src14_data),                                         //           .data
8911 
                .src14_channel       (cmd_demux_001_src14_channel),                                      //           .channel
8912 
                .src14_startofpacket (cmd_demux_001_src14_startofpacket),                                //           .startofpacket
8913 
                .src14_endofpacket   (cmd_demux_001_src14_endofpacket),                                  //           .endofpacket
8914 
                .src15_ready         (cmd_demux_001_src15_ready),                                        //      src15.ready
8915 
                .src15_valid         (cmd_demux_001_src15_valid),                                        //           .valid
8916 
                .src15_data          (cmd_demux_001_src15_data),                                         //           .data
8917 
                .src15_channel       (cmd_demux_001_src15_channel),                                      //           .channel
8918 
                .src15_startofpacket (cmd_demux_001_src15_startofpacket),                                //           .startofpacket
8919 
                .src15_endofpacket   (cmd_demux_001_src15_endofpacket),                                  //           .endofpacket
8920 
                .src16_ready         (cmd_demux_001_src16_ready),                                        //      src16.ready
8921 
                .src16_valid         (cmd_demux_001_src16_valid),                                        //           .valid
8922 
                .src16_data          (cmd_demux_001_src16_data),                                         //           .data
8923 
                .src16_channel       (cmd_demux_001_src16_channel),                                      //           .channel
8924 
                .src16_startofpacket (cmd_demux_001_src16_startofpacket),                                //           .startofpacket
8925 
                .src16_endofpacket   (cmd_demux_001_src16_endofpacket),                                  //           .endofpacket
8926 
                .src17_ready         (cmd_demux_001_src17_ready),                                        //      src17.ready
8927 
                .src17_valid         (cmd_demux_001_src17_valid),                                        //           .valid
8928 
                .src17_data          (cmd_demux_001_src17_data),                                         //           .data
8929 
                .src17_channel       (cmd_demux_001_src17_channel),                                      //           .channel
8930 
                .src17_startofpacket (cmd_demux_001_src17_startofpacket),                                //           .startofpacket
8931 
                .src17_endofpacket   (cmd_demux_001_src17_endofpacket),                                  //           .endofpacket
8932 
                .src18_ready         (cmd_demux_001_src18_ready),                                        //      src18.ready
8933 
                .src18_valid         (cmd_demux_001_src18_valid),                                        //           .valid
8934 
                .src18_data          (cmd_demux_001_src18_data),                                         //           .data
8935 
                .src18_channel       (cmd_demux_001_src18_channel),                                      //           .channel
8936 
                .src18_startofpacket (cmd_demux_001_src18_startofpacket),                                //           .startofpacket
8937 
                .src18_endofpacket   (cmd_demux_001_src18_endofpacket),                                  //           .endofpacket
8938 
                .src19_ready         (cmd_demux_001_src19_ready),                                        //      src19.ready
8939 
                .src19_valid         (cmd_demux_001_src19_valid),                                        //           .valid
8940 
                .src19_data          (cmd_demux_001_src19_data),                                         //           .data
8941 
                .src19_channel       (cmd_demux_001_src19_channel),                                      //           .channel
8942 
                .src19_startofpacket (cmd_demux_001_src19_startofpacket),                                //           .startofpacket
8943 
                .src19_endofpacket   (cmd_demux_001_src19_endofpacket),                                  //           .endofpacket
8944 
                .src20_ready         (cmd_demux_001_src20_ready),                                        //      src20.ready
8945 
                .src20_valid         (cmd_demux_001_src20_valid),                                        //           .valid
8946 
                .src20_data          (cmd_demux_001_src20_data),                                         //           .data
8947 
                .src20_channel       (cmd_demux_001_src20_channel),                                      //           .channel
8948 
                .src20_startofpacket (cmd_demux_001_src20_startofpacket),                                //           .startofpacket
8949 
                .src20_endofpacket   (cmd_demux_001_src20_endofpacket),                                  //           .endofpacket
8950 
                .src21_ready         (cmd_demux_001_src21_ready),                                        //      src21.ready
8951 
                .src21_valid         (cmd_demux_001_src21_valid),                                        //           .valid
8952 
                .src21_data          (cmd_demux_001_src21_data),                                         //           .data
8953 
                .src21_channel       (cmd_demux_001_src21_channel),                                      //           .channel
8954 
                .src21_startofpacket (cmd_demux_001_src21_startofpacket),                                //           .startofpacket
8955 
                .src21_endofpacket   (cmd_demux_001_src21_endofpacket)                                   //           .endofpacket
8956 
        );
8957 
 
8958 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux (
8959 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
8960 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
8961 
                .src_ready           (cmd_mux_src_ready),                              //       src.ready
8962 
                .src_valid           (cmd_mux_src_valid),                              //          .valid
8963 
                .src_data            (cmd_mux_src_data),                               //          .data
8964 
                .src_channel         (cmd_mux_src_channel),                            //          .channel
8965 
                .src_startofpacket   (cmd_mux_src_startofpacket),                      //          .startofpacket
8966 
                .src_endofpacket     (cmd_mux_src_endofpacket),                        //          .endofpacket
8967 
                .sink0_ready         (cmd_demux_src0_ready),                           //     sink0.ready
8968 
                .sink0_valid         (cmd_demux_src0_valid),                           //          .valid
8969 
                .sink0_channel       (cmd_demux_src0_channel),                         //          .channel
8970 
                .sink0_data          (cmd_demux_src0_data),                            //          .data
8971 
                .sink0_startofpacket (cmd_demux_src0_startofpacket),                   //          .startofpacket
8972 
                .sink0_endofpacket   (cmd_demux_src0_endofpacket),                     //          .endofpacket
8973 
                .sink1_ready         (cmd_demux_001_src0_ready),                       //     sink1.ready
8974 
                .sink1_valid         (cmd_demux_001_src0_valid),                       //          .valid
8975 
                .sink1_channel       (cmd_demux_001_src0_channel),                     //          .channel
8976 
                .sink1_data          (cmd_demux_001_src0_data),                        //          .data
8977 
                .sink1_startofpacket (cmd_demux_001_src0_startofpacket),               //          .startofpacket
8978 
                .sink1_endofpacket   (cmd_demux_001_src0_endofpacket)                  //          .endofpacket
8979 
        );
8980 
 
8981 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_001 (
8982 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
8983 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
8984 
                .src_ready           (cmd_mux_001_src_ready),                          //       src.ready
8985 
                .src_valid           (cmd_mux_001_src_valid),                          //          .valid
8986 
                .src_data            (cmd_mux_001_src_data),                           //          .data
8987 
                .src_channel         (cmd_mux_001_src_channel),                        //          .channel
8988 
                .src_startofpacket   (cmd_mux_001_src_startofpacket),                  //          .startofpacket
8989 
                .src_endofpacket     (cmd_mux_001_src_endofpacket),                    //          .endofpacket
8990 
                .sink0_ready         (cmd_demux_src1_ready),                           //     sink0.ready
8991 
                .sink0_valid         (cmd_demux_src1_valid),                           //          .valid
8992 
                .sink0_channel       (cmd_demux_src1_channel),                         //          .channel
8993 
                .sink0_data          (cmd_demux_src1_data),                            //          .data
8994 
                .sink0_startofpacket (cmd_demux_src1_startofpacket),                   //          .startofpacket
8995 
                .sink0_endofpacket   (cmd_demux_src1_endofpacket),                     //          .endofpacket
8996 
                .sink1_ready         (cmd_demux_001_src1_ready),                       //     sink1.ready
8997 
                .sink1_valid         (cmd_demux_001_src1_valid),                       //          .valid
8998 
                .sink1_channel       (cmd_demux_001_src1_channel),                     //          .channel
8999 
                .sink1_data          (cmd_demux_001_src1_data),                        //          .data
9000 
                .sink1_startofpacket (cmd_demux_001_src1_startofpacket),               //          .startofpacket
9001 
                .sink1_endofpacket   (cmd_demux_001_src1_endofpacket)                  //          .endofpacket
9002 
        );
9003 
 
9004 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_002 (
9005 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9006 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9007 
                .src_ready           (cmd_mux_002_src_ready),                          //       src.ready
9008 
                .src_valid           (cmd_mux_002_src_valid),                          //          .valid
9009 
                .src_data            (cmd_mux_002_src_data),                           //          .data
9010 
                .src_channel         (cmd_mux_002_src_channel),                        //          .channel
9011 
                .src_startofpacket   (cmd_mux_002_src_startofpacket),                  //          .startofpacket
9012 
                .src_endofpacket     (cmd_mux_002_src_endofpacket),                    //          .endofpacket
9013 
                .sink0_ready         (cmd_demux_src2_ready),                           //     sink0.ready
9014 
                .sink0_valid         (cmd_demux_src2_valid),                           //          .valid
9015 
                .sink0_channel       (cmd_demux_src2_channel),                         //          .channel
9016 
                .sink0_data          (cmd_demux_src2_data),                            //          .data
9017 
                .sink0_startofpacket (cmd_demux_src2_startofpacket),                   //          .startofpacket
9018 
                .sink0_endofpacket   (cmd_demux_src2_endofpacket),                     //          .endofpacket
9019 
                .sink1_ready         (cmd_demux_001_src2_ready),                       //     sink1.ready
9020 
                .sink1_valid         (cmd_demux_001_src2_valid),                       //          .valid
9021 
                .sink1_channel       (cmd_demux_001_src2_channel),                     //          .channel
9022 
                .sink1_data          (cmd_demux_001_src2_data),                        //          .data
9023 
                .sink1_startofpacket (cmd_demux_001_src2_startofpacket),               //          .startofpacket
9024 
                .sink1_endofpacket   (cmd_demux_001_src2_endofpacket)                  //          .endofpacket
9025 
        );
9026 
 
9027 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_003 (
9028 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9029 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9030 
                .src_ready           (cmd_mux_003_src_ready),                          //       src.ready
9031 
                .src_valid           (cmd_mux_003_src_valid),                          //          .valid
9032 
                .src_data            (cmd_mux_003_src_data),                           //          .data
9033 
                .src_channel         (cmd_mux_003_src_channel),                        //          .channel
9034 
                .src_startofpacket   (cmd_mux_003_src_startofpacket),                  //          .startofpacket
9035 
                .src_endofpacket     (cmd_mux_003_src_endofpacket),                    //          .endofpacket
9036 
                .sink0_ready         (cmd_demux_src3_ready),                           //     sink0.ready
9037 
                .sink0_valid         (cmd_demux_src3_valid),                           //          .valid
9038 
                .sink0_channel       (cmd_demux_src3_channel),                         //          .channel
9039 
                .sink0_data          (cmd_demux_src3_data),                            //          .data
9040 
                .sink0_startofpacket (cmd_demux_src3_startofpacket),                   //          .startofpacket
9041 
                .sink0_endofpacket   (cmd_demux_src3_endofpacket),                     //          .endofpacket
9042 
                .sink1_ready         (cmd_demux_001_src3_ready),                       //     sink1.ready
9043 
                .sink1_valid         (cmd_demux_001_src3_valid),                       //          .valid
9044 
                .sink1_channel       (cmd_demux_001_src3_channel),                     //          .channel
9045 
                .sink1_data          (cmd_demux_001_src3_data),                        //          .data
9046 
                .sink1_startofpacket (cmd_demux_001_src3_startofpacket),               //          .startofpacket
9047 
                .sink1_endofpacket   (cmd_demux_001_src3_endofpacket)                  //          .endofpacket
9048 
        );
9049 
 
9050 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_004 (
9051 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9052 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9053 
                .src_ready           (cmd_mux_004_src_ready),                          //       src.ready
9054 
                .src_valid           (cmd_mux_004_src_valid),                          //          .valid
9055 
                .src_data            (cmd_mux_004_src_data),                           //          .data
9056 
                .src_channel         (cmd_mux_004_src_channel),                        //          .channel
9057 
                .src_startofpacket   (cmd_mux_004_src_startofpacket),                  //          .startofpacket
9058 
                .src_endofpacket     (cmd_mux_004_src_endofpacket),                    //          .endofpacket
9059 
                .sink0_ready         (cmd_demux_src4_ready),                           //     sink0.ready
9060 
                .sink0_valid         (cmd_demux_src4_valid),                           //          .valid
9061 
                .sink0_channel       (cmd_demux_src4_channel),                         //          .channel
9062 
                .sink0_data          (cmd_demux_src4_data),                            //          .data
9063 
                .sink0_startofpacket (cmd_demux_src4_startofpacket),                   //          .startofpacket
9064 
                .sink0_endofpacket   (cmd_demux_src4_endofpacket),                     //          .endofpacket
9065 
                .sink1_ready         (cmd_demux_001_src4_ready),                       //     sink1.ready
9066 
                .sink1_valid         (cmd_demux_001_src4_valid),                       //          .valid
9067 
                .sink1_channel       (cmd_demux_001_src4_channel),                     //          .channel
9068 
                .sink1_data          (cmd_demux_001_src4_data),                        //          .data
9069 
                .sink1_startofpacket (cmd_demux_001_src4_startofpacket),               //          .startofpacket
9070 
                .sink1_endofpacket   (cmd_demux_001_src4_endofpacket)                  //          .endofpacket
9071 
        );
9072 
 
9073 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_005 (
9074 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9075 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9076 
                .src_ready           (cmd_mux_005_src_ready),                          //       src.ready
9077 
                .src_valid           (cmd_mux_005_src_valid),                          //          .valid
9078 
                .src_data            (cmd_mux_005_src_data),                           //          .data
9079 
                .src_channel         (cmd_mux_005_src_channel),                        //          .channel
9080 
                .src_startofpacket   (cmd_mux_005_src_startofpacket),                  //          .startofpacket
9081 
                .src_endofpacket     (cmd_mux_005_src_endofpacket),                    //          .endofpacket
9082 
                .sink0_ready         (cmd_demux_src5_ready),                           //     sink0.ready
9083 
                .sink0_valid         (cmd_demux_src5_valid),                           //          .valid
9084 
                .sink0_channel       (cmd_demux_src5_channel),                         //          .channel
9085 
                .sink0_data          (cmd_demux_src5_data),                            //          .data
9086 
                .sink0_startofpacket (cmd_demux_src5_startofpacket),                   //          .startofpacket
9087 
                .sink0_endofpacket   (cmd_demux_src5_endofpacket),                     //          .endofpacket
9088 
                .sink1_ready         (cmd_demux_001_src5_ready),                       //     sink1.ready
9089 
                .sink1_valid         (cmd_demux_001_src5_valid),                       //          .valid
9090 
                .sink1_channel       (cmd_demux_001_src5_channel),                     //          .channel
9091 
                .sink1_data          (cmd_demux_001_src5_data),                        //          .data
9092 
                .sink1_startofpacket (cmd_demux_001_src5_startofpacket),               //          .startofpacket
9093 
                .sink1_endofpacket   (cmd_demux_001_src5_endofpacket)                  //          .endofpacket
9094 
        );
9095 
 
9096 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_006 (
9097 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9098 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9099 
                .src_ready           (cmd_mux_006_src_ready),                          //       src.ready
9100 
                .src_valid           (cmd_mux_006_src_valid),                          //          .valid
9101 
                .src_data            (cmd_mux_006_src_data),                           //          .data
9102 
                .src_channel         (cmd_mux_006_src_channel),                        //          .channel
9103 
                .src_startofpacket   (cmd_mux_006_src_startofpacket),                  //          .startofpacket
9104 
                .src_endofpacket     (cmd_mux_006_src_endofpacket),                    //          .endofpacket
9105 
                .sink0_ready         (cmd_demux_src6_ready),                           //     sink0.ready
9106 
                .sink0_valid         (cmd_demux_src6_valid),                           //          .valid
9107 
                .sink0_channel       (cmd_demux_src6_channel),                         //          .channel
9108 
                .sink0_data          (cmd_demux_src6_data),                            //          .data
9109 
                .sink0_startofpacket (cmd_demux_src6_startofpacket),                   //          .startofpacket
9110 
                .sink0_endofpacket   (cmd_demux_src6_endofpacket),                     //          .endofpacket
9111 
                .sink1_ready         (cmd_demux_001_src6_ready),                       //     sink1.ready
9112 
                .sink1_valid         (cmd_demux_001_src6_valid),                       //          .valid
9113 
                .sink1_channel       (cmd_demux_001_src6_channel),                     //          .channel
9114 
                .sink1_data          (cmd_demux_001_src6_data),                        //          .data
9115 
                .sink1_startofpacket (cmd_demux_001_src6_startofpacket),               //          .startofpacket
9116 
                .sink1_endofpacket   (cmd_demux_001_src6_endofpacket)                  //          .endofpacket
9117 
        );
9118 
 
9119 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_007 (
9120 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9121 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9122 
                .src_ready           (cmd_mux_007_src_ready),                          //       src.ready
9123 
                .src_valid           (cmd_mux_007_src_valid),                          //          .valid
9124 
                .src_data            (cmd_mux_007_src_data),                           //          .data
9125 
                .src_channel         (cmd_mux_007_src_channel),                        //          .channel
9126 
                .src_startofpacket   (cmd_mux_007_src_startofpacket),                  //          .startofpacket
9127 
                .src_endofpacket     (cmd_mux_007_src_endofpacket),                    //          .endofpacket
9128 
                .sink0_ready         (cmd_demux_src7_ready),                           //     sink0.ready
9129 
                .sink0_valid         (cmd_demux_src7_valid),                           //          .valid
9130 
                .sink0_channel       (cmd_demux_src7_channel),                         //          .channel
9131 
                .sink0_data          (cmd_demux_src7_data),                            //          .data
9132 
                .sink0_startofpacket (cmd_demux_src7_startofpacket),                   //          .startofpacket
9133 
                .sink0_endofpacket   (cmd_demux_src7_endofpacket),                     //          .endofpacket
9134 
                .sink1_ready         (cmd_demux_001_src7_ready),                       //     sink1.ready
9135 
                .sink1_valid         (cmd_demux_001_src7_valid),                       //          .valid
9136 
                .sink1_channel       (cmd_demux_001_src7_channel),                     //          .channel
9137 
                .sink1_data          (cmd_demux_001_src7_data),                        //          .data
9138 
                .sink1_startofpacket (cmd_demux_001_src7_startofpacket),               //          .startofpacket
9139 
                .sink1_endofpacket   (cmd_demux_001_src7_endofpacket)                  //          .endofpacket
9140 
        );
9141 
 
9142 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_008 (
9143 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9144 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9145 
                .src_ready           (cmd_mux_008_src_ready),                          //       src.ready
9146 
                .src_valid           (cmd_mux_008_src_valid),                          //          .valid
9147 
                .src_data            (cmd_mux_008_src_data),                           //          .data
9148 
                .src_channel         (cmd_mux_008_src_channel),                        //          .channel
9149 
                .src_startofpacket   (cmd_mux_008_src_startofpacket),                  //          .startofpacket
9150 
                .src_endofpacket     (cmd_mux_008_src_endofpacket),                    //          .endofpacket
9151 
                .sink0_ready         (cmd_demux_src8_ready),                           //     sink0.ready
9152 
                .sink0_valid         (cmd_demux_src8_valid),                           //          .valid
9153 
                .sink0_channel       (cmd_demux_src8_channel),                         //          .channel
9154 
                .sink0_data          (cmd_demux_src8_data),                            //          .data
9155 
                .sink0_startofpacket (cmd_demux_src8_startofpacket),                   //          .startofpacket
9156 
                .sink0_endofpacket   (cmd_demux_src8_endofpacket),                     //          .endofpacket
9157 
                .sink1_ready         (cmd_demux_001_src8_ready),                       //     sink1.ready
9158 
                .sink1_valid         (cmd_demux_001_src8_valid),                       //          .valid
9159 
                .sink1_channel       (cmd_demux_001_src8_channel),                     //          .channel
9160 
                .sink1_data          (cmd_demux_001_src8_data),                        //          .data
9161 
                .sink1_startofpacket (cmd_demux_001_src8_startofpacket),               //          .startofpacket
9162 
                .sink1_endofpacket   (cmd_demux_001_src8_endofpacket)                  //          .endofpacket
9163 
        );
9164 
 
9165 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_009 (
9166 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9167 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9168 
                .src_ready           (cmd_mux_009_src_ready),                          //       src.ready
9169 
                .src_valid           (cmd_mux_009_src_valid),                          //          .valid
9170 
                .src_data            (cmd_mux_009_src_data),                           //          .data
9171 
                .src_channel         (cmd_mux_009_src_channel),                        //          .channel
9172 
                .src_startofpacket   (cmd_mux_009_src_startofpacket),                  //          .startofpacket
9173 
                .src_endofpacket     (cmd_mux_009_src_endofpacket),                    //          .endofpacket
9174 
                .sink0_ready         (cmd_demux_src9_ready),                           //     sink0.ready
9175 
                .sink0_valid         (cmd_demux_src9_valid),                           //          .valid
9176 
                .sink0_channel       (cmd_demux_src9_channel),                         //          .channel
9177 
                .sink0_data          (cmd_demux_src9_data),                            //          .data
9178 
                .sink0_startofpacket (cmd_demux_src9_startofpacket),                   //          .startofpacket
9179 
                .sink0_endofpacket   (cmd_demux_src9_endofpacket),                     //          .endofpacket
9180 
                .sink1_ready         (cmd_demux_001_src9_ready),                       //     sink1.ready
9181 
                .sink1_valid         (cmd_demux_001_src9_valid),                       //          .valid
9182 
                .sink1_channel       (cmd_demux_001_src9_channel),                     //          .channel
9183 
                .sink1_data          (cmd_demux_001_src9_data),                        //          .data
9184 
                .sink1_startofpacket (cmd_demux_001_src9_startofpacket),               //          .startofpacket
9185 
                .sink1_endofpacket   (cmd_demux_001_src9_endofpacket)                  //          .endofpacket
9186 
        );
9187 
 
9188 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_010 (
9189 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9190 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9191 
                .src_ready           (cmd_mux_010_src_ready),                          //       src.ready
9192 
                .src_valid           (cmd_mux_010_src_valid),                          //          .valid
9193 
                .src_data            (cmd_mux_010_src_data),                           //          .data
9194 
                .src_channel         (cmd_mux_010_src_channel),                        //          .channel
9195 
                .src_startofpacket   (cmd_mux_010_src_startofpacket),                  //          .startofpacket
9196 
                .src_endofpacket     (cmd_mux_010_src_endofpacket),                    //          .endofpacket
9197 
                .sink0_ready         (cmd_demux_src10_ready),                          //     sink0.ready
9198 
                .sink0_valid         (cmd_demux_src10_valid),                          //          .valid
9199 
                .sink0_channel       (cmd_demux_src10_channel),                        //          .channel
9200 
                .sink0_data          (cmd_demux_src10_data),                           //          .data
9201 
                .sink0_startofpacket (cmd_demux_src10_startofpacket),                  //          .startofpacket
9202 
                .sink0_endofpacket   (cmd_demux_src10_endofpacket),                    //          .endofpacket
9203 
                .sink1_ready         (cmd_demux_001_src10_ready),                      //     sink1.ready
9204 
                .sink1_valid         (cmd_demux_001_src10_valid),                      //          .valid
9205 
                .sink1_channel       (cmd_demux_001_src10_channel),                    //          .channel
9206 
                .sink1_data          (cmd_demux_001_src10_data),                       //          .data
9207 
                .sink1_startofpacket (cmd_demux_001_src10_startofpacket),              //          .startofpacket
9208 
                .sink1_endofpacket   (cmd_demux_001_src10_endofpacket)                 //          .endofpacket
9209 
        );
9210 
 
9211 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_011 (
9212 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9213 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9214 
                .src_ready           (cmd_mux_011_src_ready),                          //       src.ready
9215 
                .src_valid           (cmd_mux_011_src_valid),                          //          .valid
9216 
                .src_data            (cmd_mux_011_src_data),                           //          .data
9217 
                .src_channel         (cmd_mux_011_src_channel),                        //          .channel
9218 
                .src_startofpacket   (cmd_mux_011_src_startofpacket),                  //          .startofpacket
9219 
                .src_endofpacket     (cmd_mux_011_src_endofpacket),                    //          .endofpacket
9220 
                .sink0_ready         (cmd_demux_src11_ready),                          //     sink0.ready
9221 
                .sink0_valid         (cmd_demux_src11_valid),                          //          .valid
9222 
                .sink0_channel       (cmd_demux_src11_channel),                        //          .channel
9223 
                .sink0_data          (cmd_demux_src11_data),                           //          .data
9224 
                .sink0_startofpacket (cmd_demux_src11_startofpacket),                  //          .startofpacket
9225 
                .sink0_endofpacket   (cmd_demux_src11_endofpacket),                    //          .endofpacket
9226 
                .sink1_ready         (cmd_demux_001_src11_ready),                      //     sink1.ready
9227 
                .sink1_valid         (cmd_demux_001_src11_valid),                      //          .valid
9228 
                .sink1_channel       (cmd_demux_001_src11_channel),                    //          .channel
9229 
                .sink1_data          (cmd_demux_001_src11_data),                       //          .data
9230 
                .sink1_startofpacket (cmd_demux_001_src11_startofpacket),              //          .startofpacket
9231 
                .sink1_endofpacket   (cmd_demux_001_src11_endofpacket)                 //          .endofpacket
9232 
        );
9233 
 
9234 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_012 (
9235 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9236 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9237 
                .src_ready           (cmd_mux_012_src_ready),                          //       src.ready
9238 
                .src_valid           (cmd_mux_012_src_valid),                          //          .valid
9239 
                .src_data            (cmd_mux_012_src_data),                           //          .data
9240 
                .src_channel         (cmd_mux_012_src_channel),                        //          .channel
9241 
                .src_startofpacket   (cmd_mux_012_src_startofpacket),                  //          .startofpacket
9242 
                .src_endofpacket     (cmd_mux_012_src_endofpacket),                    //          .endofpacket
9243 
                .sink0_ready         (cmd_demux_src12_ready),                          //     sink0.ready
9244 
                .sink0_valid         (cmd_demux_src12_valid),                          //          .valid
9245 
                .sink0_channel       (cmd_demux_src12_channel),                        //          .channel
9246 
                .sink0_data          (cmd_demux_src12_data),                           //          .data
9247 
                .sink0_startofpacket (cmd_demux_src12_startofpacket),                  //          .startofpacket
9248 
                .sink0_endofpacket   (cmd_demux_src12_endofpacket),                    //          .endofpacket
9249 
                .sink1_ready         (cmd_demux_001_src12_ready),                      //     sink1.ready
9250 
                .sink1_valid         (cmd_demux_001_src12_valid),                      //          .valid
9251 
                .sink1_channel       (cmd_demux_001_src12_channel),                    //          .channel
9252 
                .sink1_data          (cmd_demux_001_src12_data),                       //          .data
9253 
                .sink1_startofpacket (cmd_demux_001_src12_startofpacket),              //          .startofpacket
9254 
                .sink1_endofpacket   (cmd_demux_001_src12_endofpacket)                 //          .endofpacket
9255 
        );
9256 
 
9257 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_013 (
9258 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9259 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9260 
                .src_ready           (cmd_mux_013_src_ready),                          //       src.ready
9261 
                .src_valid           (cmd_mux_013_src_valid),                          //          .valid
9262 
                .src_data            (cmd_mux_013_src_data),                           //          .data
9263 
                .src_channel         (cmd_mux_013_src_channel),                        //          .channel
9264 
                .src_startofpacket   (cmd_mux_013_src_startofpacket),                  //          .startofpacket
9265 
                .src_endofpacket     (cmd_mux_013_src_endofpacket),                    //          .endofpacket
9266 
                .sink0_ready         (cmd_demux_src13_ready),                          //     sink0.ready
9267 
                .sink0_valid         (cmd_demux_src13_valid),                          //          .valid
9268 
                .sink0_channel       (cmd_demux_src13_channel),                        //          .channel
9269 
                .sink0_data          (cmd_demux_src13_data),                           //          .data
9270 
                .sink0_startofpacket (cmd_demux_src13_startofpacket),                  //          .startofpacket
9271 
                .sink0_endofpacket   (cmd_demux_src13_endofpacket),                    //          .endofpacket
9272 
                .sink1_ready         (cmd_demux_001_src13_ready),                      //     sink1.ready
9273 
                .sink1_valid         (cmd_demux_001_src13_valid),                      //          .valid
9274 
                .sink1_channel       (cmd_demux_001_src13_channel),                    //          .channel
9275 
                .sink1_data          (cmd_demux_001_src13_data),                       //          .data
9276 
                .sink1_startofpacket (cmd_demux_001_src13_startofpacket),              //          .startofpacket
9277 
                .sink1_endofpacket   (cmd_demux_001_src13_endofpacket)                 //          .endofpacket
9278 
        );
9279 
 
9280 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_014 (
9281 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9282 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9283 
                .src_ready           (cmd_mux_014_src_ready),                          //       src.ready
9284 
                .src_valid           (cmd_mux_014_src_valid),                          //          .valid
9285 
                .src_data            (cmd_mux_014_src_data),                           //          .data
9286 
                .src_channel         (cmd_mux_014_src_channel),                        //          .channel
9287 
                .src_startofpacket   (cmd_mux_014_src_startofpacket),                  //          .startofpacket
9288 
                .src_endofpacket     (cmd_mux_014_src_endofpacket),                    //          .endofpacket
9289 
                .sink0_ready         (cmd_demux_src14_ready),                          //     sink0.ready
9290 
                .sink0_valid         (cmd_demux_src14_valid),                          //          .valid
9291 
                .sink0_channel       (cmd_demux_src14_channel),                        //          .channel
9292 
                .sink0_data          (cmd_demux_src14_data),                           //          .data
9293 
                .sink0_startofpacket (cmd_demux_src14_startofpacket),                  //          .startofpacket
9294 
                .sink0_endofpacket   (cmd_demux_src14_endofpacket),                    //          .endofpacket
9295 
                .sink1_ready         (cmd_demux_001_src14_ready),                      //     sink1.ready
9296 
                .sink1_valid         (cmd_demux_001_src14_valid),                      //          .valid
9297 
                .sink1_channel       (cmd_demux_001_src14_channel),                    //          .channel
9298 
                .sink1_data          (cmd_demux_001_src14_data),                       //          .data
9299 
                .sink1_startofpacket (cmd_demux_001_src14_startofpacket),              //          .startofpacket
9300 
                .sink1_endofpacket   (cmd_demux_001_src14_endofpacket)                 //          .endofpacket
9301 
        );
9302 
 
9303 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_015 (
9304 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9305 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9306 
                .src_ready           (cmd_mux_015_src_ready),                          //       src.ready
9307 
                .src_valid           (cmd_mux_015_src_valid),                          //          .valid
9308 
                .src_data            (cmd_mux_015_src_data),                           //          .data
9309 
                .src_channel         (cmd_mux_015_src_channel),                        //          .channel
9310 
                .src_startofpacket   (cmd_mux_015_src_startofpacket),                  //          .startofpacket
9311 
                .src_endofpacket     (cmd_mux_015_src_endofpacket),                    //          .endofpacket
9312 
                .sink0_ready         (cmd_demux_src15_ready),                          //     sink0.ready
9313 
                .sink0_valid         (cmd_demux_src15_valid),                          //          .valid
9314 
                .sink0_channel       (cmd_demux_src15_channel),                        //          .channel
9315 
                .sink0_data          (cmd_demux_src15_data),                           //          .data
9316 
                .sink0_startofpacket (cmd_demux_src15_startofpacket),                  //          .startofpacket
9317 
                .sink0_endofpacket   (cmd_demux_src15_endofpacket),                    //          .endofpacket
9318 
                .sink1_ready         (cmd_demux_001_src15_ready),                      //     sink1.ready
9319 
                .sink1_valid         (cmd_demux_001_src15_valid),                      //          .valid
9320 
                .sink1_channel       (cmd_demux_001_src15_channel),                    //          .channel
9321 
                .sink1_data          (cmd_demux_001_src15_data),                       //          .data
9322 
                .sink1_startofpacket (cmd_demux_001_src15_startofpacket),              //          .startofpacket
9323 
                .sink1_endofpacket   (cmd_demux_001_src15_endofpacket)                 //          .endofpacket
9324 
        );
9325 
 
9326 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_016 (
9327 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9328 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9329 
                .src_ready           (cmd_mux_016_src_ready),                          //       src.ready
9330 
                .src_valid           (cmd_mux_016_src_valid),                          //          .valid
9331 
                .src_data            (cmd_mux_016_src_data),                           //          .data
9332 
                .src_channel         (cmd_mux_016_src_channel),                        //          .channel
9333 
                .src_startofpacket   (cmd_mux_016_src_startofpacket),                  //          .startofpacket
9334 
                .src_endofpacket     (cmd_mux_016_src_endofpacket),                    //          .endofpacket
9335 
                .sink0_ready         (cmd_demux_src16_ready),                          //     sink0.ready
9336 
                .sink0_valid         (cmd_demux_src16_valid),                          //          .valid
9337 
                .sink0_channel       (cmd_demux_src16_channel),                        //          .channel
9338 
                .sink0_data          (cmd_demux_src16_data),                           //          .data
9339 
                .sink0_startofpacket (cmd_demux_src16_startofpacket),                  //          .startofpacket
9340 
                .sink0_endofpacket   (cmd_demux_src16_endofpacket),                    //          .endofpacket
9341 
                .sink1_ready         (cmd_demux_001_src16_ready),                      //     sink1.ready
9342 
                .sink1_valid         (cmd_demux_001_src16_valid),                      //          .valid
9343 
                .sink1_channel       (cmd_demux_001_src16_channel),                    //          .channel
9344 
                .sink1_data          (cmd_demux_001_src16_data),                       //          .data
9345 
                .sink1_startofpacket (cmd_demux_001_src16_startofpacket),              //          .startofpacket
9346 
                .sink1_endofpacket   (cmd_demux_001_src16_endofpacket)                 //          .endofpacket
9347 
        );
9348 
 
9349 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_017 (
9350 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9351 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9352 
                .src_ready           (cmd_mux_017_src_ready),                          //       src.ready
9353 
                .src_valid           (cmd_mux_017_src_valid),                          //          .valid
9354 
                .src_data            (cmd_mux_017_src_data),                           //          .data
9355 
                .src_channel         (cmd_mux_017_src_channel),                        //          .channel
9356 
                .src_startofpacket   (cmd_mux_017_src_startofpacket),                  //          .startofpacket
9357 
                .src_endofpacket     (cmd_mux_017_src_endofpacket),                    //          .endofpacket
9358 
                .sink0_ready         (cmd_demux_src17_ready),                          //     sink0.ready
9359 
                .sink0_valid         (cmd_demux_src17_valid),                          //          .valid
9360 
                .sink0_channel       (cmd_demux_src17_channel),                        //          .channel
9361 
                .sink0_data          (cmd_demux_src17_data),                           //          .data
9362 
                .sink0_startofpacket (cmd_demux_src17_startofpacket),                  //          .startofpacket
9363 
                .sink0_endofpacket   (cmd_demux_src17_endofpacket),                    //          .endofpacket
9364 
                .sink1_ready         (cmd_demux_001_src17_ready),                      //     sink1.ready
9365 
                .sink1_valid         (cmd_demux_001_src17_valid),                      //          .valid
9366 
                .sink1_channel       (cmd_demux_001_src17_channel),                    //          .channel
9367 
                .sink1_data          (cmd_demux_001_src17_data),                       //          .data
9368 
                .sink1_startofpacket (cmd_demux_001_src17_startofpacket),              //          .startofpacket
9369 
                .sink1_endofpacket   (cmd_demux_001_src17_endofpacket)                 //          .endofpacket
9370 
        );
9371 
 
9372 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_018 (
9373 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9374 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9375 
                .src_ready           (cmd_mux_018_src_ready),                          //       src.ready
9376 
                .src_valid           (cmd_mux_018_src_valid),                          //          .valid
9377 
                .src_data            (cmd_mux_018_src_data),                           //          .data
9378 
                .src_channel         (cmd_mux_018_src_channel),                        //          .channel
9379 
                .src_startofpacket   (cmd_mux_018_src_startofpacket),                  //          .startofpacket
9380 
                .src_endofpacket     (cmd_mux_018_src_endofpacket),                    //          .endofpacket
9381 
                .sink0_ready         (cmd_demux_src18_ready),                          //     sink0.ready
9382 
                .sink0_valid         (cmd_demux_src18_valid),                          //          .valid
9383 
                .sink0_channel       (cmd_demux_src18_channel),                        //          .channel
9384 
                .sink0_data          (cmd_demux_src18_data),                           //          .data
9385 
                .sink0_startofpacket (cmd_demux_src18_startofpacket),                  //          .startofpacket
9386 
                .sink0_endofpacket   (cmd_demux_src18_endofpacket),                    //          .endofpacket
9387 
                .sink1_ready         (cmd_demux_001_src18_ready),                      //     sink1.ready
9388 
                .sink1_valid         (cmd_demux_001_src18_valid),                      //          .valid
9389 
                .sink1_channel       (cmd_demux_001_src18_channel),                    //          .channel
9390 
                .sink1_data          (cmd_demux_001_src18_data),                       //          .data
9391 
                .sink1_startofpacket (cmd_demux_001_src18_startofpacket),              //          .startofpacket
9392 
                .sink1_endofpacket   (cmd_demux_001_src18_endofpacket)                 //          .endofpacket
9393 
        );
9394 
 
9395 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_019 (
9396 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9397 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9398 
                .src_ready           (cmd_mux_019_src_ready),                          //       src.ready
9399 
                .src_valid           (cmd_mux_019_src_valid),                          //          .valid
9400 
                .src_data            (cmd_mux_019_src_data),                           //          .data
9401 
                .src_channel         (cmd_mux_019_src_channel),                        //          .channel
9402 
                .src_startofpacket   (cmd_mux_019_src_startofpacket),                  //          .startofpacket
9403 
                .src_endofpacket     (cmd_mux_019_src_endofpacket),                    //          .endofpacket
9404 
                .sink0_ready         (cmd_demux_src19_ready),                          //     sink0.ready
9405 
                .sink0_valid         (cmd_demux_src19_valid),                          //          .valid
9406 
                .sink0_channel       (cmd_demux_src19_channel),                        //          .channel
9407 
                .sink0_data          (cmd_demux_src19_data),                           //          .data
9408 
                .sink0_startofpacket (cmd_demux_src19_startofpacket),                  //          .startofpacket
9409 
                .sink0_endofpacket   (cmd_demux_src19_endofpacket),                    //          .endofpacket
9410 
                .sink1_ready         (cmd_demux_001_src19_ready),                      //     sink1.ready
9411 
                .sink1_valid         (cmd_demux_001_src19_valid),                      //          .valid
9412 
                .sink1_channel       (cmd_demux_001_src19_channel),                    //          .channel
9413 
                .sink1_data          (cmd_demux_001_src19_data),                       //          .data
9414 
                .sink1_startofpacket (cmd_demux_001_src19_startofpacket),              //          .startofpacket
9415 
                .sink1_endofpacket   (cmd_demux_001_src19_endofpacket)                 //          .endofpacket
9416 
        );
9417 
 
9418 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_020 (
9419 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9420 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9421 
                .src_ready           (cmd_mux_020_src_ready),                          //       src.ready
9422 
                .src_valid           (cmd_mux_020_src_valid),                          //          .valid
9423 
                .src_data            (cmd_mux_020_src_data),                           //          .data
9424 
                .src_channel         (cmd_mux_020_src_channel),                        //          .channel
9425 
                .src_startofpacket   (cmd_mux_020_src_startofpacket),                  //          .startofpacket
9426 
                .src_endofpacket     (cmd_mux_020_src_endofpacket),                    //          .endofpacket
9427 
                .sink0_ready         (cmd_demux_src20_ready),                          //     sink0.ready
9428 
                .sink0_valid         (cmd_demux_src20_valid),                          //          .valid
9429 
                .sink0_channel       (cmd_demux_src20_channel),                        //          .channel
9430 
                .sink0_data          (cmd_demux_src20_data),                           //          .data
9431 
                .sink0_startofpacket (cmd_demux_src20_startofpacket),                  //          .startofpacket
9432 
                .sink0_endofpacket   (cmd_demux_src20_endofpacket),                    //          .endofpacket
9433 
                .sink1_ready         (cmd_demux_001_src20_ready),                      //     sink1.ready
9434 
                .sink1_valid         (cmd_demux_001_src20_valid),                      //          .valid
9435 
                .sink1_channel       (cmd_demux_001_src20_channel),                    //          .channel
9436 
                .sink1_data          (cmd_demux_001_src20_data),                       //          .data
9437 
                .sink1_startofpacket (cmd_demux_001_src20_startofpacket),              //          .startofpacket
9438 
                .sink1_endofpacket   (cmd_demux_001_src20_endofpacket)                 //          .endofpacket
9439 
        );
9440 
 
9441 
        ulight_fifo_mm_interconnect_0_cmd_mux cmd_mux_021 (
9442 
                .clk                 (clk_0_clk_clk),                                  //       clk.clk
9443 
                .reset               (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9444 
                .src_ready           (cmd_mux_021_src_ready),                          //       src.ready
9445 
                .src_valid           (cmd_mux_021_src_valid),                          //          .valid
9446 
                .src_data            (cmd_mux_021_src_data),                           //          .data
9447 
                .src_channel         (cmd_mux_021_src_channel),                        //          .channel
9448 
                .src_startofpacket   (cmd_mux_021_src_startofpacket),                  //          .startofpacket
9449 
                .src_endofpacket     (cmd_mux_021_src_endofpacket),                    //          .endofpacket
9450 
                .sink0_ready         (cmd_demux_src21_ready),                          //     sink0.ready
9451 
                .sink0_valid         (cmd_demux_src21_valid),                          //          .valid
9452 
                .sink0_channel       (cmd_demux_src21_channel),                        //          .channel
9453 
                .sink0_data          (cmd_demux_src21_data),                           //          .data
9454 
                .sink0_startofpacket (cmd_demux_src21_startofpacket),                  //          .startofpacket
9455 
                .sink0_endofpacket   (cmd_demux_src21_endofpacket),                    //          .endofpacket
9456 
                .sink1_ready         (cmd_demux_001_src21_ready),                      //     sink1.ready
9457 
                .sink1_valid         (cmd_demux_001_src21_valid),                      //          .valid
9458 
                .sink1_channel       (cmd_demux_001_src21_channel),                    //          .channel
9459 
                .sink1_data          (cmd_demux_001_src21_data),                       //          .data
9460 
                .sink1_startofpacket (cmd_demux_001_src21_startofpacket),              //          .startofpacket
9461 
                .sink1_endofpacket   (cmd_demux_001_src21_endofpacket)                 //          .endofpacket
9462 
        );
9463 
 
9464 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux (
9465 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9466 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9467 
                .sink_ready         (router_002_src_ready),                           //      sink.ready
9468 
                .sink_channel       (router_002_src_channel),                         //          .channel
9469 
                .sink_data          (router_002_src_data),                            //          .data
9470 
                .sink_startofpacket (router_002_src_startofpacket),                   //          .startofpacket
9471 
                .sink_endofpacket   (router_002_src_endofpacket),                     //          .endofpacket
9472 
                .sink_valid         (router_002_src_valid),                           //          .valid
9473 
                .src0_ready         (rsp_demux_src0_ready),                           //      src0.ready
9474 
                .src0_valid         (rsp_demux_src0_valid),                           //          .valid
9475 
                .src0_data          (rsp_demux_src0_data),                            //          .data
9476 
                .src0_channel       (rsp_demux_src0_channel),                         //          .channel
9477 
                .src0_startofpacket (rsp_demux_src0_startofpacket),                   //          .startofpacket
9478 
                .src0_endofpacket   (rsp_demux_src0_endofpacket),                     //          .endofpacket
9479 
                .src1_ready         (rsp_demux_src1_ready),                           //      src1.ready
9480 
                .src1_valid         (rsp_demux_src1_valid),                           //          .valid
9481 
                .src1_data          (rsp_demux_src1_data),                            //          .data
9482 
                .src1_channel       (rsp_demux_src1_channel),                         //          .channel
9483 
                .src1_startofpacket (rsp_demux_src1_startofpacket),                   //          .startofpacket
9484 
                .src1_endofpacket   (rsp_demux_src1_endofpacket)                      //          .endofpacket
9485 
        );
9486 
 
9487 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_001 (
9488 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9489 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9490 
                .sink_ready         (router_003_src_ready),                           //      sink.ready
9491 
                .sink_channel       (router_003_src_channel),                         //          .channel
9492 
                .sink_data          (router_003_src_data),                            //          .data
9493 
                .sink_startofpacket (router_003_src_startofpacket),                   //          .startofpacket
9494 
                .sink_endofpacket   (router_003_src_endofpacket),                     //          .endofpacket
9495 
                .sink_valid         (router_003_src_valid),                           //          .valid
9496 
                .src0_ready         (rsp_demux_001_src0_ready),                       //      src0.ready
9497 
                .src0_valid         (rsp_demux_001_src0_valid),                       //          .valid
9498 
                .src0_data          (rsp_demux_001_src0_data),                        //          .data
9499 
                .src0_channel       (rsp_demux_001_src0_channel),                     //          .channel
9500 
                .src0_startofpacket (rsp_demux_001_src0_startofpacket),               //          .startofpacket
9501 
                .src0_endofpacket   (rsp_demux_001_src0_endofpacket),                 //          .endofpacket
9502 
                .src1_ready         (rsp_demux_001_src1_ready),                       //      src1.ready
9503 
                .src1_valid         (rsp_demux_001_src1_valid),                       //          .valid
9504 
                .src1_data          (rsp_demux_001_src1_data),                        //          .data
9505 
                .src1_channel       (rsp_demux_001_src1_channel),                     //          .channel
9506 
                .src1_startofpacket (rsp_demux_001_src1_startofpacket),               //          .startofpacket
9507 
                .src1_endofpacket   (rsp_demux_001_src1_endofpacket)                  //          .endofpacket
9508 
        );
9509 
 
9510 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_002 (
9511 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9512 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9513 
                .sink_ready         (router_004_src_ready),                           //      sink.ready
9514 
                .sink_channel       (router_004_src_channel),                         //          .channel
9515 
                .sink_data          (router_004_src_data),                            //          .data
9516 
                .sink_startofpacket (router_004_src_startofpacket),                   //          .startofpacket
9517 
                .sink_endofpacket   (router_004_src_endofpacket),                     //          .endofpacket
9518 
                .sink_valid         (router_004_src_valid),                           //          .valid
9519 
                .src0_ready         (rsp_demux_002_src0_ready),                       //      src0.ready
9520 
                .src0_valid         (rsp_demux_002_src0_valid),                       //          .valid
9521 
                .src0_data          (rsp_demux_002_src0_data),                        //          .data
9522 
                .src0_channel       (rsp_demux_002_src0_channel),                     //          .channel
9523 
                .src0_startofpacket (rsp_demux_002_src0_startofpacket),               //          .startofpacket
9524 
                .src0_endofpacket   (rsp_demux_002_src0_endofpacket),                 //          .endofpacket
9525 
                .src1_ready         (rsp_demux_002_src1_ready),                       //      src1.ready
9526 
                .src1_valid         (rsp_demux_002_src1_valid),                       //          .valid
9527 
                .src1_data          (rsp_demux_002_src1_data),                        //          .data
9528 
                .src1_channel       (rsp_demux_002_src1_channel),                     //          .channel
9529 
                .src1_startofpacket (rsp_demux_002_src1_startofpacket),               //          .startofpacket
9530 
                .src1_endofpacket   (rsp_demux_002_src1_endofpacket)                  //          .endofpacket
9531 
        );
9532 
 
9533 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_003 (
9534 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9535 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9536 
                .sink_ready         (router_005_src_ready),                           //      sink.ready
9537 
                .sink_channel       (router_005_src_channel),                         //          .channel
9538 
                .sink_data          (router_005_src_data),                            //          .data
9539 
                .sink_startofpacket (router_005_src_startofpacket),                   //          .startofpacket
9540 
                .sink_endofpacket   (router_005_src_endofpacket),                     //          .endofpacket
9541 
                .sink_valid         (router_005_src_valid),                           //          .valid
9542 
                .src0_ready         (rsp_demux_003_src0_ready),                       //      src0.ready
9543 
                .src0_valid         (rsp_demux_003_src0_valid),                       //          .valid
9544 
                .src0_data          (rsp_demux_003_src0_data),                        //          .data
9545 
                .src0_channel       (rsp_demux_003_src0_channel),                     //          .channel
9546 
                .src0_startofpacket (rsp_demux_003_src0_startofpacket),               //          .startofpacket
9547 
                .src0_endofpacket   (rsp_demux_003_src0_endofpacket),                 //          .endofpacket
9548 
                .src1_ready         (rsp_demux_003_src1_ready),                       //      src1.ready
9549 
                .src1_valid         (rsp_demux_003_src1_valid),                       //          .valid
9550 
                .src1_data          (rsp_demux_003_src1_data),                        //          .data
9551 
                .src1_channel       (rsp_demux_003_src1_channel),                     //          .channel
9552 
                .src1_startofpacket (rsp_demux_003_src1_startofpacket),               //          .startofpacket
9553 
                .src1_endofpacket   (rsp_demux_003_src1_endofpacket)                  //          .endofpacket
9554 
        );
9555 
 
9556 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_004 (
9557 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9558 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9559 
                .sink_ready         (router_006_src_ready),                           //      sink.ready
9560 
                .sink_channel       (router_006_src_channel),                         //          .channel
9561 
                .sink_data          (router_006_src_data),                            //          .data
9562 
                .sink_startofpacket (router_006_src_startofpacket),                   //          .startofpacket
9563 
                .sink_endofpacket   (router_006_src_endofpacket),                     //          .endofpacket
9564 
                .sink_valid         (router_006_src_valid),                           //          .valid
9565 
                .src0_ready         (rsp_demux_004_src0_ready),                       //      src0.ready
9566 
                .src0_valid         (rsp_demux_004_src0_valid),                       //          .valid
9567 
                .src0_data          (rsp_demux_004_src0_data),                        //          .data
9568 
                .src0_channel       (rsp_demux_004_src0_channel),                     //          .channel
9569 
                .src0_startofpacket (rsp_demux_004_src0_startofpacket),               //          .startofpacket
9570 
                .src0_endofpacket   (rsp_demux_004_src0_endofpacket),                 //          .endofpacket
9571 
                .src1_ready         (rsp_demux_004_src1_ready),                       //      src1.ready
9572 
                .src1_valid         (rsp_demux_004_src1_valid),                       //          .valid
9573 
                .src1_data          (rsp_demux_004_src1_data),                        //          .data
9574 
                .src1_channel       (rsp_demux_004_src1_channel),                     //          .channel
9575 
                .src1_startofpacket (rsp_demux_004_src1_startofpacket),               //          .startofpacket
9576 
                .src1_endofpacket   (rsp_demux_004_src1_endofpacket)                  //          .endofpacket
9577 
        );
9578 
 
9579 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_005 (
9580 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9581 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9582 
                .sink_ready         (router_007_src_ready),                           //      sink.ready
9583 
                .sink_channel       (router_007_src_channel),                         //          .channel
9584 
                .sink_data          (router_007_src_data),                            //          .data
9585 
                .sink_startofpacket (router_007_src_startofpacket),                   //          .startofpacket
9586 
                .sink_endofpacket   (router_007_src_endofpacket),                     //          .endofpacket
9587 
                .sink_valid         (router_007_src_valid),                           //          .valid
9588 
                .src0_ready         (rsp_demux_005_src0_ready),                       //      src0.ready
9589 
                .src0_valid         (rsp_demux_005_src0_valid),                       //          .valid
9590 
                .src0_data          (rsp_demux_005_src0_data),                        //          .data
9591 
                .src0_channel       (rsp_demux_005_src0_channel),                     //          .channel
9592 
                .src0_startofpacket (rsp_demux_005_src0_startofpacket),               //          .startofpacket
9593 
                .src0_endofpacket   (rsp_demux_005_src0_endofpacket),                 //          .endofpacket
9594 
                .src1_ready         (rsp_demux_005_src1_ready),                       //      src1.ready
9595 
                .src1_valid         (rsp_demux_005_src1_valid),                       //          .valid
9596 
                .src1_data          (rsp_demux_005_src1_data),                        //          .data
9597 
                .src1_channel       (rsp_demux_005_src1_channel),                     //          .channel
9598 
                .src1_startofpacket (rsp_demux_005_src1_startofpacket),               //          .startofpacket
9599 
                .src1_endofpacket   (rsp_demux_005_src1_endofpacket)                  //          .endofpacket
9600 
        );
9601 
 
9602 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_006 (
9603 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9604 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9605 
                .sink_ready         (router_008_src_ready),                           //      sink.ready
9606 
                .sink_channel       (router_008_src_channel),                         //          .channel
9607 
                .sink_data          (router_008_src_data),                            //          .data
9608 
                .sink_startofpacket (router_008_src_startofpacket),                   //          .startofpacket
9609 
                .sink_endofpacket   (router_008_src_endofpacket),                     //          .endofpacket
9610 
                .sink_valid         (router_008_src_valid),                           //          .valid
9611 
                .src0_ready         (rsp_demux_006_src0_ready),                       //      src0.ready
9612 
                .src0_valid         (rsp_demux_006_src0_valid),                       //          .valid
9613 
                .src0_data          (rsp_demux_006_src0_data),                        //          .data
9614 
                .src0_channel       (rsp_demux_006_src0_channel),                     //          .channel
9615 
                .src0_startofpacket (rsp_demux_006_src0_startofpacket),               //          .startofpacket
9616 
                .src0_endofpacket   (rsp_demux_006_src0_endofpacket),                 //          .endofpacket
9617 
                .src1_ready         (rsp_demux_006_src1_ready),                       //      src1.ready
9618 
                .src1_valid         (rsp_demux_006_src1_valid),                       //          .valid
9619 
                .src1_data          (rsp_demux_006_src1_data),                        //          .data
9620 
                .src1_channel       (rsp_demux_006_src1_channel),                     //          .channel
9621 
                .src1_startofpacket (rsp_demux_006_src1_startofpacket),               //          .startofpacket
9622 
                .src1_endofpacket   (rsp_demux_006_src1_endofpacket)                  //          .endofpacket
9623 
        );
9624 
 
9625 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_007 (
9626 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9627 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9628 
                .sink_ready         (router_009_src_ready),                           //      sink.ready
9629 
                .sink_channel       (router_009_src_channel),                         //          .channel
9630 
                .sink_data          (router_009_src_data),                            //          .data
9631 
                .sink_startofpacket (router_009_src_startofpacket),                   //          .startofpacket
9632 
                .sink_endofpacket   (router_009_src_endofpacket),                     //          .endofpacket
9633 
                .sink_valid         (router_009_src_valid),                           //          .valid
9634 
                .src0_ready         (rsp_demux_007_src0_ready),                       //      src0.ready
9635 
                .src0_valid         (rsp_demux_007_src0_valid),                       //          .valid
9636 
                .src0_data          (rsp_demux_007_src0_data),                        //          .data
9637 
                .src0_channel       (rsp_demux_007_src0_channel),                     //          .channel
9638 
                .src0_startofpacket (rsp_demux_007_src0_startofpacket),               //          .startofpacket
9639 
                .src0_endofpacket   (rsp_demux_007_src0_endofpacket),                 //          .endofpacket
9640 
                .src1_ready         (rsp_demux_007_src1_ready),                       //      src1.ready
9641 
                .src1_valid         (rsp_demux_007_src1_valid),                       //          .valid
9642 
                .src1_data          (rsp_demux_007_src1_data),                        //          .data
9643 
                .src1_channel       (rsp_demux_007_src1_channel),                     //          .channel
9644 
                .src1_startofpacket (rsp_demux_007_src1_startofpacket),               //          .startofpacket
9645 
                .src1_endofpacket   (rsp_demux_007_src1_endofpacket)                  //          .endofpacket
9646 
        );
9647 
 
9648 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_008 (
9649 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9650 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9651 
                .sink_ready         (router_010_src_ready),                           //      sink.ready
9652 
                .sink_channel       (router_010_src_channel),                         //          .channel
9653 
                .sink_data          (router_010_src_data),                            //          .data
9654 
                .sink_startofpacket (router_010_src_startofpacket),                   //          .startofpacket
9655 
                .sink_endofpacket   (router_010_src_endofpacket),                     //          .endofpacket
9656 
                .sink_valid         (router_010_src_valid),                           //          .valid
9657 
                .src0_ready         (rsp_demux_008_src0_ready),                       //      src0.ready
9658 
                .src0_valid         (rsp_demux_008_src0_valid),                       //          .valid
9659 
                .src0_data          (rsp_demux_008_src0_data),                        //          .data
9660 
                .src0_channel       (rsp_demux_008_src0_channel),                     //          .channel
9661 
                .src0_startofpacket (rsp_demux_008_src0_startofpacket),               //          .startofpacket
9662 
                .src0_endofpacket   (rsp_demux_008_src0_endofpacket),                 //          .endofpacket
9663 
                .src1_ready         (rsp_demux_008_src1_ready),                       //      src1.ready
9664 
                .src1_valid         (rsp_demux_008_src1_valid),                       //          .valid
9665 
                .src1_data          (rsp_demux_008_src1_data),                        //          .data
9666 
                .src1_channel       (rsp_demux_008_src1_channel),                     //          .channel
9667 
                .src1_startofpacket (rsp_demux_008_src1_startofpacket),               //          .startofpacket
9668 
                .src1_endofpacket   (rsp_demux_008_src1_endofpacket)                  //          .endofpacket
9669 
        );
9670 
 
9671 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_009 (
9672 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9673 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9674 
                .sink_ready         (router_011_src_ready),                           //      sink.ready
9675 
                .sink_channel       (router_011_src_channel),                         //          .channel
9676 
                .sink_data          (router_011_src_data),                            //          .data
9677 
                .sink_startofpacket (router_011_src_startofpacket),                   //          .startofpacket
9678 
                .sink_endofpacket   (router_011_src_endofpacket),                     //          .endofpacket
9679 
                .sink_valid         (router_011_src_valid),                           //          .valid
9680 
                .src0_ready         (rsp_demux_009_src0_ready),                       //      src0.ready
9681 
                .src0_valid         (rsp_demux_009_src0_valid),                       //          .valid
9682 
                .src0_data          (rsp_demux_009_src0_data),                        //          .data
9683 
                .src0_channel       (rsp_demux_009_src0_channel),                     //          .channel
9684 
                .src0_startofpacket (rsp_demux_009_src0_startofpacket),               //          .startofpacket
9685 
                .src0_endofpacket   (rsp_demux_009_src0_endofpacket),                 //          .endofpacket
9686 
                .src1_ready         (rsp_demux_009_src1_ready),                       //      src1.ready
9687 
                .src1_valid         (rsp_demux_009_src1_valid),                       //          .valid
9688 
                .src1_data          (rsp_demux_009_src1_data),                        //          .data
9689 
                .src1_channel       (rsp_demux_009_src1_channel),                     //          .channel
9690 
                .src1_startofpacket (rsp_demux_009_src1_startofpacket),               //          .startofpacket
9691 
                .src1_endofpacket   (rsp_demux_009_src1_endofpacket)                  //          .endofpacket
9692 
        );
9693 
 
9694 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_010 (
9695 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9696 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9697 
                .sink_ready         (router_012_src_ready),                           //      sink.ready
9698 
                .sink_channel       (router_012_src_channel),                         //          .channel
9699 
                .sink_data          (router_012_src_data),                            //          .data
9700 
                .sink_startofpacket (router_012_src_startofpacket),                   //          .startofpacket
9701 
                .sink_endofpacket   (router_012_src_endofpacket),                     //          .endofpacket
9702 
                .sink_valid         (router_012_src_valid),                           //          .valid
9703 
                .src0_ready         (rsp_demux_010_src0_ready),                       //      src0.ready
9704 
                .src0_valid         (rsp_demux_010_src0_valid),                       //          .valid
9705 
                .src0_data          (rsp_demux_010_src0_data),                        //          .data
9706 
                .src0_channel       (rsp_demux_010_src0_channel),                     //          .channel
9707 
                .src0_startofpacket (rsp_demux_010_src0_startofpacket),               //          .startofpacket
9708 
                .src0_endofpacket   (rsp_demux_010_src0_endofpacket),                 //          .endofpacket
9709 
                .src1_ready         (rsp_demux_010_src1_ready),                       //      src1.ready
9710 
                .src1_valid         (rsp_demux_010_src1_valid),                       //          .valid
9711 
                .src1_data          (rsp_demux_010_src1_data),                        //          .data
9712 
                .src1_channel       (rsp_demux_010_src1_channel),                     //          .channel
9713 
                .src1_startofpacket (rsp_demux_010_src1_startofpacket),               //          .startofpacket
9714 
                .src1_endofpacket   (rsp_demux_010_src1_endofpacket)                  //          .endofpacket
9715 
        );
9716 
 
9717 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_011 (
9718 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9719 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9720 
                .sink_ready         (router_013_src_ready),                           //      sink.ready
9721 
                .sink_channel       (router_013_src_channel),                         //          .channel
9722 
                .sink_data          (router_013_src_data),                            //          .data
9723 
                .sink_startofpacket (router_013_src_startofpacket),                   //          .startofpacket
9724 
                .sink_endofpacket   (router_013_src_endofpacket),                     //          .endofpacket
9725 
                .sink_valid         (router_013_src_valid),                           //          .valid
9726 
                .src0_ready         (rsp_demux_011_src0_ready),                       //      src0.ready
9727 
                .src0_valid         (rsp_demux_011_src0_valid),                       //          .valid
9728 
                .src0_data          (rsp_demux_011_src0_data),                        //          .data
9729 
                .src0_channel       (rsp_demux_011_src0_channel),                     //          .channel
9730 
                .src0_startofpacket (rsp_demux_011_src0_startofpacket),               //          .startofpacket
9731 
                .src0_endofpacket   (rsp_demux_011_src0_endofpacket),                 //          .endofpacket
9732 
                .src1_ready         (rsp_demux_011_src1_ready),                       //      src1.ready
9733 
                .src1_valid         (rsp_demux_011_src1_valid),                       //          .valid
9734 
                .src1_data          (rsp_demux_011_src1_data),                        //          .data
9735 
                .src1_channel       (rsp_demux_011_src1_channel),                     //          .channel
9736 
                .src1_startofpacket (rsp_demux_011_src1_startofpacket),               //          .startofpacket
9737 
                .src1_endofpacket   (rsp_demux_011_src1_endofpacket)                  //          .endofpacket
9738 
        );
9739 
 
9740 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_012 (
9741 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9742 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9743 
                .sink_ready         (router_014_src_ready),                           //      sink.ready
9744 
                .sink_channel       (router_014_src_channel),                         //          .channel
9745 
                .sink_data          (router_014_src_data),                            //          .data
9746 
                .sink_startofpacket (router_014_src_startofpacket),                   //          .startofpacket
9747 
                .sink_endofpacket   (router_014_src_endofpacket),                     //          .endofpacket
9748 
                .sink_valid         (router_014_src_valid),                           //          .valid
9749 
                .src0_ready         (rsp_demux_012_src0_ready),                       //      src0.ready
9750 
                .src0_valid         (rsp_demux_012_src0_valid),                       //          .valid
9751 
                .src0_data          (rsp_demux_012_src0_data),                        //          .data
9752 
                .src0_channel       (rsp_demux_012_src0_channel),                     //          .channel
9753 
                .src0_startofpacket (rsp_demux_012_src0_startofpacket),               //          .startofpacket
9754 
                .src0_endofpacket   (rsp_demux_012_src0_endofpacket),                 //          .endofpacket
9755 
                .src1_ready         (rsp_demux_012_src1_ready),                       //      src1.ready
9756 
                .src1_valid         (rsp_demux_012_src1_valid),                       //          .valid
9757 
                .src1_data          (rsp_demux_012_src1_data),                        //          .data
9758 
                .src1_channel       (rsp_demux_012_src1_channel),                     //          .channel
9759 
                .src1_startofpacket (rsp_demux_012_src1_startofpacket),               //          .startofpacket
9760 
                .src1_endofpacket   (rsp_demux_012_src1_endofpacket)                  //          .endofpacket
9761 
        );
9762 
 
9763 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_013 (
9764 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9765 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9766 
                .sink_ready         (router_015_src_ready),                           //      sink.ready
9767 
                .sink_channel       (router_015_src_channel),                         //          .channel
9768 
                .sink_data          (router_015_src_data),                            //          .data
9769 
                .sink_startofpacket (router_015_src_startofpacket),                   //          .startofpacket
9770 
                .sink_endofpacket   (router_015_src_endofpacket),                     //          .endofpacket
9771 
                .sink_valid         (router_015_src_valid),                           //          .valid
9772 
                .src0_ready         (rsp_demux_013_src0_ready),                       //      src0.ready
9773 
                .src0_valid         (rsp_demux_013_src0_valid),                       //          .valid
9774 
                .src0_data          (rsp_demux_013_src0_data),                        //          .data
9775 
                .src0_channel       (rsp_demux_013_src0_channel),                     //          .channel
9776 
                .src0_startofpacket (rsp_demux_013_src0_startofpacket),               //          .startofpacket
9777 
                .src0_endofpacket   (rsp_demux_013_src0_endofpacket),                 //          .endofpacket
9778 
                .src1_ready         (rsp_demux_013_src1_ready),                       //      src1.ready
9779 
                .src1_valid         (rsp_demux_013_src1_valid),                       //          .valid
9780 
                .src1_data          (rsp_demux_013_src1_data),                        //          .data
9781 
                .src1_channel       (rsp_demux_013_src1_channel),                     //          .channel
9782 
                .src1_startofpacket (rsp_demux_013_src1_startofpacket),               //          .startofpacket
9783 
                .src1_endofpacket   (rsp_demux_013_src1_endofpacket)                  //          .endofpacket
9784 
        );
9785 
 
9786 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_014 (
9787 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9788 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9789 
                .sink_ready         (router_016_src_ready),                           //      sink.ready
9790 
                .sink_channel       (router_016_src_channel),                         //          .channel
9791 
                .sink_data          (router_016_src_data),                            //          .data
9792 
                .sink_startofpacket (router_016_src_startofpacket),                   //          .startofpacket
9793 
                .sink_endofpacket   (router_016_src_endofpacket),                     //          .endofpacket
9794 
                .sink_valid         (router_016_src_valid),                           //          .valid
9795 
                .src0_ready         (rsp_demux_014_src0_ready),                       //      src0.ready
9796 
                .src0_valid         (rsp_demux_014_src0_valid),                       //          .valid
9797 
                .src0_data          (rsp_demux_014_src0_data),                        //          .data
9798 
                .src0_channel       (rsp_demux_014_src0_channel),                     //          .channel
9799 
                .src0_startofpacket (rsp_demux_014_src0_startofpacket),               //          .startofpacket
9800 
                .src0_endofpacket   (rsp_demux_014_src0_endofpacket),                 //          .endofpacket
9801 
                .src1_ready         (rsp_demux_014_src1_ready),                       //      src1.ready
9802 
                .src1_valid         (rsp_demux_014_src1_valid),                       //          .valid
9803 
                .src1_data          (rsp_demux_014_src1_data),                        //          .data
9804 
                .src1_channel       (rsp_demux_014_src1_channel),                     //          .channel
9805 
                .src1_startofpacket (rsp_demux_014_src1_startofpacket),               //          .startofpacket
9806 
                .src1_endofpacket   (rsp_demux_014_src1_endofpacket)                  //          .endofpacket
9807 
        );
9808 
 
9809 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_015 (
9810 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9811 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9812 
                .sink_ready         (router_017_src_ready),                           //      sink.ready
9813 
                .sink_channel       (router_017_src_channel),                         //          .channel
9814 
                .sink_data          (router_017_src_data),                            //          .data
9815 
                .sink_startofpacket (router_017_src_startofpacket),                   //          .startofpacket
9816 
                .sink_endofpacket   (router_017_src_endofpacket),                     //          .endofpacket
9817 
                .sink_valid         (router_017_src_valid),                           //          .valid
9818 
                .src0_ready         (rsp_demux_015_src0_ready),                       //      src0.ready
9819 
                .src0_valid         (rsp_demux_015_src0_valid),                       //          .valid
9820 
                .src0_data          (rsp_demux_015_src0_data),                        //          .data
9821 
                .src0_channel       (rsp_demux_015_src0_channel),                     //          .channel
9822 
                .src0_startofpacket (rsp_demux_015_src0_startofpacket),               //          .startofpacket
9823 
                .src0_endofpacket   (rsp_demux_015_src0_endofpacket),                 //          .endofpacket
9824 
                .src1_ready         (rsp_demux_015_src1_ready),                       //      src1.ready
9825 
                .src1_valid         (rsp_demux_015_src1_valid),                       //          .valid
9826 
                .src1_data          (rsp_demux_015_src1_data),                        //          .data
9827 
                .src1_channel       (rsp_demux_015_src1_channel),                     //          .channel
9828 
                .src1_startofpacket (rsp_demux_015_src1_startofpacket),               //          .startofpacket
9829 
                .src1_endofpacket   (rsp_demux_015_src1_endofpacket)                  //          .endofpacket
9830 
        );
9831 
 
9832 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_016 (
9833 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9834 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9835 
                .sink_ready         (router_018_src_ready),                           //      sink.ready
9836 
                .sink_channel       (router_018_src_channel),                         //          .channel
9837 
                .sink_data          (router_018_src_data),                            //          .data
9838 
                .sink_startofpacket (router_018_src_startofpacket),                   //          .startofpacket
9839 
                .sink_endofpacket   (router_018_src_endofpacket),                     //          .endofpacket
9840 
                .sink_valid         (router_018_src_valid),                           //          .valid
9841 
                .src0_ready         (rsp_demux_016_src0_ready),                       //      src0.ready
9842 
                .src0_valid         (rsp_demux_016_src0_valid),                       //          .valid
9843 
                .src0_data          (rsp_demux_016_src0_data),                        //          .data
9844 
                .src0_channel       (rsp_demux_016_src0_channel),                     //          .channel
9845 
                .src0_startofpacket (rsp_demux_016_src0_startofpacket),               //          .startofpacket
9846 
                .src0_endofpacket   (rsp_demux_016_src0_endofpacket),                 //          .endofpacket
9847 
                .src1_ready         (rsp_demux_016_src1_ready),                       //      src1.ready
9848 
                .src1_valid         (rsp_demux_016_src1_valid),                       //          .valid
9849 
                .src1_data          (rsp_demux_016_src1_data),                        //          .data
9850 
                .src1_channel       (rsp_demux_016_src1_channel),                     //          .channel
9851 
                .src1_startofpacket (rsp_demux_016_src1_startofpacket),               //          .startofpacket
9852 
                .src1_endofpacket   (rsp_demux_016_src1_endofpacket)                  //          .endofpacket
9853 
        );
9854 
 
9855 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_017 (
9856 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9857 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9858 
                .sink_ready         (router_019_src_ready),                           //      sink.ready
9859 
                .sink_channel       (router_019_src_channel),                         //          .channel
9860 
                .sink_data          (router_019_src_data),                            //          .data
9861 
                .sink_startofpacket (router_019_src_startofpacket),                   //          .startofpacket
9862 
                .sink_endofpacket   (router_019_src_endofpacket),                     //          .endofpacket
9863 
                .sink_valid         (router_019_src_valid),                           //          .valid
9864 
                .src0_ready         (rsp_demux_017_src0_ready),                       //      src0.ready
9865 
                .src0_valid         (rsp_demux_017_src0_valid),                       //          .valid
9866 
                .src0_data          (rsp_demux_017_src0_data),                        //          .data
9867 
                .src0_channel       (rsp_demux_017_src0_channel),                     //          .channel
9868 
                .src0_startofpacket (rsp_demux_017_src0_startofpacket),               //          .startofpacket
9869 
                .src0_endofpacket   (rsp_demux_017_src0_endofpacket),                 //          .endofpacket
9870 
                .src1_ready         (rsp_demux_017_src1_ready),                       //      src1.ready
9871 
                .src1_valid         (rsp_demux_017_src1_valid),                       //          .valid
9872 
                .src1_data          (rsp_demux_017_src1_data),                        //          .data
9873 
                .src1_channel       (rsp_demux_017_src1_channel),                     //          .channel
9874 
                .src1_startofpacket (rsp_demux_017_src1_startofpacket),               //          .startofpacket
9875 
                .src1_endofpacket   (rsp_demux_017_src1_endofpacket)                  //          .endofpacket
9876 
        );
9877 
 
9878 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_018 (
9879 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9880 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9881 
                .sink_ready         (router_020_src_ready),                           //      sink.ready
9882 
                .sink_channel       (router_020_src_channel),                         //          .channel
9883 
                .sink_data          (router_020_src_data),                            //          .data
9884 
                .sink_startofpacket (router_020_src_startofpacket),                   //          .startofpacket
9885 
                .sink_endofpacket   (router_020_src_endofpacket),                     //          .endofpacket
9886 
                .sink_valid         (router_020_src_valid),                           //          .valid
9887 
                .src0_ready         (rsp_demux_018_src0_ready),                       //      src0.ready
9888 
                .src0_valid         (rsp_demux_018_src0_valid),                       //          .valid
9889 
                .src0_data          (rsp_demux_018_src0_data),                        //          .data
9890 
                .src0_channel       (rsp_demux_018_src0_channel),                     //          .channel
9891 
                .src0_startofpacket (rsp_demux_018_src0_startofpacket),               //          .startofpacket
9892 
                .src0_endofpacket   (rsp_demux_018_src0_endofpacket),                 //          .endofpacket
9893 
                .src1_ready         (rsp_demux_018_src1_ready),                       //      src1.ready
9894 
                .src1_valid         (rsp_demux_018_src1_valid),                       //          .valid
9895 
                .src1_data          (rsp_demux_018_src1_data),                        //          .data
9896 
                .src1_channel       (rsp_demux_018_src1_channel),                     //          .channel
9897 
                .src1_startofpacket (rsp_demux_018_src1_startofpacket),               //          .startofpacket
9898 
                .src1_endofpacket   (rsp_demux_018_src1_endofpacket)                  //          .endofpacket
9899 
        );
9900 
 
9901 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_019 (
9902 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9903 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9904 
                .sink_ready         (router_021_src_ready),                           //      sink.ready
9905 
                .sink_channel       (router_021_src_channel),                         //          .channel
9906 
                .sink_data          (router_021_src_data),                            //          .data
9907 
                .sink_startofpacket (router_021_src_startofpacket),                   //          .startofpacket
9908 
                .sink_endofpacket   (router_021_src_endofpacket),                     //          .endofpacket
9909 
                .sink_valid         (router_021_src_valid),                           //          .valid
9910 
                .src0_ready         (rsp_demux_019_src0_ready),                       //      src0.ready
9911 
                .src0_valid         (rsp_demux_019_src0_valid),                       //          .valid
9912 
                .src0_data          (rsp_demux_019_src0_data),                        //          .data
9913 
                .src0_channel       (rsp_demux_019_src0_channel),                     //          .channel
9914 
                .src0_startofpacket (rsp_demux_019_src0_startofpacket),               //          .startofpacket
9915 
                .src0_endofpacket   (rsp_demux_019_src0_endofpacket),                 //          .endofpacket
9916 
                .src1_ready         (rsp_demux_019_src1_ready),                       //      src1.ready
9917 
                .src1_valid         (rsp_demux_019_src1_valid),                       //          .valid
9918 
                .src1_data          (rsp_demux_019_src1_data),                        //          .data
9919 
                .src1_channel       (rsp_demux_019_src1_channel),                     //          .channel
9920 
                .src1_startofpacket (rsp_demux_019_src1_startofpacket),               //          .startofpacket
9921 
                .src1_endofpacket   (rsp_demux_019_src1_endofpacket)                  //          .endofpacket
9922 
        );
9923 
 
9924 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_020 (
9925 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9926 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9927 
                .sink_ready         (router_022_src_ready),                           //      sink.ready
9928 
                .sink_channel       (router_022_src_channel),                         //          .channel
9929 
                .sink_data          (router_022_src_data),                            //          .data
9930 
                .sink_startofpacket (router_022_src_startofpacket),                   //          .startofpacket
9931 
                .sink_endofpacket   (router_022_src_endofpacket),                     //          .endofpacket
9932 
                .sink_valid         (router_022_src_valid),                           //          .valid
9933 
                .src0_ready         (rsp_demux_020_src0_ready),                       //      src0.ready
9934 
                .src0_valid         (rsp_demux_020_src0_valid),                       //          .valid
9935 
                .src0_data          (rsp_demux_020_src0_data),                        //          .data
9936 
                .src0_channel       (rsp_demux_020_src0_channel),                     //          .channel
9937 
                .src0_startofpacket (rsp_demux_020_src0_startofpacket),               //          .startofpacket
9938 
                .src0_endofpacket   (rsp_demux_020_src0_endofpacket),                 //          .endofpacket
9939 
                .src1_ready         (rsp_demux_020_src1_ready),                       //      src1.ready
9940 
                .src1_valid         (rsp_demux_020_src1_valid),                       //          .valid
9941 
                .src1_data          (rsp_demux_020_src1_data),                        //          .data
9942 
                .src1_channel       (rsp_demux_020_src1_channel),                     //          .channel
9943 
                .src1_startofpacket (rsp_demux_020_src1_startofpacket),               //          .startofpacket
9944 
                .src1_endofpacket   (rsp_demux_020_src1_endofpacket)                  //          .endofpacket
9945 
        );
9946 
 
9947 
        ulight_fifo_mm_interconnect_0_rsp_demux rsp_demux_021 (
9948 
                .clk                (clk_0_clk_clk),                                  //       clk.clk
9949 
                .reset              (led_pio_test_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9950 
                .sink_ready         (router_023_src_ready),                           //      sink.ready
9951 
                .sink_channel       (router_023_src_channel),                         //          .channel
9952 
                .sink_data          (router_023_src_data),                            //          .data
9953 
                .sink_startofpacket (router_023_src_startofpacket),                   //          .startofpacket
9954 
                .sink_endofpacket   (router_023_src_endofpacket),                     //          .endofpacket
9955 
                .sink_valid         (router_023_src_valid),                           //          .valid
9956 
                .src0_ready         (rsp_demux_021_src0_ready),                       //      src0.ready
9957 
                .src0_valid         (rsp_demux_021_src0_valid),                       //          .valid
9958 
                .src0_data          (rsp_demux_021_src0_data),                        //          .data
9959 
                .src0_channel       (rsp_demux_021_src0_channel),                     //          .channel
9960 
                .src0_startofpacket (rsp_demux_021_src0_startofpacket),               //          .startofpacket
9961 
                .src0_endofpacket   (rsp_demux_021_src0_endofpacket),                 //          .endofpacket
9962 
                .src1_ready         (rsp_demux_021_src1_ready),                       //      src1.ready
9963 
                .src1_valid         (rsp_demux_021_src1_valid),                       //          .valid
9964 
                .src1_data          (rsp_demux_021_src1_data),                        //          .data
9965 
                .src1_channel       (rsp_demux_021_src1_channel),                     //          .channel
9966 
                .src1_startofpacket (rsp_demux_021_src1_startofpacket),               //          .startofpacket
9967 
                .src1_endofpacket   (rsp_demux_021_src1_endofpacket)                  //          .endofpacket
9968 
        );
9969 
 
9970 
        ulight_fifo_mm_interconnect_0_rsp_mux rsp_mux (
9971 
                .clk                  (clk_0_clk_clk),                                                    //       clk.clk
9972 
                .reset                (hps_0_h2f_axi_master_agent_clk_reset_reset_bridge_in_reset_reset), // clk_reset.reset
9973 
                .src_ready            (rsp_mux_src_ready),                                                //       src.ready
9974 
                .src_valid            (rsp_mux_src_valid),                                                //          .valid
9975 
                .src_data             (rsp_mux_src_data),                                                 //          .data
9976 
                .src_channel          (rsp_mux_src_channel),                                              //          .channel
9977 
                .src_startofpacket    (rsp_mux_src_startofpacket),                                        //          .startofpacket
9978 
                .src_endofpacket      (rsp_mux_src_endofpacket),                                          //          .endofpacket
9979 
                .sink0_ready          (rsp_demux_src0_ready),                                             //     sink0.ready
9980 
                .sink0_valid          (rsp_demux_src0_valid),                                             //          .valid
9981 
                .sink0_channel        (rsp_demux_src0_channel),                                           //          .channel
9982 
                .sink0_data           (rsp_demux_src0_data),                                              //          .data
9983 
                .sink0_startofpacket  (rsp_demux_src0_startofpacket),                                     //          .startofpacket
9984 
                .sink0_endofpacket    (rsp_demux_src0_endofpacket),                                       //          .endofpacket
9985 
                .sink1_ready          (rsp_demux_001_src0_ready),                                         //     sink1.ready
9986 
                .sink1_valid          (rsp_demux_001_src0_valid),                                         //          .valid
9987 
                .sink1_channel        (rsp_demux_001_src0_channel),                                       //          .channel
9988 
                .sink1_data           (rsp_demux_001_src0_data),                                          //          .data
9989 
                .sink1_startofpacket  (rsp_demux_001_src0_startofpacket),                                 //          .startofpacket
9990 
                .sink1_endofpacket    (rsp_demux_001_src0_endofpacket),                                   //          .endofpacket
9991 
                .sink2_ready          (rsp_demux_002_src0_ready),                                         //     sink2.ready
9992 
                .sink2_valid          (rsp_demux_002_src0_valid),                                         //          .valid
9993 
                .sink2_channel        (rsp_demux_002_src0_channel),                                       //          .channel
9994 
                .sink2_data           (rsp_demux_002_src0_data),                                          //          .data
9995 
                .sink2_startofpacket  (rsp_demux_002_src0_startofpacket),                                 //          .startofpacket
9996 
                .sink2_endofpacket    (rsp_demux_002_src0_endofpacket),                                   //          .endofpacket
9997 
                .sink3_ready          (rsp_demux_003_src0_ready),                                         //     sink3.ready
9998 
                .sink3_valid          (rsp_demux_003_src0_valid),                                         //          .valid
9999 
                .sink3_channel        (rsp_demux_003_src0_channel),                                       //          .channel
10000 
                .sink3_data           (rsp_demux_003_src0_data),                                          //          .data
10001 
                .sink3_startofpacket  (rsp_demux_003_src0_startofpacket),                                 //          .startofpacket
10002 
                .sink3_endofpacket    (rsp_demux_003_src0_endofpacket),                                   //          .endofpacket
10003 
                .sink4_ready          (rsp_demux_004_src0_ready),                                         //     sink4.ready
10004 
                .sink4_valid          (rsp_demux_004_src0_valid),                                         //          .valid
10005 
                .sink4_channel        (rsp_demux_004_src0_channel),                                       //          .channel
10006 
                .sink4_data           (rsp_demux_004_src0_data),                                          //          .data
10007 
                .sink4_startofpacket  (rsp_demux_004_src0_startofpacket),                                 //          .startofpacket
10008 
                .sink4_endofpacket    (rsp_demux_004_src0_endofpacket),                                   //          .endofpacket
10009 
                .sink5_ready          (rsp_demux_005_src0_ready),                                         //     sink5.ready
10010 
                .sink5_valid          (rsp_demux_005_src0_valid),                                         //          .valid
10011 
                .sink5_channel        (rsp_demux_005_src0_channel),                                       //          .channel
10012 
                .sink5_data           (rsp_demux_005_src0_data),                                          //          .data
10013 
                .sink5_startofpacket  (rsp_demux_005_src0_startofpacket),                                 //          .startofpacket
10014 
                .sink5_endofpacket    (rsp_demux_005_src0_endofpacket),                                   //          .endofpacket
10015 
                .sink6_ready          (rsp_demux_006_src0_ready),                                         //     sink6.ready
10016 
                .sink6_valid          (rsp_demux_006_src0_valid),                                         //          .valid
10017 
                .sink6_channel        (rsp_demux_006_src0_channel),                                       //          .channel
10018 
                .sink6_data           (rsp_demux_006_src0_data),                                          //          .data
10019 
                .sink6_startofpacket  (rsp_demux_006_src0_startofpacket),                                 //          .startofpacket
10020 
                .sink6_endofpacket    (rsp_demux_006_src0_endofpacket),                                   //          .endofpacket
10021 
                .sink7_ready          (rsp_demux_007_src0_ready),                                         //     sink7.ready
10022 
                .sink7_valid          (rsp_demux_007_src0_valid),                                         //          .valid
10023 
                .sink7_channel        (rsp_demux_007_src0_channel),                                       //          .channel
10024 
                .sink7_data           (rsp_demux_007_src0_data),                                          //          .data
10025 
                .sink7_startofpacket  (rsp_demux_007_src0_startofpacket),                                 //          .startofpacket
10026 
                .sink7_endofpacket    (rsp_demux_007_src0_endofpacket),                                   //          .endofpacket
10027 
                .sink8_ready          (rsp_demux_008_src0_ready),                                         //     sink8.ready
10028 
                .sink8_valid          (rsp_demux_008_src0_valid),                                         //          .valid
10029 
                .sink8_channel        (rsp_demux_008_src0_channel),                                       //          .channel
10030 
                .sink8_data           (rsp_demux_008_src0_data),                                          //          .data
10031 
                .sink8_startofpacket  (rsp_demux_008_src0_startofpacket),                                 //          .startofpacket
10032 
                .sink8_endofpacket    (rsp_demux_008_src0_endofpacket),                                   //          .endofpacket
10033 
                .sink9_ready          (rsp_demux_009_src0_ready),                                         //     sink9.ready
10034 
                .sink9_valid          (rsp_demux_009_src0_valid),                                         //          .valid
10035 
                .sink9_channel        (rsp_demux_009_src0_channel),                                       //          .channel
10036 
                .sink9_data           (rsp_demux_009_src0_data),                                          //          .data
10037 
                .sink9_startofpacket  (rsp_demux_009_src0_startofpacket),                                 //          .startofpacket
10038 
                .sink9_endofpacket    (rsp_demux_009_src0_endofpacket),                                   //          .endofpacket
10039 
                .sink10_ready         (rsp_demux_010_src0_ready),                                         //    sink10.ready
10040 
                .sink10_valid         (rsp_demux_010_src0_valid),                                         //          .valid
10041 
                .sink10_channel       (rsp_demux_010_src0_channel),                                       //          .channel
10042 
                .sink10_data          (rsp_demux_010_src0_data),                                          //          .data
10043 
                .sink10_startofpacket (rsp_demux_010_src0_startofpacket),                                 //          .startofpacket
10044 
                .sink10_endofpacket   (rsp_demux_010_src0_endofpacket),                                   //          .endofpacket
10045 
                .sink11_ready         (rsp_demux_011_src0_ready),                                         //    sink11.ready
10046 
                .sink11_valid         (rsp_demux_011_src0_valid),                                         //          .valid
10047 
                .sink11_channel       (rsp_demux_011_src0_channel),                                       //          .channel
10048 
                .sink11_data          (rsp_demux_011_src0_data),                                          //          .data
10049 
                .sink11_startofpacket (rsp_demux_011_src0_startofpacket),                                 //          .startofpacket
10050 
                .sink11_endofpacket   (rsp_demux_011_src0_endofpacket),                                   //          .endofpacket
10051 
                .sink12_ready         (rsp_demux_012_src0_ready),                                         //    sink12.ready
10052 
                .sink12_valid         (rsp_demux_012_src0_valid),                                         //          .valid
10053 
                .sink12_channel       (rsp_demux_012_src0_channel),                                       //          .channel
10054 
                .sink12_data          (rsp_demux_012_src0_data),                                          //          .data
10055 
                .sink12_startofpacket (rsp_demux_012_src0_startofpacket),                                 //          .startofpacket
10056 
                .sink12_endofpacket   (rsp_demux_012_src0_endofpacket),                                   //          .endofpacket
10057 
                .sink13_ready         (rsp_demux_013_src0_ready),                                         //    sink13.ready
10058 
                .sink13_valid         (rsp_demux_013_src0_valid),                                         //          .valid
10059 
                .sink13_channel       (rsp_demux_013_src0_channel),                                       //          .channel
10060 
                .sink13_data          (rsp_demux_013_src0_data),                                          //          .data
10061 
                .sink13_startofpacket (rsp_demux_013_src0_startofpacket),                                 //          .startofpacket
10062 
                .sink13_endofpacket   (rsp_demux_013_src0_endofpacket),                                   //          .endofpacket
10063 
                .sink14_ready         (rsp_demux_014_src0_ready),                                         //    sink14.ready
10064 
                .sink14_valid         (rsp_demux_014_src0_valid),                                         //          .valid
10065 
                .sink14_channel       (rsp_demux_014_src0_channel),                                       //          .channel
10066 
                .sink14_data          (rsp_demux_014_src0_data),                                          //          .data
10067 
                .sink14_startofpacket (rsp_demux_014_src0_startofpacket),                                 //          .startofpacket
10068 
                .sink14_endofpacket   (rsp_demux_014_src0_endofpacket),                                   //          .endofpacket
10069 
                .sink15_ready         (rsp_demux_015_src0_ready),                                         //    sink15.ready
10070 
                .sink15_valid         (rsp_demux_015_src0_valid),                                         //          .valid
10071 
                .sink15_channel       (rsp_demux_015_src0_channel),                                       //          .channel
10072 
                .sink15_data          (rsp_demux_015_src0_data),                                          //          .data
10073 
                .sink15_startofpacket (rsp_demux_015_src0_startofpacket),                                 //          .startofpacket
10074 
                .sink15_endofpacket   (rsp_demux_015_src0_endofpacket),                                   //          .endofpacket
10075 
                .sink16_ready         (rsp_demux_016_src0_ready),                                         //    sink16.ready
10076 
                .sink16_valid         (rsp_demux_016_src0_valid),                                         //          .valid
10077 
                .sink16_channel       (rsp_demux_016_src0_channel),                                       //          .channel
10078 
                .sink16_data          (rsp_demux_016_src0_data),                                          //          .data
10079 
                .sink16_startofpacket (rsp_demux_016_src0_startofpacket),                                 //          .startofpacket
10080 
                .sink16_endofpacket   (rsp_demux_016_src0_endofpacket),                                   //          .endofpacket
10081 
                .sink17_ready         (rsp_demux_017_src0_ready),                                         //    sink17.ready
10082 
                .sink17_valid         (rsp_demux_017_src0_valid),                                         //          .valid
10083 
                .sink17_channel       (rsp_demux_017_src0_channel),                                       //          .channel
10084 
                .sink17_data          (rsp_demux_017_src0_data),                                          //          .data
10085 
                .sink17_startofpacket (rsp_demux_017_src0_startofpacket),                                 //          .startofpacket
10086 
                .sink17_endofpacket   (rsp_demux_017_src0_endofpacket),                                   //          .endofpacket
10087 
                .sink18_ready         (rsp_demux_018_src0_ready),                                         //    sink18.ready
10088 
                .sink18_valid         (rsp_demux_018_src0_valid),                                         //          .valid
10089 
                .sink18_channel       (rsp_demux_018_src0_channel),                                       //          .channel
10090 
                .sink18_data          (rsp_demux_018_src0_data),                                          //          .data
10091 
                .sink18_startofpacket (rsp_demux_018_src0_startofpacket),                                 //          .startofpacket
10092 
                .sink18_endofpacket   (rsp_demux_018_src0_endofpacket),                                   //          .endofpacket
10093 
                .sink19_ready         (rsp_demux_019_src0_ready),                                         //    sink19.ready
10094 
                .sink19_valid         (rsp_demux_019_src0_valid),                                         //          .valid
10095 
                .sink19_channel       (rsp_demux_019_src0_channel),                                       //          .channel
10096 
                .sink19_data          (rsp_demux_019_src0_data),                                          //          .data
10097 
                .sink19_startofpacket (rsp_demux_019_src0_startofpacket),                                 //          .startofpacket
10098 
                .sink19_endofpacket   (rsp_demux_019_src0_endofpacket),                                   //          .endofpacket
10099 
                .sink20_ready         (rsp_demux_020_src0_ready),                                         //    sink20.ready
10100 
                .sink20_valid         (rsp_demux_020_src0_valid),                                         //          .valid
10101 
                .sink20_channel       (rsp_demux_020_src0_channel),                                       //          .channel
10102 
                .sink20_data          (rsp_demux_020_src0_data),                                          //          .data
10103 
                .sink20_startofpacket (rsp_demux_020_src0_startofpacket),                                 //          .startofpacket
10104 
                .sink20_endofpacket   (rsp_demux_020_src0_endofpacket),                                   //          .endofpacket
10105 
                .sink21_ready         (rsp_demux_021_src0_ready),                                         //    sink21.ready
10106 
                .sink21_valid         (rsp_demux_021_src0_valid),                                         //          .valid
10107 
                .sink21_channel       (rsp_demux_021_src0_channel),                                       //          .channel
10108 
                .sink21_data          (rsp_demux_021_src0_data),                                          //          .data
10109 
                .sink21_startofpacket (rsp_demux_021_src0_startofpacket),                                 //          .startofpacket
10110 
                .sink21_endofpacket   (rsp_demux_021_src0_endofpacket)                                    //          .endofpacket
10111 
        );
10112 
 
10113 
        ulight_fifo_mm_interconnect_0_rsp_mux rsp_mux_001 (
10114 
                .clk                  (clk_0_clk_clk),                                                    //       clk.clk
10115 
                .reset                (hps_0_h2f_axi_master_agent_clk_reset_reset_bridge_in_reset_reset), // clk_reset.reset
10116 
                .src_ready            (rsp_mux_001_src_ready),                                            //       src.ready
10117 
                .src_valid            (rsp_mux_001_src_valid),                                            //          .valid
10118 
                .src_data             (rsp_mux_001_src_data),                                             //          .data
10119 
                .src_channel          (rsp_mux_001_src_channel),                                          //          .channel
10120 
                .src_startofpacket    (rsp_mux_001_src_startofpacket),                                    //          .startofpacket
10121 
                .src_endofpacket      (rsp_mux_001_src_endofpacket),                                      //          .endofpacket
10122 
                .sink0_ready          (rsp_demux_src1_ready),                                             //     sink0.ready
10123 
                .sink0_valid          (rsp_demux_src1_valid),                                             //          .valid
10124 
                .sink0_channel        (rsp_demux_src1_channel),                                           //          .channel
10125 
                .sink0_data           (rsp_demux_src1_data),                                              //          .data
10126 
                .sink0_startofpacket  (rsp_demux_src1_startofpacket),                                     //          .startofpacket
10127 
                .sink0_endofpacket    (rsp_demux_src1_endofpacket),                                       //          .endofpacket
10128 
                .sink1_ready          (rsp_demux_001_src1_ready),                                         //     sink1.ready
10129 
                .sink1_valid          (rsp_demux_001_src1_valid),                                         //          .valid
10130 
                .sink1_channel        (rsp_demux_001_src1_channel),                                       //          .channel
10131 
                .sink1_data           (rsp_demux_001_src1_data),                                          //          .data
10132 
                .sink1_startofpacket  (rsp_demux_001_src1_startofpacket),                                 //          .startofpacket
10133 
                .sink1_endofpacket    (rsp_demux_001_src1_endofpacket),                                   //          .endofpacket
10134 
                .sink2_ready          (rsp_demux_002_src1_ready),                                         //     sink2.ready
10135 
                .sink2_valid          (rsp_demux_002_src1_valid),                                         //          .valid
10136 
                .sink2_channel        (rsp_demux_002_src1_channel),                                       //          .channel
10137 
                .sink2_data           (rsp_demux_002_src1_data),                                          //          .data
10138 
                .sink2_startofpacket  (rsp_demux_002_src1_startofpacket),                                 //          .startofpacket
10139 
                .sink2_endofpacket    (rsp_demux_002_src1_endofpacket),                                   //          .endofpacket
10140 
                .sink3_ready          (rsp_demux_003_src1_ready),                                         //     sink3.ready
10141 
                .sink3_valid          (rsp_demux_003_src1_valid),                                         //          .valid
10142 
                .sink3_channel        (rsp_demux_003_src1_channel),                                       //          .channel
10143 
                .sink3_data           (rsp_demux_003_src1_data),                                          //          .data
10144 
                .sink3_startofpacket  (rsp_demux_003_src1_startofpacket),                                 //          .startofpacket
10145 
                .sink3_endofpacket    (rsp_demux_003_src1_endofpacket),                                   //          .endofpacket
10146 
                .sink4_ready          (rsp_demux_004_src1_ready),                                         //     sink4.ready
10147 
                .sink4_valid          (rsp_demux_004_src1_valid),                                         //          .valid
10148 
                .sink4_channel        (rsp_demux_004_src1_channel),                                       //          .channel
10149 
                .sink4_data           (rsp_demux_004_src1_data),                                          //          .data
10150 
                .sink4_startofpacket  (rsp_demux_004_src1_startofpacket),                                 //          .startofpacket
10151 
                .sink4_endofpacket    (rsp_demux_004_src1_endofpacket),                                   //          .endofpacket
10152 
                .sink5_ready          (rsp_demux_005_src1_ready),                                         //     sink5.ready
10153 
                .sink5_valid          (rsp_demux_005_src1_valid),                                         //          .valid
10154 
                .sink5_channel        (rsp_demux_005_src1_channel),                                       //          .channel
10155 
                .sink5_data           (rsp_demux_005_src1_data),                                          //          .data
10156 
                .sink5_startofpacket  (rsp_demux_005_src1_startofpacket),                                 //          .startofpacket
10157 
                .sink5_endofpacket    (rsp_demux_005_src1_endofpacket),                                   //          .endofpacket
10158 
                .sink6_ready          (rsp_demux_006_src1_ready),                                         //     sink6.ready
10159 
                .sink6_valid          (rsp_demux_006_src1_valid),                                         //          .valid
10160 
                .sink6_channel        (rsp_demux_006_src1_channel),                                       //          .channel
10161 
                .sink6_data           (rsp_demux_006_src1_data),                                          //          .data
10162 
                .sink6_startofpacket  (rsp_demux_006_src1_startofpacket),                                 //          .startofpacket
10163 
                .sink6_endofpacket    (rsp_demux_006_src1_endofpacket),                                   //          .endofpacket
10164 
                .sink7_ready          (rsp_demux_007_src1_ready),                                         //     sink7.ready
10165 
                .sink7_valid          (rsp_demux_007_src1_valid),                                         //          .valid
10166 
                .sink7_channel        (rsp_demux_007_src1_channel),                                       //          .channel
10167 
                .sink7_data           (rsp_demux_007_src1_data),                                          //          .data
10168 
                .sink7_startofpacket  (rsp_demux_007_src1_startofpacket),                                 //          .startofpacket
10169 
                .sink7_endofpacket    (rsp_demux_007_src1_endofpacket),                                   //          .endofpacket
10170 
                .sink8_ready          (rsp_demux_008_src1_ready),                                         //     sink8.ready
10171 
                .sink8_valid          (rsp_demux_008_src1_valid),                                         //          .valid
10172 
                .sink8_channel        (rsp_demux_008_src1_channel),                                       //          .channel
10173 
                .sink8_data           (rsp_demux_008_src1_data),                                          //          .data
10174 
                .sink8_startofpacket  (rsp_demux_008_src1_startofpacket),                                 //          .startofpacket
10175 
                .sink8_endofpacket    (rsp_demux_008_src1_endofpacket),                                   //          .endofpacket
10176 
                .sink9_ready          (rsp_demux_009_src1_ready),                                         //     sink9.ready
10177 
                .sink9_valid          (rsp_demux_009_src1_valid),                                         //          .valid
10178 
                .sink9_channel        (rsp_demux_009_src1_channel),                                       //          .channel
10179 
                .sink9_data           (rsp_demux_009_src1_data),                                          //          .data
10180 
                .sink9_startofpacket  (rsp_demux_009_src1_startofpacket),                                 //          .startofpacket
10181 
                .sink9_endofpacket    (rsp_demux_009_src1_endofpacket),                                   //          .endofpacket
10182 
                .sink10_ready         (rsp_demux_010_src1_ready),                                         //    sink10.ready
10183 
                .sink10_valid         (rsp_demux_010_src1_valid),                                         //          .valid
10184 
                .sink10_channel       (rsp_demux_010_src1_channel),                                       //          .channel
10185 
                .sink10_data          (rsp_demux_010_src1_data),                                          //          .data
10186 
                .sink10_startofpacket (rsp_demux_010_src1_startofpacket),                                 //          .startofpacket
10187 
                .sink10_endofpacket   (rsp_demux_010_src1_endofpacket),                                   //          .endofpacket
10188 
                .sink11_ready         (rsp_demux_011_src1_ready),                                         //    sink11.ready
10189 
                .sink11_valid         (rsp_demux_011_src1_valid),                                         //          .valid
10190 
                .sink11_channel       (rsp_demux_011_src1_channel),                                       //          .channel
10191 
                .sink11_data          (rsp_demux_011_src1_data),                                          //          .data
10192 
                .sink11_startofpacket (rsp_demux_011_src1_startofpacket),                                 //          .startofpacket
10193 
                .sink11_endofpacket   (rsp_demux_011_src1_endofpacket),                                   //          .endofpacket
10194 
                .sink12_ready         (rsp_demux_012_src1_ready),                                         //    sink12.ready
10195 
                .sink12_valid         (rsp_demux_012_src1_valid),                                         //          .valid
10196 
                .sink12_channel       (rsp_demux_012_src1_channel),                                       //          .channel
10197 
                .sink12_data          (rsp_demux_012_src1_data),                                          //          .data
10198 
                .sink12_startofpacket (rsp_demux_012_src1_startofpacket),                                 //          .startofpacket
10199 
                .sink12_endofpacket   (rsp_demux_012_src1_endofpacket),                                   //          .endofpacket
10200 
                .sink13_ready         (rsp_demux_013_src1_ready),                                         //    sink13.ready
10201 
                .sink13_valid         (rsp_demux_013_src1_valid),                                         //          .valid
10202 
                .sink13_channel       (rsp_demux_013_src1_channel),                                       //          .channel
10203 
                .sink13_data          (rsp_demux_013_src1_data),                                          //          .data
10204 
                .sink13_startofpacket (rsp_demux_013_src1_startofpacket),                                 //          .startofpacket
10205 
                .sink13_endofpacket   (rsp_demux_013_src1_endofpacket),                                   //          .endofpacket
10206 
                .sink14_ready         (rsp_demux_014_src1_ready),                                         //    sink14.ready
10207 
                .sink14_valid         (rsp_demux_014_src1_valid),                                         //          .valid
10208 
                .sink14_channel       (rsp_demux_014_src1_channel),                                       //          .channel
10209 
                .sink14_data          (rsp_demux_014_src1_data),                                          //          .data
10210 
                .sink14_startofpacket (rsp_demux_014_src1_startofpacket),                                 //          .startofpacket
10211 
                .sink14_endofpacket   (rsp_demux_014_src1_endofpacket),                                   //          .endofpacket
10212 
                .sink15_ready         (rsp_demux_015_src1_ready),                                         //    sink15.ready
10213 
                .sink15_valid         (rsp_demux_015_src1_valid),                                         //          .valid
10214 
                .sink15_channel       (rsp_demux_015_src1_channel),                                       //          .channel
10215 
                .sink15_data          (rsp_demux_015_src1_data),                                          //          .data
10216 
                .sink15_startofpacket (rsp_demux_015_src1_startofpacket),                                 //          .startofpacket
10217 
                .sink15_endofpacket   (rsp_demux_015_src1_endofpacket),                                   //          .endofpacket
10218 
                .sink16_ready         (rsp_demux_016_src1_ready),                                         //    sink16.ready
10219 
                .sink16_valid         (rsp_demux_016_src1_valid),                                         //          .valid
10220 
                .sink16_channel       (rsp_demux_016_src1_channel),                                       //          .channel
10221 
                .sink16_data          (rsp_demux_016_src1_data),                                          //          .data
10222 
                .sink16_startofpacket (rsp_demux_016_src1_startofpacket),                                 //          .startofpacket
10223 
                .sink16_endofpacket   (rsp_demux_016_src1_endofpacket),                                   //          .endofpacket
10224 
                .sink17_ready         (rsp_demux_017_src1_ready),                                         //    sink17.ready
10225 
                .sink17_valid         (rsp_demux_017_src1_valid),                                         //          .valid
10226 
                .sink17_channel       (rsp_demux_017_src1_channel),                                       //          .channel
10227 
                .sink17_data          (rsp_demux_017_src1_data),                                          //          .data
10228 
                .sink17_startofpacket (rsp_demux_017_src1_startofpacket),                                 //          .startofpacket
10229 
                .sink17_endofpacket   (rsp_demux_017_src1_endofpacket),                                   //          .endofpacket
10230 
                .sink18_ready         (rsp_demux_018_src1_ready),                                         //    sink18.ready
10231 
                .sink18_valid         (rsp_demux_018_src1_valid),                                         //          .valid
10232 
                .sink18_channel       (rsp_demux_018_src1_channel),                                       //          .channel
10233 
                .sink18_data          (rsp_demux_018_src1_data),                                          //          .data
10234 
                .sink18_startofpacket (rsp_demux_018_src1_startofpacket),                                 //          .startofpacket
10235 
                .sink18_endofpacket   (rsp_demux_018_src1_endofpacket),                                   //          .endofpacket
10236 
                .sink19_ready         (rsp_demux_019_src1_ready),                                         //    sink19.ready
10237 
                .sink19_valid         (rsp_demux_019_src1_valid),                                         //          .valid
10238 
                .sink19_channel       (rsp_demux_019_src1_channel),                                       //          .channel
10239 
                .sink19_data          (rsp_demux_019_src1_data),                                          //          .data
10240 
                .sink19_startofpacket (rsp_demux_019_src1_startofpacket),                                 //          .startofpacket
10241 
                .sink19_endofpacket   (rsp_demux_019_src1_endofpacket),                                   //          .endofpacket
10242 
                .sink20_ready         (rsp_demux_020_src1_ready),                                         //    sink20.ready
10243 
                .sink20_valid         (rsp_demux_020_src1_valid),                                         //          .valid
10244 
                .sink20_channel       (rsp_demux_020_src1_channel),                                       //          .channel
10245 
                .sink20_data          (rsp_demux_020_src1_data),                                          //          .data
10246 
                .sink20_startofpacket (rsp_demux_020_src1_startofpacket),                                 //          .startofpacket
10247 
                .sink20_endofpacket   (rsp_demux_020_src1_endofpacket),                                   //          .endofpacket
10248 
                .sink21_ready         (rsp_demux_021_src1_ready),                                         //    sink21.ready
10249 
                .sink21_valid         (rsp_demux_021_src1_valid),                                         //          .valid
10250 
                .sink21_channel       (rsp_demux_021_src1_channel),                                       //          .channel
10251 
                .sink21_data          (rsp_demux_021_src1_data),                                          //          .data
10252 
                .sink21_startofpacket (rsp_demux_021_src1_startofpacket),                                 //          .startofpacket
10253 
                .sink21_endofpacket   (rsp_demux_021_src1_endofpacket)                                    //          .endofpacket
10254 
        );
10255 
 
10256 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10257 
                .inBitsPerSymbol (34),
10258 
                .inUsePackets    (0),
10259 
                .inDataWidth     (34),
10260 
                .inChannelWidth  (0),
10261 
                .inErrorWidth    (0),
10262 
                .inUseEmptyPort  (0),
10263 
                .inUseValid      (1),
10264 
                .inUseReady      (1),
10265 
                .inReadyLatency  (0),
10266 
                .outDataWidth    (34),
10267 
                .outChannelWidth (0),
10268 
                .outErrorWidth   (1),
10269 
                .outUseEmptyPort (0),
10270 
                .outUseValid     (1),
10271 
                .outUseReady     (1),
10272 
                .outReadyLatency (0)
10273 
        ) avalon_st_adapter (
10274 
                .in_clk_0_clk   (clk_0_clk_clk),                                  // in_clk_0.clk
10275 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
10276 
                .in_0_data      (led_pio_test_s1_agent_rdata_fifo_out_data),      //     in_0.data
10277 
                .in_0_valid     (led_pio_test_s1_agent_rdata_fifo_out_valid),     //         .valid
10278 
                .in_0_ready     (led_pio_test_s1_agent_rdata_fifo_out_ready),     //         .ready
10279 
                .out_0_data     (avalon_st_adapter_out_0_data),                   //    out_0.data
10280 
                .out_0_valid    (avalon_st_adapter_out_0_valid),                  //         .valid
10281 
                .out_0_ready    (avalon_st_adapter_out_0_ready),                  //         .ready
10282 
                .out_0_error    (avalon_st_adapter_out_0_error)                   //         .error
10283 
        );
10284 
 
10285 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10286 
                .inBitsPerSymbol (34),
10287 
                .inUsePackets    (0),
10288 
                .inDataWidth     (34),
10289 
                .inChannelWidth  (0),
10290 
                .inErrorWidth    (0),
10291 
                .inUseEmptyPort  (0),
10292 
                .inUseValid      (1),
10293 
                .inUseReady      (1),
10294 
                .inReadyLatency  (0),
10295 
                .outDataWidth    (34),
10296 
                .outChannelWidth (0),
10297 
                .outErrorWidth   (1),
10298 
                .outUseEmptyPort (0),
10299 
                .outUseValid     (1),
10300 
                .outUseReady     (1),
10301 
                .outReadyLatency (0)
10302 
        ) avalon_st_adapter_001 (
10303 
                .in_clk_0_clk   (clk_0_clk_clk),                                  // in_clk_0.clk
10304 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
10305 
                .in_0_data      (timecode_rx_s1_agent_rdata_fifo_out_data),       //     in_0.data
10306 
                .in_0_valid     (timecode_rx_s1_agent_rdata_fifo_out_valid),      //         .valid
10307 
                .in_0_ready     (timecode_rx_s1_agent_rdata_fifo_out_ready),      //         .ready
10308 
                .out_0_data     (avalon_st_adapter_001_out_0_data),               //    out_0.data
10309 
                .out_0_valid    (avalon_st_adapter_001_out_0_valid),              //         .valid
10310 
                .out_0_ready    (avalon_st_adapter_001_out_0_ready),              //         .ready
10311 
                .out_0_error    (avalon_st_adapter_001_out_0_error)               //         .error
10312 
        );
10313 
 
10314 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10315 
                .inBitsPerSymbol (34),
10316 
                .inUsePackets    (0),
10317 
                .inDataWidth     (34),
10318 
                .inChannelWidth  (0),
10319 
                .inErrorWidth    (0),
10320 
                .inUseEmptyPort  (0),
10321 
                .inUseValid      (1),
10322 
                .inUseReady      (1),
10323 
                .inReadyLatency  (0),
10324 
                .outDataWidth    (34),
10325 
                .outChannelWidth (0),
10326 
                .outErrorWidth   (1),
10327 
                .outUseEmptyPort (0),
10328 
                .outUseValid     (1),
10329 
                .outUseReady     (1),
10330 
                .outReadyLatency (0)
10331 
        ) avalon_st_adapter_002 (
10332 
                .in_clk_0_clk   (clk_0_clk_clk),                                   // in_clk_0.clk
10333 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset),  // in_rst_0.reset
10334 
                .in_0_data      (timecode_ready_rx_s1_agent_rdata_fifo_out_data),  //     in_0.data
10335 
                .in_0_valid     (timecode_ready_rx_s1_agent_rdata_fifo_out_valid), //         .valid
10336 
                .in_0_ready     (timecode_ready_rx_s1_agent_rdata_fifo_out_ready), //         .ready
10337 
                .out_0_data     (avalon_st_adapter_002_out_0_data),                //    out_0.data
10338 
                .out_0_valid    (avalon_st_adapter_002_out_0_valid),               //         .valid
10339 
                .out_0_ready    (avalon_st_adapter_002_out_0_ready),               //         .ready
10340 
                .out_0_error    (avalon_st_adapter_002_out_0_error)                //         .error
10341 
        );
10342 
 
10343 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10344 
                .inBitsPerSymbol (34),
10345 
                .inUsePackets    (0),
10346 
                .inDataWidth     (34),
10347 
                .inChannelWidth  (0),
10348 
                .inErrorWidth    (0),
10349 
                .inUseEmptyPort  (0),
10350 
                .inUseValid      (1),
10351 
                .inUseReady      (1),
10352 
                .inReadyLatency  (0),
10353 
                .outDataWidth    (34),
10354 
                .outChannelWidth (0),
10355 
                .outErrorWidth   (1),
10356 
                .outUseEmptyPort (0),
10357 
                .outUseValid     (1),
10358 
                .outUseReady     (1),
10359 
                .outReadyLatency (0)
10360 
        ) avalon_st_adapter_003 (
10361 
                .in_clk_0_clk   (clk_0_clk_clk),                                  // in_clk_0.clk
10362 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
10363 
                .in_0_data      (data_flag_rx_s1_agent_rdata_fifo_out_data),      //     in_0.data
10364 
                .in_0_valid     (data_flag_rx_s1_agent_rdata_fifo_out_valid),     //         .valid
10365 
                .in_0_ready     (data_flag_rx_s1_agent_rdata_fifo_out_ready),     //         .ready
10366 
                .out_0_data     (avalon_st_adapter_003_out_0_data),               //    out_0.data
10367 
                .out_0_valid    (avalon_st_adapter_003_out_0_valid),              //         .valid
10368 
                .out_0_ready    (avalon_st_adapter_003_out_0_ready),              //         .ready
10369 
                .out_0_error    (avalon_st_adapter_003_out_0_error)               //         .error
10370 
        );
10371 
 
10372 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10373 
                .inBitsPerSymbol (34),
10374 
                .inUsePackets    (0),
10375 
                .inDataWidth     (34),
10376 
                .inChannelWidth  (0),
10377 
                .inErrorWidth    (0),
10378 
                .inUseEmptyPort  (0),
10379 
                .inUseValid      (1),
10380 
                .inUseReady      (1),
10381 
                .inReadyLatency  (0),
10382 
                .outDataWidth    (34),
10383 
                .outChannelWidth (0),
10384 
                .outErrorWidth   (1),
10385 
                .outUseEmptyPort (0),
10386 
                .outUseValid     (1),
10387 
                .outUseReady     (1),
10388 
                .outReadyLatency (0)
10389 
        ) avalon_st_adapter_004 (
10390 
                .in_clk_0_clk   (clk_0_clk_clk),                                  // in_clk_0.clk
10391 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
10392 
                .in_0_data      (data_read_en_rx_s1_agent_rdata_fifo_out_data),   //     in_0.data
10393 
                .in_0_valid     (data_read_en_rx_s1_agent_rdata_fifo_out_valid),  //         .valid
10394 
                .in_0_ready     (data_read_en_rx_s1_agent_rdata_fifo_out_ready),  //         .ready
10395 
                .out_0_data     (avalon_st_adapter_004_out_0_data),               //    out_0.data
10396 
                .out_0_valid    (avalon_st_adapter_004_out_0_valid),              //         .valid
10397 
                .out_0_ready    (avalon_st_adapter_004_out_0_ready),              //         .ready
10398 
                .out_0_error    (avalon_st_adapter_004_out_0_error)               //         .error
10399 
        );
10400 
 
10401 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10402 
                .inBitsPerSymbol (34),
10403 
                .inUsePackets    (0),
10404 
                .inDataWidth     (34),
10405 
                .inChannelWidth  (0),
10406 
                .inErrorWidth    (0),
10407 
                .inUseEmptyPort  (0),
10408 
                .inUseValid      (1),
10409 
                .inUseReady      (1),
10410 
                .inReadyLatency  (0),
10411 
                .outDataWidth    (34),
10412 
                .outChannelWidth (0),
10413 
                .outErrorWidth   (1),
10414 
                .outUseEmptyPort (0),
10415 
                .outUseValid     (1),
10416 
                .outUseReady     (1),
10417 
                .outReadyLatency (0)
10418 
        ) avalon_st_adapter_005 (
10419 
                .in_clk_0_clk   (clk_0_clk_clk),                                     // in_clk_0.clk
10420 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset),    // in_rst_0.reset
10421 
                .in_0_data      (fifo_full_rx_status_s1_agent_rdata_fifo_out_data),  //     in_0.data
10422 
                .in_0_valid     (fifo_full_rx_status_s1_agent_rdata_fifo_out_valid), //         .valid
10423 
                .in_0_ready     (fifo_full_rx_status_s1_agent_rdata_fifo_out_ready), //         .ready
10424 
                .out_0_data     (avalon_st_adapter_005_out_0_data),                  //    out_0.data
10425 
                .out_0_valid    (avalon_st_adapter_005_out_0_valid),                 //         .valid
10426 
                .out_0_ready    (avalon_st_adapter_005_out_0_ready),                 //         .ready
10427 
                .out_0_error    (avalon_st_adapter_005_out_0_error)                  //         .error
10428 
        );
10429 
 
10430 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10431 
                .inBitsPerSymbol (34),
10432 
                .inUsePackets    (0),
10433 
                .inDataWidth     (34),
10434 
                .inChannelWidth  (0),
10435 
                .inErrorWidth    (0),
10436 
                .inUseEmptyPort  (0),
10437 
                .inUseValid      (1),
10438 
                .inUseReady      (1),
10439 
                .inReadyLatency  (0),
10440 
                .outDataWidth    (34),
10441 
                .outChannelWidth (0),
10442 
                .outErrorWidth   (1),
10443 
                .outUseEmptyPort (0),
10444 
                .outUseValid     (1),
10445 
                .outUseReady     (1),
10446 
                .outReadyLatency (0)
10447 
        ) avalon_st_adapter_006 (
10448 
                .in_clk_0_clk   (clk_0_clk_clk),                                      // in_clk_0.clk
10449 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset),     // in_rst_0.reset
10450 
                .in_0_data      (fifo_empty_rx_status_s1_agent_rdata_fifo_out_data),  //     in_0.data
10451 
                .in_0_valid     (fifo_empty_rx_status_s1_agent_rdata_fifo_out_valid), //         .valid
10452 
                .in_0_ready     (fifo_empty_rx_status_s1_agent_rdata_fifo_out_ready), //         .ready
10453 
                .out_0_data     (avalon_st_adapter_006_out_0_data),                   //    out_0.data
10454 
                .out_0_valid    (avalon_st_adapter_006_out_0_valid),                  //         .valid
10455 
                .out_0_ready    (avalon_st_adapter_006_out_0_ready),                  //         .ready
10456 
                .out_0_error    (avalon_st_adapter_006_out_0_error)                   //         .error
10457 
        );
10458 
 
10459 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10460 
                .inBitsPerSymbol (34),
10461 
                .inUsePackets    (0),
10462 
                .inDataWidth     (34),
10463 
                .inChannelWidth  (0),
10464 
                .inErrorWidth    (0),
10465 
                .inUseEmptyPort  (0),
10466 
                .inUseValid      (1),
10467 
                .inUseReady      (1),
10468 
                .inReadyLatency  (0),
10469 
                .outDataWidth    (34),
10470 
                .outChannelWidth (0),
10471 
                .outErrorWidth   (1),
10472 
                .outUseEmptyPort (0),
10473 
                .outUseValid     (1),
10474 
                .outUseReady     (1),
10475 
                .outReadyLatency (0)
10476 
        ) avalon_st_adapter_007 (
10477 
                .in_clk_0_clk   (clk_0_clk_clk),                                  // in_clk_0.clk
10478 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
10479 
                .in_0_data      (link_start_s1_agent_rdata_fifo_out_data),        //     in_0.data
10480 
                .in_0_valid     (link_start_s1_agent_rdata_fifo_out_valid),       //         .valid
10481 
                .in_0_ready     (link_start_s1_agent_rdata_fifo_out_ready),       //         .ready
10482 
                .out_0_data     (avalon_st_adapter_007_out_0_data),               //    out_0.data
10483 
                .out_0_valid    (avalon_st_adapter_007_out_0_valid),              //         .valid
10484 
                .out_0_ready    (avalon_st_adapter_007_out_0_ready),              //         .ready
10485 
                .out_0_error    (avalon_st_adapter_007_out_0_error)               //         .error
10486 
        );
10487 
 
10488 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10489 
                .inBitsPerSymbol (34),
10490 
                .inUsePackets    (0),
10491 
                .inDataWidth     (34),
10492 
                .inChannelWidth  (0),
10493 
                .inErrorWidth    (0),
10494 
                .inUseEmptyPort  (0),
10495 
                .inUseValid      (1),
10496 
                .inUseReady      (1),
10497 
                .inReadyLatency  (0),
10498 
                .outDataWidth    (34),
10499 
                .outChannelWidth (0),
10500 
                .outErrorWidth   (1),
10501 
                .outUseEmptyPort (0),
10502 
                .outUseValid     (1),
10503 
                .outUseReady     (1),
10504 
                .outReadyLatency (0)
10505 
        ) avalon_st_adapter_008 (
10506 
                .in_clk_0_clk   (clk_0_clk_clk),                                  // in_clk_0.clk
10507 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
10508 
                .in_0_data      (auto_start_s1_agent_rdata_fifo_out_data),        //     in_0.data
10509 
                .in_0_valid     (auto_start_s1_agent_rdata_fifo_out_valid),       //         .valid
10510 
                .in_0_ready     (auto_start_s1_agent_rdata_fifo_out_ready),       //         .ready
10511 
                .out_0_data     (avalon_st_adapter_008_out_0_data),               //    out_0.data
10512 
                .out_0_valid    (avalon_st_adapter_008_out_0_valid),              //         .valid
10513 
                .out_0_ready    (avalon_st_adapter_008_out_0_ready),              //         .ready
10514 
                .out_0_error    (avalon_st_adapter_008_out_0_error)               //         .error
10515 
        );
10516 
 
10517 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10518 
                .inBitsPerSymbol (34),
10519 
                .inUsePackets    (0),
10520 
                .inDataWidth     (34),
10521 
                .inChannelWidth  (0),
10522 
                .inErrorWidth    (0),
10523 
                .inUseEmptyPort  (0),
10524 
                .inUseValid      (1),
10525 
                .inUseReady      (1),
10526 
                .inReadyLatency  (0),
10527 
                .outDataWidth    (34),
10528 
                .outChannelWidth (0),
10529 
                .outErrorWidth   (1),
10530 
                .outUseEmptyPort (0),
10531 
                .outUseValid     (1),
10532 
                .outUseReady     (1),
10533 
                .outReadyLatency (0)
10534 
        ) avalon_st_adapter_009 (
10535 
                .in_clk_0_clk   (clk_0_clk_clk),                                  // in_clk_0.clk
10536 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
10537 
                .in_0_data      (link_disable_s1_agent_rdata_fifo_out_data),      //     in_0.data
10538 
                .in_0_valid     (link_disable_s1_agent_rdata_fifo_out_valid),     //         .valid
10539 
                .in_0_ready     (link_disable_s1_agent_rdata_fifo_out_ready),     //         .ready
10540 
                .out_0_data     (avalon_st_adapter_009_out_0_data),               //    out_0.data
10541 
                .out_0_valid    (avalon_st_adapter_009_out_0_valid),              //         .valid
10542 
                .out_0_ready    (avalon_st_adapter_009_out_0_ready),              //         .ready
10543 
                .out_0_error    (avalon_st_adapter_009_out_0_error)               //         .error
10544 
        );
10545 
 
10546 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10547 
                .inBitsPerSymbol (34),
10548 
                .inUsePackets    (0),
10549 
                .inDataWidth     (34),
10550 
                .inChannelWidth  (0),
10551 
                .inErrorWidth    (0),
10552 
                .inUseEmptyPort  (0),
10553 
                .inUseValid      (1),
10554 
                .inUseReady      (1),
10555 
                .inReadyLatency  (0),
10556 
                .outDataWidth    (34),
10557 
                .outChannelWidth (0),
10558 
                .outErrorWidth   (1),
10559 
                .outUseEmptyPort (0),
10560 
                .outUseValid     (1),
10561 
                .outUseReady     (1),
10562 
                .outReadyLatency (0)
10563 
        ) avalon_st_adapter_010 (
10564 
                .in_clk_0_clk   (clk_0_clk_clk),                                    // in_clk_0.clk
10565 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset),   // in_rst_0.reset
10566 
                .in_0_data      (write_data_fifo_tx_s1_agent_rdata_fifo_out_data),  //     in_0.data
10567 
                .in_0_valid     (write_data_fifo_tx_s1_agent_rdata_fifo_out_valid), //         .valid
10568 
                .in_0_ready     (write_data_fifo_tx_s1_agent_rdata_fifo_out_ready), //         .ready
10569 
                .out_0_data     (avalon_st_adapter_010_out_0_data),                 //    out_0.data
10570 
                .out_0_valid    (avalon_st_adapter_010_out_0_valid),                //         .valid
10571 
                .out_0_ready    (avalon_st_adapter_010_out_0_ready),                //         .ready
10572 
                .out_0_error    (avalon_st_adapter_010_out_0_error)                 //         .error
10573 
        );
10574 
 
10575 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10576 
                .inBitsPerSymbol (34),
10577 
                .inUsePackets    (0),
10578 
                .inDataWidth     (34),
10579 
                .inChannelWidth  (0),
10580 
                .inErrorWidth    (0),
10581 
                .inUseEmptyPort  (0),
10582 
                .inUseValid      (1),
10583 
                .inUseReady      (1),
10584 
                .inReadyLatency  (0),
10585 
                .outDataWidth    (34),
10586 
                .outChannelWidth (0),
10587 
                .outErrorWidth   (1),
10588 
                .outUseEmptyPort (0),
10589 
                .outUseValid     (1),
10590 
                .outUseReady     (1),
10591 
                .outReadyLatency (0)
10592 
        ) avalon_st_adapter_011 (
10593 
                .in_clk_0_clk   (clk_0_clk_clk),                                  // in_clk_0.clk
10594 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
10595 
                .in_0_data      (write_en_tx_s1_agent_rdata_fifo_out_data),       //     in_0.data
10596 
                .in_0_valid     (write_en_tx_s1_agent_rdata_fifo_out_valid),      //         .valid
10597 
                .in_0_ready     (write_en_tx_s1_agent_rdata_fifo_out_ready),      //         .ready
10598 
                .out_0_data     (avalon_st_adapter_011_out_0_data),               //    out_0.data
10599 
                .out_0_valid    (avalon_st_adapter_011_out_0_valid),              //         .valid
10600 
                .out_0_ready    (avalon_st_adapter_011_out_0_ready),              //         .ready
10601 
                .out_0_error    (avalon_st_adapter_011_out_0_error)               //         .error
10602 
        );
10603 
 
10604 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10605 
                .inBitsPerSymbol (34),
10606 
                .inUsePackets    (0),
10607 
                .inDataWidth     (34),
10608 
                .inChannelWidth  (0),
10609 
                .inErrorWidth    (0),
10610 
                .inUseEmptyPort  (0),
10611 
                .inUseValid      (1),
10612 
                .inUseReady      (1),
10613 
                .inReadyLatency  (0),
10614 
                .outDataWidth    (34),
10615 
                .outChannelWidth (0),
10616 
                .outErrorWidth   (1),
10617 
                .outUseEmptyPort (0),
10618 
                .outUseValid     (1),
10619 
                .outUseReady     (1),
10620 
                .outReadyLatency (0)
10621 
        ) avalon_st_adapter_012 (
10622 
                .in_clk_0_clk   (clk_0_clk_clk),                                     // in_clk_0.clk
10623 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset),    // in_rst_0.reset
10624 
                .in_0_data      (fifo_full_tx_status_s1_agent_rdata_fifo_out_data),  //     in_0.data
10625 
                .in_0_valid     (fifo_full_tx_status_s1_agent_rdata_fifo_out_valid), //         .valid
10626 
                .in_0_ready     (fifo_full_tx_status_s1_agent_rdata_fifo_out_ready), //         .ready
10627 
                .out_0_data     (avalon_st_adapter_012_out_0_data),                  //    out_0.data
10628 
                .out_0_valid    (avalon_st_adapter_012_out_0_valid),                 //         .valid
10629 
                .out_0_ready    (avalon_st_adapter_012_out_0_ready),                 //         .ready
10630 
                .out_0_error    (avalon_st_adapter_012_out_0_error)                  //         .error
10631 
        );
10632 
 
10633 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10634 
                .inBitsPerSymbol (34),
10635 
                .inUsePackets    (0),
10636 
                .inDataWidth     (34),
10637 
                .inChannelWidth  (0),
10638 
                .inErrorWidth    (0),
10639 
                .inUseEmptyPort  (0),
10640 
                .inUseValid      (1),
10641 
                .inUseReady      (1),
10642 
                .inReadyLatency  (0),
10643 
                .outDataWidth    (34),
10644 
                .outChannelWidth (0),
10645 
                .outErrorWidth   (1),
10646 
                .outUseEmptyPort (0),
10647 
                .outUseValid     (1),
10648 
                .outUseReady     (1),
10649 
                .outReadyLatency (0)
10650 
        ) avalon_st_adapter_013 (
10651 
                .in_clk_0_clk   (clk_0_clk_clk),                                      // in_clk_0.clk
10652 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset),     // in_rst_0.reset
10653 
                .in_0_data      (fifo_empty_tx_status_s1_agent_rdata_fifo_out_data),  //     in_0.data
10654 
                .in_0_valid     (fifo_empty_tx_status_s1_agent_rdata_fifo_out_valid), //         .valid
10655 
                .in_0_ready     (fifo_empty_tx_status_s1_agent_rdata_fifo_out_ready), //         .ready
10656 
                .out_0_data     (avalon_st_adapter_013_out_0_data),                   //    out_0.data
10657 
                .out_0_valid    (avalon_st_adapter_013_out_0_valid),                  //         .valid
10658 
                .out_0_ready    (avalon_st_adapter_013_out_0_ready),                  //         .ready
10659 
                .out_0_error    (avalon_st_adapter_013_out_0_error)                   //         .error
10660 
        );
10661 
 
10662 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10663 
                .inBitsPerSymbol (34),
10664 
                .inUsePackets    (0),
10665 
                .inDataWidth     (34),
10666 
                .inChannelWidth  (0),
10667 
                .inErrorWidth    (0),
10668 
                .inUseEmptyPort  (0),
10669 
                .inUseValid      (1),
10670 
                .inUseReady      (1),
10671 
                .inReadyLatency  (0),
10672 
                .outDataWidth    (34),
10673 
                .outChannelWidth (0),
10674 
                .outErrorWidth   (1),
10675 
                .outUseEmptyPort (0),
10676 
                .outUseValid     (1),
10677 
                .outUseReady     (1),
10678 
                .outReadyLatency (0)
10679 
        ) avalon_st_adapter_014 (
10680 
                .in_clk_0_clk   (clk_0_clk_clk),                                  // in_clk_0.clk
10681 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
10682 
                .in_0_data      (timecode_tx_data_s1_agent_rdata_fifo_out_data),  //     in_0.data
10683 
                .in_0_valid     (timecode_tx_data_s1_agent_rdata_fifo_out_valid), //         .valid
10684 
                .in_0_ready     (timecode_tx_data_s1_agent_rdata_fifo_out_ready), //         .ready
10685 
                .out_0_data     (avalon_st_adapter_014_out_0_data),               //    out_0.data
10686 
                .out_0_valid    (avalon_st_adapter_014_out_0_valid),              //         .valid
10687 
                .out_0_ready    (avalon_st_adapter_014_out_0_ready),              //         .ready
10688 
                .out_0_error    (avalon_st_adapter_014_out_0_error)               //         .error
10689 
        );
10690 
 
10691 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10692 
                .inBitsPerSymbol (34),
10693 
                .inUsePackets    (0),
10694 
                .inDataWidth     (34),
10695 
                .inChannelWidth  (0),
10696 
                .inErrorWidth    (0),
10697 
                .inUseEmptyPort  (0),
10698 
                .inUseValid      (1),
10699 
                .inUseReady      (1),
10700 
                .inReadyLatency  (0),
10701 
                .outDataWidth    (34),
10702 
                .outChannelWidth (0),
10703 
                .outErrorWidth   (1),
10704 
                .outUseEmptyPort (0),
10705 
                .outUseValid     (1),
10706 
                .outUseReady     (1),
10707 
                .outReadyLatency (0)
10708 
        ) avalon_st_adapter_015 (
10709 
                .in_clk_0_clk   (clk_0_clk_clk),                                    // in_clk_0.clk
10710 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset),   // in_rst_0.reset
10711 
                .in_0_data      (timecode_tx_enable_s1_agent_rdata_fifo_out_data),  //     in_0.data
10712 
                .in_0_valid     (timecode_tx_enable_s1_agent_rdata_fifo_out_valid), //         .valid
10713 
                .in_0_ready     (timecode_tx_enable_s1_agent_rdata_fifo_out_ready), //         .ready
10714 
                .out_0_data     (avalon_st_adapter_015_out_0_data),                 //    out_0.data
10715 
                .out_0_valid    (avalon_st_adapter_015_out_0_valid),                //         .valid
10716 
                .out_0_ready    (avalon_st_adapter_015_out_0_ready),                //         .ready
10717 
                .out_0_error    (avalon_st_adapter_015_out_0_error)                 //         .error
10718 
        );
10719 
 
10720 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10721 
                .inBitsPerSymbol (34),
10722 
                .inUsePackets    (0),
10723 
                .inDataWidth     (34),
10724 
                .inChannelWidth  (0),
10725 
                .inErrorWidth    (0),
10726 
                .inUseEmptyPort  (0),
10727 
                .inUseValid      (1),
10728 
                .inUseReady      (1),
10729 
                .inReadyLatency  (0),
10730 
                .outDataWidth    (34),
10731 
                .outChannelWidth (0),
10732 
                .outErrorWidth   (1),
10733 
                .outUseEmptyPort (0),
10734 
                .outUseValid     (1),
10735 
                .outUseReady     (1),
10736 
                .outReadyLatency (0)
10737 
        ) avalon_st_adapter_016 (
10738 
                .in_clk_0_clk   (clk_0_clk_clk),                                   // in_clk_0.clk
10739 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset),  // in_rst_0.reset
10740 
                .in_0_data      (timecode_tx_ready_s1_agent_rdata_fifo_out_data),  //     in_0.data
10741 
                .in_0_valid     (timecode_tx_ready_s1_agent_rdata_fifo_out_valid), //         .valid
10742 
                .in_0_ready     (timecode_tx_ready_s1_agent_rdata_fifo_out_ready), //         .ready
10743 
                .out_0_data     (avalon_st_adapter_016_out_0_data),                //    out_0.data
10744 
                .out_0_valid    (avalon_st_adapter_016_out_0_valid),               //         .valid
10745 
                .out_0_ready    (avalon_st_adapter_016_out_0_ready),               //         .ready
10746 
                .out_0_error    (avalon_st_adapter_016_out_0_error)                //         .error
10747 
        );
10748 
 
10749 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10750 
                .inBitsPerSymbol (34),
10751 
                .inUsePackets    (0),
10752 
                .inDataWidth     (34),
10753 
                .inChannelWidth  (0),
10754 
                .inErrorWidth    (0),
10755 
                .inUseEmptyPort  (0),
10756 
                .inUseValid      (1),
10757 
                .inUseReady      (1),
10758 
                .inReadyLatency  (0),
10759 
                .outDataWidth    (34),
10760 
                .outChannelWidth (0),
10761 
                .outErrorWidth   (1),
10762 
                .outUseEmptyPort (0),
10763 
                .outUseValid     (1),
10764 
                .outUseReady     (1),
10765 
                .outReadyLatency (0)
10766 
        ) avalon_st_adapter_017 (
10767 
                .in_clk_0_clk   (clk_0_clk_clk),                                  // in_clk_0.clk
10768 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
10769 
                .in_0_data      (data_info_s1_agent_rdata_fifo_out_data),         //     in_0.data
10770 
                .in_0_valid     (data_info_s1_agent_rdata_fifo_out_valid),        //         .valid
10771 
                .in_0_ready     (data_info_s1_agent_rdata_fifo_out_ready),        //         .ready
10772 
                .out_0_data     (avalon_st_adapter_017_out_0_data),               //    out_0.data
10773 
                .out_0_valid    (avalon_st_adapter_017_out_0_valid),              //         .valid
10774 
                .out_0_ready    (avalon_st_adapter_017_out_0_ready),              //         .ready
10775 
                .out_0_error    (avalon_st_adapter_017_out_0_error)               //         .error
10776 
        );
10777 
 
10778 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10779 
                .inBitsPerSymbol (34),
10780 
                .inUsePackets    (0),
10781 
                .inDataWidth     (34),
10782 
                .inChannelWidth  (0),
10783 
                .inErrorWidth    (0),
10784 
                .inUseEmptyPort  (0),
10785 
                .inUseValid      (1),
10786 
                .inUseReady      (1),
10787 
                .inReadyLatency  (0),
10788 
                .outDataWidth    (34),
10789 
                .outChannelWidth (0),
10790 
                .outErrorWidth   (1),
10791 
                .outUseEmptyPort (0),
10792 
                .outUseValid     (1),
10793 
                .outUseReady     (1),
10794 
                .outReadyLatency (0)
10795 
        ) avalon_st_adapter_018 (
10796 
                .in_clk_0_clk   (clk_0_clk_clk),                                  // in_clk_0.clk
10797 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
10798 
                .in_0_data      (clock_sel_s1_agent_rdata_fifo_out_data),         //     in_0.data
10799 
                .in_0_valid     (clock_sel_s1_agent_rdata_fifo_out_valid),        //         .valid
10800 
                .in_0_ready     (clock_sel_s1_agent_rdata_fifo_out_ready),        //         .ready
10801 
                .out_0_data     (avalon_st_adapter_018_out_0_data),               //    out_0.data
10802 
                .out_0_valid    (avalon_st_adapter_018_out_0_valid),              //         .valid
10803 
                .out_0_ready    (avalon_st_adapter_018_out_0_ready),              //         .ready
10804 
                .out_0_error    (avalon_st_adapter_018_out_0_error)               //         .error
10805 
        );
10806 
 
10807 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10808 
                .inBitsPerSymbol (34),
10809 
                .inUsePackets    (0),
10810 
                .inDataWidth     (34),
10811 
                .inChannelWidth  (0),
10812 
                .inErrorWidth    (0),
10813 
                .inUseEmptyPort  (0),
10814 
                .inUseValid      (1),
10815 
                .inUseReady      (1),
10816 
                .inReadyLatency  (0),
10817 
                .outDataWidth    (34),
10818 
                .outChannelWidth (0),
10819 
                .outErrorWidth   (1),
10820 
                .outUseEmptyPort (0),
10821 
                .outUseValid     (1),
10822 
                .outUseReady     (1),
10823 
                .outReadyLatency (0)
10824 
        ) avalon_st_adapter_019 (
10825 
                .in_clk_0_clk   (clk_0_clk_clk),                                  // in_clk_0.clk
10826 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
10827 
                .in_0_data      (fsm_info_s1_agent_rdata_fifo_out_data),          //     in_0.data
10828 
                .in_0_valid     (fsm_info_s1_agent_rdata_fifo_out_valid),         //         .valid
10829 
                .in_0_ready     (fsm_info_s1_agent_rdata_fifo_out_ready),         //         .ready
10830 
                .out_0_data     (avalon_st_adapter_019_out_0_data),               //    out_0.data
10831 
                .out_0_valid    (avalon_st_adapter_019_out_0_valid),              //         .valid
10832 
                .out_0_ready    (avalon_st_adapter_019_out_0_ready),              //         .ready
10833 
                .out_0_error    (avalon_st_adapter_019_out_0_error)               //         .error
10834 
        );
10835 
 
10836 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10837 
                .inBitsPerSymbol (34),
10838 
                .inUsePackets    (0),
10839 
                .inDataWidth     (34),
10840 
                .inChannelWidth  (0),
10841 
                .inErrorWidth    (0),
10842 
                .inUseEmptyPort  (0),
10843 
                .inUseValid      (1),
10844 
                .inUseReady      (1),
10845 
                .inReadyLatency  (0),
10846 
                .outDataWidth    (34),
10847 
                .outChannelWidth (0),
10848 
                .outErrorWidth   (1),
10849 
                .outUseEmptyPort (0),
10850 
                .outUseValid     (1),
10851 
                .outUseReady     (1),
10852 
                .outReadyLatency (0)
10853 
        ) avalon_st_adapter_020 (
10854 
                .in_clk_0_clk   (clk_0_clk_clk),                                  // in_clk_0.clk
10855 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
10856 
                .in_0_data      (counter_tx_fifo_s1_agent_rdata_fifo_out_data),   //     in_0.data
10857 
                .in_0_valid     (counter_tx_fifo_s1_agent_rdata_fifo_out_valid),  //         .valid
10858 
                .in_0_ready     (counter_tx_fifo_s1_agent_rdata_fifo_out_ready),  //         .ready
10859 
                .out_0_data     (avalon_st_adapter_020_out_0_data),               //    out_0.data
10860 
                .out_0_valid    (avalon_st_adapter_020_out_0_valid),              //         .valid
10861 
                .out_0_ready    (avalon_st_adapter_020_out_0_ready),              //         .ready
10862 
                .out_0_error    (avalon_st_adapter_020_out_0_error)               //         .error
10863 
        );
10864 
 
10865 
        ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
10866 
                .inBitsPerSymbol (34),
10867 
                .inUsePackets    (0),
10868 
                .inDataWidth     (34),
10869 
                .inChannelWidth  (0),
10870 
                .inErrorWidth    (0),
10871 
                .inUseEmptyPort  (0),
10872 
                .inUseValid      (1),
10873 
                .inUseReady      (1),
10874 
                .inReadyLatency  (0),
10875 
                .outDataWidth    (34),
10876 
                .outChannelWidth (0),
10877 
                .outErrorWidth   (1),
10878 
                .outUseEmptyPort (0),
10879 
                .outUseValid     (1),
10880 
                .outUseReady     (1),
10881 
                .outReadyLatency (0)
10882 
        ) avalon_st_adapter_021 (
10883 
                .in_clk_0_clk   (clk_0_clk_clk),                                  // in_clk_0.clk
10884 
                .in_rst_0_reset (led_pio_test_reset_reset_bridge_in_reset_reset), // in_rst_0.reset
10885 
                .in_0_data      (counter_rx_fifo_s1_agent_rdata_fifo_out_data),   //     in_0.data
10886 
                .in_0_valid     (counter_rx_fifo_s1_agent_rdata_fifo_out_valid),  //         .valid
10887 
                .in_0_ready     (counter_rx_fifo_s1_agent_rdata_fifo_out_ready),  //         .ready
10888 
                .out_0_data     (avalon_st_adapter_021_out_0_data),               //    out_0.data
10889 
                .out_0_valid    (avalon_st_adapter_021_out_0_valid),              //         .valid
10890 
                .out_0_ready    (avalon_st_adapter_021_out_0_ready),              //         .ready
10891 
                .out_0_error    (avalon_st_adapter_021_out_0_error)               //         .error
10892 
        );
10893 
 
10894 
endmodule

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.