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[/] [spacewiresystemc/] [trunk/] [systemC/] [spw_fsm.h] - Blame information for rev 29

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//+FHDR------------------------------------------------------------------------
//Copyright (c) 2013 Latin Group American Integhrated Circuit, Inc. All rights reserved
//GLADIC Open Source RTL
//-----------------------------------------------------------------------------
//FILE NAME      :
//DEPARTMENT     : IC Design / Verification
//AUTHOR         : Felipe Fernandes da Costa
//AUTHOR’S EMAIL :
//-----------------------------------------------------------------------------
//RELEASE HISTORY
//VERSION DATE AUTHOR DESCRIPTION
//1.0 YYYY-MM-DD name
//-----------------------------------------------------------------------------
//KEYWORDS : General file searching keywords, leave blank if none.
//-----------------------------------------------------------------------------
//PURPOSE  : ECSS_E_ST_50_12C_31_july_2008
//-----------------------------------------------------------------------------
//PARAMETERS
//PARAM NAME            RANGE   : DESCRIPTION : DEFAULT : UNITS
//e.g.DATA_WIDTH        [32,16] : width of the DATA : 32:
//-----------------------------------------------------------------------------
//REUSE ISSUES
//Reset Strategy        :
//Clock Domains         :
//Critical Timing       :
//Test Features         :
//Asynchronous I/F      :
//Scan Methodology      :
//Instantiations        :
//Synthesizable (y/n)   :
//Other                 :
//-FHDR------------------------------------------------------------------------
#ifndef SPW_FSM_T_H
#define SPW_FSM_T_H
 
#include <systemc.h>
 
#define ERROR_RESET 0
#define ERROR_WAIT  1
#define READY       2
#define STARTED     3
#define CONNECTING  4
#define RUN         5
 
class SPW_FSM_SC;
 
SC_MODULE(SPW_FSM_SC)
{
 
        /*FSM signal*/
        sc_in<bool> CLOCK;
        sc_in<bool> RESET;
        sc_in<bool> LINK_START;
        sc_in<bool> LINK_DISABLE;
        sc_in<bool> AUTO_START;
        sc_out<sc_uint<4> > FSM_SPW_OUT;
 
        /*Signal come from RX Receiver*/
        sc_in<bool> GOT_FCT_RX;
        sc_in<bool> GOT_TIMECODE_RX;
        sc_in<bool> GOTNCHAR_RX;
        sc_in<bool> GOTNULL_RX;
        sc_in<bool> GOTBIT_RX;
        sc_in<bool> CREDITERROR_RX;
        sc_in<bool> RXERROR_RX;
        sc_out<bool> ENABLE_RX;
 
        /*Signal come from TX Transmit*/
        sc_out<bool> ENABLE_TX;
        sc_out<bool> SEND_NULL_TX;
        sc_out<bool> SEND_FCT_TX;
        sc_out<bool> SEND_NCHAR_TX;
        sc_out<bool> SEND_TIMECODE_TX;
 
        /*RESET TX / RX*/
        sc_out<bool> RESET_TX;
        sc_out<bool> RESET_RX;
 
        bool After128;
 
        bool After64;
 
        sc_uint<4> state_fsm_spw;
 
        void FSM()
        {
 
                //cout << "STARTING FSM SPW SC" << endl;
 
                while(1)
                {
 
                        if(!RESET)
                        {
                                FSM_SPW_OUT = state_fsm_spw = ERROR_RESET;
                                ENABLE_TX       = false;
                                SEND_NULL_TX    = false;
                                SEND_FCT_TX     = false;
                                SEND_NCHAR_TX   = false;
                                SEND_TIMECODE_TX= false;
                                RESET_TX = true;
                                RESET_RX = true;
                        }else
                        {
                                FSM_SPW_OUT = state_fsm_spw;
 
                                switch(state_fsm_spw)
                                {
                                        case ERROR_RESET:
                                                RESET_TX = true;
                                                RESET_RX = true;
                                                ENABLE_TX = false;
                                                ENABLE_RX = false;
                                                if(After64 == true)
                                                {
                                                        state_fsm_spw = ERROR_WAIT;
                                                }
                                                //cout << "ERROR RESET" << endl;
                                        break;
                                        case ERROR_WAIT:
                                                RESET_TX  = true;
                                                ENABLE_TX = false;
                                                RESET_RX  = false;
                                                ENABLE_RX = true;
 
                                                if(After128 == true)
                                                {
                                                        state_fsm_spw = READY;
                                                }else if(RXERROR_RX || GOT_FCT_RX || GOTNCHAR_RX || GOT_TIMECODE_RX)
                                                {
                                                        state_fsm_spw = ERROR_RESET;
                                                }
 
                                                //cout << "ERROR WAIT" << endl;
                                        break;
                                        case READY:
                                                RESET_TX   = true;
                                                RESET_RX   = false;
                                                ENABLE_RX  = true;
                                                if(RXERROR_RX || GOT_FCT_RX || GOTNCHAR_RX || GOT_TIMECODE_RX)
                                                {
                                                        state_fsm_spw = ERROR_RESET;
                                                }
                                                else if((!LINK_DISABLE) && (LINK_START ||(AUTO_START && GOTNULL_RX)))
                                                {
                                                        state_fsm_spw = STARTED;
                                                }
 
                                                //cout << "READY" << endl;
                                        break;
                                        case STARTED:
                                                RESET_TX     = false;
                                                RESET_RX     = false;
                                                SEND_NULL_TX = true;
                                                ENABLE_TX    = true;
                                                ENABLE_RX    = true;
 
                                                if(RXERROR_RX || GOT_FCT_RX || GOTNCHAR_RX || GOT_TIMECODE_RX || After128 )
                                                {
                                                        state_fsm_spw = ERROR_RESET;
                                                }
                                                else if(GOTNULL_RX && GOTBIT_RX)
                                                {
                                                        state_fsm_spw = CONNECTING;
                                                }
                                                //cout << "STARTED" << endl;
                                        break;
                                        case CONNECTING:
 
                                                RESET_TX     = false;
                                                RESET_RX     = false;
                                                ENABLE_TX    = true;
                                                ENABLE_RX    = true;
 
                                                SEND_NULL_TX = true;
                                                SEND_FCT_TX  = true;
 
 
                                                if(RXERROR_RX || GOTNCHAR_RX || GOT_TIMECODE_RX || After128 )
                                                {
                                                        state_fsm_spw = ERROR_RESET;
                                                }else if(GOT_FCT_RX)
                                                {
                                                        state_fsm_spw = RUN;
                                                }
                                                //cout << "CONNECTING" << endl;
                                        break;
                                        case RUN:
 
                                                SEND_NULL_TX     = true;
                                                ENABLE_TX        = true;
                                                SEND_FCT_TX      = true;
                                                SEND_NCHAR_TX    = true;
                                                SEND_TIMECODE_TX = true;
                                                ENABLE_RX        = true;
 
                                                if(RXERROR_RX || CREDITERROR_RX || LINK_DISABLE)
                                                {
                                                        state_fsm_spw = ERROR_RESET;
                                                        //cout << "RX ERROR DETECTED" << endl;
                                                }
                                                else
                                                {
                                                        state_fsm_spw = RUN;
                                                }
 
                                                //cout << "RUN" << endl;
                                        break;
                                }
                        }
                        wait(1);
                }
        }
 
 
        void TIMER_ADTER128()
        {
                while(1)
                {
                  if(!RESET)
                  {
                        After128 = false;
                  }
                  else
                  {
                        if(state_fsm_spw == ERROR_WAIT || state_fsm_spw == STARTED || state_fsm_spw == CONNECTING)
                        {
                                After128 = false;
                                wait(639);
                                After128 = true;
                        }
                  }
                        wait(1);
                }
        }
 
        void TIMER_ADTER64()
        {
                while(1)
                {
                  if(!RESET)
                  {
                        After64 = false;
                  }
                  else
                  {
                        if(state_fsm_spw == ERROR_RESET)
                        {
                                After64 = false;
                                wait(319);
                                After64 = true;
                        }
                  }
                        wait(1);
                }
        }
 
 
        SC_CTOR(SPW_FSM_SC)
        {
                SC_CTHREAD(FSM,CLOCK.pos());
                SC_CTHREAD(TIMER_ADTER64,CLOCK.pos());
                SC_CTHREAD(TIMER_ADTER128,CLOCK.pos());
        }
 
};
 
#endif

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[/] [spacewiresystemc/] [trunk/] [systemC/] [spw_fsm.h] - Blame information for rev 29

Line No.	Rev	Author	Line
1	29	redbear	`//+FHDR------------------------------------------------------------------------`
2			`//Copyright (c) 2013 Latin Group American Integhrated Circuit, Inc. All rights reserved`
3			`//GLADIC Open Source RTL`
4			`//-----------------------------------------------------------------------------`
5			`//FILE NAME :`
6			`//DEPARTMENT : IC Design / Verification`
7			`//AUTHOR : Felipe Fernandes da Costa`
8			`//AUTHOR’S EMAIL :`
9			`//-----------------------------------------------------------------------------`
10			`//RELEASE HISTORY`
11			`//VERSION DATE AUTHOR DESCRIPTION`
12			`//1.0 YYYY-MM-DD name`
13			`//-----------------------------------------------------------------------------`
14			`//KEYWORDS : General file searching keywords, leave blank if none.`
15			`//-----------------------------------------------------------------------------`
16			`//PURPOSE : ECSS_E_ST_50_12C_31_july_2008`
17			`//-----------------------------------------------------------------------------`
18			`//PARAMETERS`
19			`//PARAM NAME RANGE : DESCRIPTION : DEFAULT : UNITS`
20			`//e.g.DATA_WIDTH [32,16] : width of the DATA : 32:`
21			`//-----------------------------------------------------------------------------`
22			`//REUSE ISSUES`
23			`//Reset Strategy :`
24			`//Clock Domains :`
25			`//Critical Timing :`
26			`//Test Features :`
27			`//Asynchronous I/F :`
28			`//Scan Methodology :`
29			`//Instantiations :`
30			`//Synthesizable (y/n) :`
31			`//Other :`
32			`//-FHDR------------------------------------------------------------------------`
33			`#ifndef SPW_FSM_T_H`
34			`#define SPW_FSM_T_H`
35
36			`#include <systemc.h>`
37
38			`#define ERROR_RESET 0`
39			`#define ERROR_WAIT 1`
40			`#define READY 2`
41			`#define STARTED 3`
42			`#define CONNECTING 4`
43			`#define RUN 5`
44
45			`class SPW_FSM_SC;`
46
47			`SC_MODULE(SPW_FSM_SC)`
48			`{`
49
50			`/FSM signal/`
51			`sc_in<bool> CLOCK;`
52			`sc_in<bool> RESET;`
53			`sc_in<bool> LINK_START;`
54			`sc_in<bool> LINK_DISABLE;`
55			`sc_in<bool> AUTO_START;`
56			`sc_out<sc_uint<4> > FSM_SPW_OUT;`
57
58			`/Signal come from RX Receiver/`
59			`sc_in<bool> GOT_FCT_RX;`
60			`sc_in<bool> GOT_TIMECODE_RX;`
61			`sc_in<bool> GOTNCHAR_RX;`
62			`sc_in<bool> GOTNULL_RX;`
63			`sc_in<bool> GOTBIT_RX;`
64			`sc_in<bool> CREDITERROR_RX;`
65			`sc_in<bool> RXERROR_RX;`
66			`sc_out<bool> ENABLE_RX;`
67
68			`/Signal come from TX Transmit/`
69			`sc_out<bool> ENABLE_TX;`
70			`sc_out<bool> SEND_NULL_TX;`
71			`sc_out<bool> SEND_FCT_TX;`
72			`sc_out<bool> SEND_NCHAR_TX;`
73			`sc_out<bool> SEND_TIMECODE_TX;`
74
75			`/RESET TX / RX/`
76			`sc_out<bool> RESET_TX;`
77			`sc_out<bool> RESET_RX;`
78
79			`bool After128;`
80
81			`bool After64;`
82
83			`sc_uint<4> state_fsm_spw;`
84
85			`void FSM()`
86			`{`
87
88			`//cout << "STARTING FSM SPW SC" << endl;`
89
90			`while(1)`
91			`{`
92
93			`if(!RESET)`
94			`{`
95			`FSM_SPW_OUT = state_fsm_spw = ERROR_RESET;`
96			`ENABLE_TX = false;`
97			`SEND_NULL_TX = false;`
98			`SEND_FCT_TX = false;`
99			`SEND_NCHAR_TX = false;`
100			`SEND_TIMECODE_TX= false;`
101			`RESET_TX = true;`
102			`RESET_RX = true;`
103			`}else`
104			`{`
105			`FSM_SPW_OUT = state_fsm_spw;`
106
107			`switch(state_fsm_spw)`
108			`{`
109			`case ERROR_RESET:`
110			`RESET_TX = true;`
111			`RESET_RX = true;`
112			`ENABLE_TX = false;`
113			`ENABLE_RX = false;`
114			`if(After64 == true)`
115			`{`
116			`state_fsm_spw = ERROR_WAIT;`
117			`}`
118			`//cout << "ERROR RESET" << endl;`
119			`break;`
120			`case ERROR_WAIT:`
121			`RESET_TX = true;`
122			`ENABLE_TX = false;`
123			`RESET_RX = false;`
124			`ENABLE_RX = true;`
125
126			`if(After128 == true)`
127			`{`
128			`state_fsm_spw = READY;`
129			`}else if(RXERROR_RX \|\| GOT_FCT_RX \|\| GOTNCHAR_RX \|\| GOT_TIMECODE_RX)`
130			`{`
131			`state_fsm_spw = ERROR_RESET;`
132			`}`
133
134			`//cout << "ERROR WAIT" << endl;`
135			`break;`
136			`case READY:`
137			`RESET_TX = true;`
138			`RESET_RX = false;`
139			`ENABLE_RX = true;`
140			`if(RXERROR_RX \|\| GOT_FCT_RX \|\| GOTNCHAR_RX \|\| GOT_TIMECODE_RX)`
141			`{`
142			`state_fsm_spw = ERROR_RESET;`
143			`}`
144			`else if((!LINK_DISABLE) && (LINK_START \|\|(AUTO_START && GOTNULL_RX)))`
145			`{`
146			`state_fsm_spw = STARTED;`
147			`}`
148
149			`//cout << "READY" << endl;`
150			`break;`
151			`case STARTED:`
152			`RESET_TX = false;`
153			`RESET_RX = false;`
154			`SEND_NULL_TX = true;`
155			`ENABLE_TX = true;`
156			`ENABLE_RX = true;`
157
158			`if(RXERROR_RX \|\| GOT_FCT_RX \|\| GOTNCHAR_RX \|\| GOT_TIMECODE_RX \|\| After128 )`
159			`{`
160			`state_fsm_spw = ERROR_RESET;`
161			`}`
162			`else if(GOTNULL_RX && GOTBIT_RX)`
163			`{`
164			`state_fsm_spw = CONNECTING;`
165			`}`
166			`//cout << "STARTED" << endl;`
167			`break;`
168			`case CONNECTING:`
169
170			`RESET_TX = false;`
171			`RESET_RX = false;`
172			`ENABLE_TX = true;`
173			`ENABLE_RX = true;`
174
175			`SEND_NULL_TX = true;`
176			`SEND_FCT_TX = true;`
177
178
179			`if(RXERROR_RX \|\| GOTNCHAR_RX \|\| GOT_TIMECODE_RX \|\| After128 )`
180			`{`
181			`state_fsm_spw = ERROR_RESET;`
182			`}else if(GOT_FCT_RX)`
183			`{`
184			`state_fsm_spw = RUN;`
185			`}`
186			`//cout << "CONNECTING" << endl;`
187			`break;`
188			`case RUN:`
189
190			`SEND_NULL_TX = true;`
191			`ENABLE_TX = true;`
192			`SEND_FCT_TX = true;`
193			`SEND_NCHAR_TX = true;`
194			`SEND_TIMECODE_TX = true;`
195			`ENABLE_RX = true;`
196
197			`if(RXERROR_RX \|\| CREDITERROR_RX \|\| LINK_DISABLE)`
198			`{`
199			`state_fsm_spw = ERROR_RESET;`
200			`//cout << "RX ERROR DETECTED" << endl;`
201			`}`
202			`else`
203			`{`
204			`state_fsm_spw = RUN;`
205			`}`
206
207			`//cout << "RUN" << endl;`
208			`break;`
209			`}`
210			`}`
211			`wait(1);`
212			`}`
213			`}`
214
215
216			`void TIMER_ADTER128()`
217			`{`
218			`while(1)`
219			`{`
220			`if(!RESET)`
221			`{`
222			`After128 = false;`
223			`}`
224			`else`
225			`{`
226			`if(state_fsm_spw == ERROR_WAIT \|\| state_fsm_spw == STARTED \|\| state_fsm_spw == CONNECTING)`
227			`{`
228			`After128 = false;`
229			`wait(639);`
230			`After128 = true;`
231			`}`
232			`}`
233			`wait(1);`
234			`}`
235			`}`
236
237			`void TIMER_ADTER64()`
238			`{`
239			`while(1)`
240			`{`
241			`if(!RESET)`
242			`{`
243			`After64 = false;`
244			`}`
245			`else`
246			`{`
247			`if(state_fsm_spw == ERROR_RESET)`
248			`{`
249			`After64 = false;`
250			`wait(319);`
251			`After64 = true;`
252			`}`
253			`}`
254			`wait(1);`
255			`}`
256			`}`
257
258
259			`SC_CTOR(SPW_FSM_SC)`
260			`{`
261			`SC_CTHREAD(FSM,CLOCK.pos());`
262			`SC_CTHREAD(TIMER_ADTER64,CLOCK.pos());`
263			`SC_CTHREAD(TIMER_ADTER128,CLOCK.pos());`
264			`}`
265
266			`};`
267
268			`#endif`