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-- Proyecto                             : SFU IEEE754
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-- Nombre de archivo    : SFU.vhd
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-- Titulo                               : Special Function Unit  
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-----------------------------------------------------------------------------   
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-- Descripcion                  : This unit performs the floating point operations
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--                                                sin(x), cos(x), rsqrt(x), log2(x) and exp2(x) using
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--                                              IEE754 standard and operational compliant with GPU G80
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--                                              architecture
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--
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-----------------------------------------------------------------------------   
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-- Universidad Pedagogica y Tecnologica de Colombia.
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-- Facultad de ingenieria.
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-- Escuela de ingenieria Electronica - extension Tunja.
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-- 
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-- Autor: Cristhian Fernando Moreno Manrique
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-- Abril 2020
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-----------------------------------------------------------------------------   
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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entity sfu is
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port(clk_i        :in std_logic;        --input clock
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         rst_n    :in std_logic;        --reset active low
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         start_i  :in std_logic;        --start operation
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         src1_i   :in std_logic_vector(31 downto 0); --IEE754 input data
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         selop_i  :in std_logic_vector(2 downto 0); --operation selection
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         Result_o :out std_logic_vector(31 downto 0); --IEE754 result data output
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         stall_o  :out std_logic --stall signal 
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);
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end entity sfu;
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architecture structure of sfu is
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signal sin_res, cos_res, rsqrt_res,log2_res,exp2_res :std_logic_vector(31 downto 0);
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signal start_cordic,ready_cordic, cordic_sel,ff_ready_cordic :std_logic;
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begin
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--oparators intance
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Cordic_inst: entity work.cordic
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        port map(iClk     => clk_i,
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                         iReset   => rst_n,
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                 istart   => start_cordic,
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                 iEntrada => src1_i,
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                 oSalida1 => cos_res,
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                 oSalida2 => sin_res,
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                 oready   => ready_cordic);
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rsqrt_ints: entity work.rsqrt
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        port map(i_x     => src1_i,
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                 o_rsqrt => rsqrt_res);
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 log2_inst: entity work.log2_fp
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        port map(i_x    => src1_i,
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                 o_log2 => log2_res);
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 exp2_inst: entity work.exp2_fp
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        port map(i_x    => src1_i,
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                 o_exp2 => exp2_res);
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--stall control
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cordic_sel <= selop_i(2) nor selop_i(1);
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start_cordic <= cordic_sel and start_i;
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ff_d: process(clk_i,rst_n)
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        begin
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                if(rst_n='0') then
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                        ff_ready_cordic <= '0';
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                elsif rising_edge(clk_i) then
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                        ff_ready_cordic <= ready_cordic;
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                end if;
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        end process;
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stall_o <= cordic_sel and ((not ready_cordic) or ff_ready_cordic);
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--output multiplexer
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with selop_i select
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        Result_o <= sin_res     when "000",
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                                cos_res         when "001",
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                                rsqrt_res       when "010",
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                                log2_res        when "011",
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                                exp2_res        when "100",
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                                src1_i          when others;
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end structure;

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