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[/] [srdydrdy_lib/] [trunk/] [examples/] [bridge/] [rtl/] [port_ring_tap_fsm.v] - Blame information for rev 16

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1 5 ghutchis 
module port_ring_tap_fsm
2 
  #(parameter rdp_sz = 64,
3 8 ghutchis 
    parameter pdp_sz = 64,
4 5 ghutchis 
    parameter portnum = 0)
5 
  (
6 
   input               clk,
7 
   input               reset,
8 
 
9 
   output reg               lfli_drdy,
10 
   output reg               lprx_drdy,
11 8 ghutchis 
   output reg[pdp_sz-1:0]    lptx_data,
12 5 ghutchis 
   output reg               lptx_srdy,
13 
   output reg               lri_drdy,
14 
   output reg[rdp_sz-1:0]    lro_data,
15 
   output reg               lro_srdy,
16 
 
17 8 ghutchis 
   input [`NUM_PORTS-1:0]   lfli_data,
18 5 ghutchis 
   input               lfli_srdy,
19 8 ghutchis 
   input [pdp_sz-1:0]   lprx_data,
20 5 ghutchis 
   input               lprx_srdy,
21 
   input               lptx_drdy,
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   input [rdp_sz-1:0]   lri_data,
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   input               lri_srdy,
24 12 ghutchis 
   input               lro_drdy,
25 
 
26 
   output              rarb_req,
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   input               rarb_ack
28 5 ghutchis 
   );
29 
 
30 16 ghutchis 
  reg [5:0]            state, nxt_state;
31 5 ghutchis 
 
32 
  wire [`NUM_PORTS-1:0] port_mask;
33 11 ghutchis 
  wire [`NUM_PORTS-1:0] nxt_pe_vec = lri_data[`PRW_DATA] & ~port_mask;
34 5 ghutchis 
 
35 
  assign port_mask = 1 << portnum;
36 
 
37 8 ghutchis 
  localparam s_idle = 0,
38 
             s_rfwd = 1,
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             s_rcopy = 2,
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             s_rsink = 3,
41 13 ghutchis 
             s_tdata = 4,
42 
              s_tdrop = 5;
43 8 ghutchis 
  localparam ns_idle = 1,
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             ns_rfwd = 2,
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             ns_rcopy = 4,
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             ns_rsink = 8,
47 13 ghutchis 
             ns_tdata = 16,
48 
    ns_tdrop = 32;
49 12 ghutchis 
 
50 
  assign rarb_req = lfli_srdy & lprx_srdy | state[s_tdata];
51 5 ghutchis 
 
52 
  always @*
53 
    begin
54 
      lro_data = lri_data;
55 8 ghutchis 
      lptx_data = lri_data;
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      lfli_drdy = 0;
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      lprx_drdy = 0;
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      lptx_srdy = 0;
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      lri_drdy  = 0;
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      lro_srdy  = 0;
61 12 ghutchis 
      nxt_state = state;
62 5 ghutchis 
 
63 
      case (1'b1)
64 
        state[s_idle] :
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          begin
66 12 ghutchis 
            if (lfli_srdy & lprx_srdy & rarb_ack)
67 5 ghutchis 
              begin
68 8 ghutchis 
                if (lfli_data != 0)
69 
                  begin
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                    lro_data = 0;
71 
                    lro_data[`PRW_PVEC] = 1;
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                    lro_data[`PRW_DATA] = lfli_data;
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                    if (lro_drdy)
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                      begin
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                        lfli_drdy = 1;
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                        lro_srdy = 1;
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                        nxt_state = ns_tdata;
78 
                      end
79 
                  end
80 
                else
81 13 ghutchis 
                  begin
82 
                    lfli_drdy = 1;
83 
                    nxt_state = ns_tdrop;
84 
                  end
85 5 ghutchis 
              end
86 
            else if (lri_srdy)
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              begin
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                if (lri_data[`PRW_DATA] & port_mask)
89 
                  begin
90 
                    // packet is for our port
91 11 ghutchis 
                    //nxt_pe_vec = lri_data[`PRW_DATA] & ~port_mask;
92 5 ghutchis 
 
93 
                    // if enable vector is not empty, send the
94 
                    // vector to the next port
95 
                    if ((nxt_pe_vec != 0) & lro_drdy)
96 
                      begin
97 
                        lro_data[`PRW_DATA] = nxt_pe_vec;
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                        lro_data[`PRW_PVEC] = 1;
99 
                        lro_srdy = 1;
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                        lri_drdy = 1;
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                        nxt_state = ns_rcopy;
102 
                      end
103 11 ghutchis 
                    else if (nxt_pe_vec == 0)
104 5 ghutchis 
                      begin
105 
                        lri_drdy = 1;
106 
                        nxt_state = ns_rsink;
107 
                      end // else: !if((nxt_pe_vec != 0) & lro_drdy)
108 
                  end // if (lri_data[`PRW_DATA] & port_mask)
109 
                else
110 
                  // packet is not for our port, forward it on the
111 
                  // ring
112 
                  begin
113 
                    if (lro_drdy)
114 
                      begin
115 
                        lri_drdy = 1;
116 
                        lro_srdy = 1;
117 
                        nxt_state = ns_rfwd;
118 
                      end
119 
                  end // else: !if(lri_data[`PRW_DATA] & port_mask)
120 
              end // if (lri_srdy)
121 
          end // case: state[s_idle]
122 
 
123 8 ghutchis 
        // transmit data from port on to the ring
124 
        state[s_tdata] :
125 
          begin
126 
            lro_data = lprx_data;
127 
            lro_data[`PRW_PVEC] = 0;
128 
            if (lro_drdy & lprx_srdy)
129 
              begin
130 
                lprx_drdy = 1;
131 
                lro_srdy  = 1;
132 
                if ((lprx_data[`PRW_PCC] == `PCC_EOP) |
133 
                    (lprx_data[`PRW_PCC] == `PCC_BADEOP))
134 
                  nxt_state = ns_idle;
135 
              end
136 
          end // case: state[s_tdata]
137 
 
138 13 ghutchis 
        // received lookup from FIB with zero port index; drop
139 
        // the packet by reading out
140 
        state[s_tdrop] :
141 
          begin
142 
            lprx_drdy = 1;
143 
            if (lprx_srdy)
144 
              begin
145 
                if ((lprx_data[`PRW_PCC] == `PCC_EOP) |
146 
                    (lprx_data[`PRW_PCC] == `PCC_BADEOP))
147 
                  nxt_state = ns_idle;
148 
              end
149 
          end
150 
 
151 8 ghutchis 
        // data on ring is for our port as well as further ports
152 
        // copy ring data to our TX buffer as well as on the ring
153 
        state[s_rcopy] :
154 
          begin
155 
            lro_data = lri_data;
156 
            lptx_data = lri_data[`PFW_SZ-1:0];
157 
            if (lri_srdy & lro_drdy & lptx_drdy)
158 
              begin
159 
                lri_drdy = 1;
160 
                lro_srdy = 1;
161 
                lptx_srdy = 1;
162 
                if ((lri_data[`PRW_PCC] == `PCC_EOP) |
163 
                    (lri_data[`PRW_PCC] == `PCC_BADEOP))
164 
                  nxt_state = ns_idle;
165 
              end
166 
          end
167 
 
168 
        // data on ring is not for our port, copy from ring in to ring out
169 
        state[s_rfwd] :
170 
          begin
171 
            lro_data = lri_data;
172 
            if (lri_srdy & lro_drdy)
173 
              begin
174 
                lri_drdy = 1;
175 
                lro_srdy = 1;
176 
                if ((lri_data[`PRW_PCC] == `PCC_EOP) |
177 
                    (lri_data[`PRW_PCC] == `PCC_BADEOP))
178 
                  nxt_state = ns_idle;
179 
              end
180 
          end
181 
 
182 
        // data on ring is for our port and we are the last port
183 
        // copy ring data to our TX buffer but do not copy to ring
184 11 ghutchis 
        state[s_rsink] :
185 8 ghutchis 
          begin
186 
            lptx_data = lri_data[`PFW_SZ-1:0];
187 
            if (lri_srdy & lptx_drdy)
188 
              begin
189 
                lri_drdy = 1;
190 
                lptx_srdy = 1;
191 
                if ((lri_data[`PRW_PCC] == `PCC_EOP) |
192 
                    (lri_data[`PRW_PCC] == `PCC_BADEOP))
193 
                  nxt_state = ns_idle;
194 
              end
195 
          end
196 
 
197 5 ghutchis 
        default : nxt_state = ns_idle;
198 
      endcase // case (1'b1)
199 
    end // always @ *
200 8 ghutchis 
 
201 
  always @(posedge clk)
202 
    begin
203 
      if (reset)
204 
        begin
205 
          state <= #1 1;
206 
          /*AUTORESET*/
207 
        end
208 
      else
209 
        begin
210 
          state <= #1 nxt_state;
211 
        end
212 
    end // always @ (posedge clk)
213 
 
214 5 ghutchis 
 
215 
 
216 
endmodule // port_ring_tap_fsm

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