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[/] [rtl/] [globals.vh] - Blame information for rev 11

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1 11 rafaelcalc
//////////////////////////////////////////////////////////////////////////////////
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// Engineer: Rafael de Oliveira Calçada (rafaelcalcada@gmail.com) 
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// 
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// Create Date: 30.03.2020 17:28:42
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// Module Name: -
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// Project Name: Steel 
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// Description: Steel Core global definitions
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// 
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// Dependencies: -
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// 
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// Revision:
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// Revision 5.01 - Refactoring #5
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// 
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//////////////////////////////////////////////////////////////////////////////////
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/*********************************************************************************
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MIT License
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Copyright (c) 2020 Rafael de Oliveira Calçada
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in all
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copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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********************************************************************************/
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`ifndef GLOBALS_H
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`define GLOBALS_H
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// CSR registers reset values
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`define MCYCLE_RESET        32'h00000000
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`define TIME_RESET          32'h00000000
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`define MINSTRET_RESET      32'h00000000
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`define MCYCLEH_RESET       32'h00000000
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`define TIMEH_RESET         32'h00000000
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`define MINSTRETH_RESET     32'h00000000
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`define MTVEC_BASE_RESET    30'b00000000_00000000_00000000_000000
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`define MTVEC_MODE_RESET    2'b00
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`define MSCRATCH_RESET      32'h00000000
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`define MEPC_RESET          32'h00000000
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`define MCOUNTINHIBIT_CY_RESET  1'b0
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`define MCOUNTINHIBIT_IR_RESET  1'b0
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// -------------------------------------------------------------------------------
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// WARNING: ALL VALUES BELOW MUST NOT BE MODIFIED
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// -------------------------------------------------------------------------------
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// Implemented instructions opcodes
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`define NOP_INSTR           32'b000000000000_00000_000_00000_0010011
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`define OPCODE_OP           5'b01100
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`define OPCODE_OP_IMM       5'b00100
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`define OPCODE_LOAD         5'b00000
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`define OPCODE_STORE        5'b01000
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`define OPCODE_BRANCH       5'b11000
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`define OPCODE_JAL          5'b11011
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`define OPCODE_JALR         5'b11001
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`define OPCODE_LUI          5'b01101
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`define OPCODE_AUIPC        5'b00101
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`define OPCODE_MISC_MEM     5'b00011
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`define OPCODE_SYSTEM       5'b11100
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// funct7 and funct3 for logic and arithmetic instructions
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`define FUNCT7_SUB          7'b0100000
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`define FUNCT7_SRA          7'b0100000
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`define FUNCT7_ADD          7'b0000000
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`define FUNCT7_SLT          7'b0000000
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`define FUNCT7_SLTU         7'b0000000
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`define FUNCT7_AND          7'b0000000
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`define FUNCT7_OR           7'b0000000
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`define FUNCT7_XOR          7'b0000000
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`define FUNCT7_SLL          7'b0000000
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`define FUNCT7_SRL          7'b0000000
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`define FUNCT7_SRAI         7'b0100000
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`define FUNCT7_ADDI         7'bxxxxxxx
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`define FUNCT7_SLTI         7'bxxxxxxx
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`define FUNCT7_SLTIU        7'bxxxxxxx
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`define FUNCT7_ANDI         7'bxxxxxxx
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`define FUNCT7_ORI          7'bxxxxxxx
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`define FUNCT7_XORI         7'bxxxxxxx
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`define FUNCT7_SLLI         7'b0000000
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`define FUNCT7_SRLI         7'b0000000
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`define FUNCT3_ADD          3'b000
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`define FUNCT3_SUB          3'b000
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`define FUNCT3_SLT          3'b010
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`define FUNCT3_SLTU         3'b011
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`define FUNCT3_AND          3'b111
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`define FUNCT3_OR           3'b110
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`define FUNCT3_XOR          3'b100
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`define FUNCT3_SLL          3'b001
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`define FUNCT3_SRL          3'b101
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`define FUNCT3_SRA          3'b101
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// ALU operations encoding
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`define ALU_ADD          4'b0000
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`define ALU_SUB          4'b1000
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`define ALU_SLT          4'b0010
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`define ALU_SLTU         4'b0011
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`define ALU_AND          4'b0111
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`define ALU_OR           4'b0110
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`define ALU_XOR          4'b0100
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`define ALU_SLL          4'b0001
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`define ALU_SRL          4'b0101
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`define ALU_SRA          4'b1101
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// funct7 and funct3 for other instructions
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`define FUNCT7_ECALL        7'b0000000
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`define FUNCT7_EBREAK       7'b0000000
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`define FUNCT7_MRET         7'B0011000
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`define FUNCT3_CSRRW        3'b001
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`define FUNCT3_CSRRS        3'b010
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`define FUNCT3_CSRRC        3'b011
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`define FUNCT3_CSRRWI       3'b101
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`define FUNCT3_CSRRSI       3'b110
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`define FUNCT3_CSRRCI       3'b111
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`define FUNCT3_BEQ          3'b000
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`define FUNCT3_BNE          3'b001
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`define FUNCT3_BLT          3'b100
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`define FUNCT3_BGE          3'b101
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`define FUNCT3_BLTU         3'b110
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`define FUNCT3_BGEU         3'b111
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`define FUNCT3_ECALL        3'b000
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`define FUNCT3_EBREAK       3'b000
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`define FUNCT3_MRET         3'b000
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`define FUNCT3_WFI          3'b000
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`define FUNCT3_BYTE         3'b000
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`define FUNCT3_HALF         3'b001
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`define FUNCT3_WORD         3'b010
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`define FUNCT3_BYTE_U       3'b100
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`define FUNCT3_HALF_U       3'b101
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// rd, rs1 and rs2 values for SYSTEM instructions
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`define RS1_ECALL           5'b00000
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`define RS1_EBREAK          5'b00000
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`define RS1_MRET            5'b00000
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`define RS1_WFI             5'b00000
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`define RS2_ECALL           5'b00000
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`define RS2_EBREAK          5'b00001
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`define RS2_MRET            5'b00010
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`define RS2_WFI             5'b00101
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`define RD_ECALL            5'b00000
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`define RD_EBREAK           5'b00000
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`define RD_MRET             5'b00000
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`define RD_WFI              5'b00000
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// writeback selection
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`define WB_ALU                 3'b000
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`define WB_LU                  3'b001
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`define WB_IMM                 3'b010
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`define WB_IADDER_OUT          3'b011
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`define WB_CSR                 3'b100
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`define WB_PC_PLUS             3'b101
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// immediate format selection
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`define R_TYPE              3'b000
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`define I_TYPE              3'b001
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`define S_TYPE              3'b010
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`define B_TYPE              3'b011
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`define U_TYPE              3'b100
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`define J_TYPE              3'b101
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`define CSR_TYPE            3'b110
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// PC MUX selection
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`define PC_BOOT             2'b00
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`define PC_EPC              2'b01
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`define PC_TRAP             2'b10
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`define PC_NEXT             2'b11
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// mask for byte-writes
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`define WR_MASK_BYTE          4'b0001
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`define WR_MASK_HALF          4'b0011
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`define WR_MASK_WORD          4'b1111
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// load unit control encoding
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`define LOAD_BYTE          2'b00
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`define LOAD_HALF          2'b01
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`define LOAD_WORD          2'b10
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// CSR File operation encoding
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`define CSR_NOP            2'b00
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`define CSR_RW             2'b01
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`define CSR_RS             2'b10
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`define CSR_RC             2'b11
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// CSR ADDRESSES ----------------------------
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// Performance Counters
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`define CYCLE           12'hC00
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`define TIME            12'hC01
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`define INSTRET         12'hC02
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`define CYCLEH          12'hC80
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`define TIMEH           12'hC81
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`define INSTRETH        12'hC82
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// Machine Trap Setup
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`define MSTATUS         12'h300
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`define MISA            12'h301
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`define MIE             12'h304
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`define MTVEC           12'h305
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// Machine Trap Handling
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`define MSCRATCH        12'h340
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`define MEPC            12'h341
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`define MCAUSE          12'h342
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`define MTVAL           12'h343
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`define MIP             12'h344
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// Machine Counter / Timers
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`define MCYCLE          12'hB00
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`define MINSTRET        12'hB02
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`define MCYCLEH         12'hB80
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`define MINSTRETH       12'hB82
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// Machine Counter Setup
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`define MCOUNTINHIBIT   12'h320
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`endif

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