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[/] [vivado/] [steel-core.srcs/] [sim_1/] [imports/] [steel-core/] [rtl/] [bench/] [tb_alu.v] - Blame information for rev 11

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1 11 rafaelcalc
//////////////////////////////////////////////////////////////////////////////////
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// Engineer: Rafael de Oliveira Calçada (rafaelcalcada@gmail.com)
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// 
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// Create Date: 03.04.2020 18:35:35
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// Module Name: tb_alu
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// Project Name: Steel Core
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// Description: ALU testbench
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// 
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// Dependencies: globals.vh
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//               alu.v
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// 
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// Version 0.01
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// 
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//////////////////////////////////////////////////////////////////////////////////
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/*********************************************************************************
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MIT License
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Copyright (c) 2020 Rafael de Oliveira Calçada
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in all
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copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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********************************************************************************/
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`timescale 1ns / 1ps
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`include "../globals.vh"
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module tb_alu();
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    reg [31:0] OP_1;
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    reg [31:0] OP_2;
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    reg [3:0] OPCODE;
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    wire [31:0] RESULT;
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    alu dut(
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        .OP_1(          OP_1),
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        .OP_2(          OP_2),
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        .OPCODE(      OPCODE),
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        .RESULT(      RESULT)
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    );
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    reg [31:0] expected_result;
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    integer i;
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    initial
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    begin
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        $display("Testing ALU...");
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        $display("Executing extreme values test for ADD and SUB operations...");
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        OP_1 = 32'h00000001; // decimal = 1
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        OP_2 = 32'h7FFFFFFF; // the biggest positive decimal
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        OPCODE = `ALU_ADD;
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        expected_result = 32'h80000000; // the lowest negative decimal
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        #10;
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        if (RESULT != expected_result)
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            begin
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                $display("FAIL. Check the results.");
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                $finish;
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            end
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        OP_1 = 32'h80000000; // the lowest negative decimal
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        OP_2 = 32'h00000001; // decimal = 1
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        OPCODE = `ALU_SUB;
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        expected_result = 32'h7FFFFFFF; // the biggest positive decimal
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        #10;
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        if (RESULT != expected_result)
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            begin
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                $display("FAIL. Check the results.");
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                $finish;
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            end
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        OP_1 = 32'h00000000; // decimal = 0
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        OP_2 = 32'h00000001; // decimal = 1
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        OPCODE = `ALU_SUB;
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        expected_result = 32'hFFFFFFFF; // decimal = -1
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        #10;
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        if (RESULT != expected_result)
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            begin
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                $display("FAIL. Check the results.");
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                $finish;
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            end
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        OP_1 = 32'hFFFFFFFF; // decimal = -1
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        OP_2 = 32'h00000001; // decimal = 1
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        OPCODE = `ALU_ADD;
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        expected_result = 32'h00000000; // decimal = 0
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        #10;
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        if (RESULT != expected_result)
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            begin
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                $display("FAIL. Check the results.");
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                $finish;
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            end
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        OP_1 = 32'h00000001; // decimal = 1
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        OP_2 = 32'hFFFFFFFF; // decimal = -1
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        OPCODE = `ALU_ADD;
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        expected_result = 32'h00000000; // decimal = 0
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        #10;
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        if (RESULT != expected_result)
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            begin
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                $display("FAIL. Check the results.");
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                $finish;
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            end
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        OP_1 = 32'h00000001; // decimal = 1
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        OP_2 = 32'hFFFFFFFF; // decimal = -1
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        OPCODE = `ALU_SUB;
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        expected_result = 32'h00000002; // decimal = 2
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        #10;
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        if (RESULT != expected_result)
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            begin
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                $display("FAIL. Check the results.");
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                $finish;
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            end
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        OP_1 = 32'hFFFFFFFF; // decimal = -1
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        OP_2 = 32'h00000001; // decimal = 1
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        OPCODE = `ALU_SUB;
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        expected_result = 32'hFFFFFFFE; // decimal = -2
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        #10;
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        if (RESULT != expected_result)
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            begin
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                $display("FAIL. Check the results.");
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                $finish;
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            end
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        $display("Test successful.");
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        $display("Testing 10000 pseudorandom values for all operations...");
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        $display("Testing ADD operation...");
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            OPCODE = `ALU_ADD;
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            for(i = 0; i < 10000; i=i+1)
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            begin
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                OP_1 = $random;
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                OP_2 = $random;
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                #10;
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                expected_result = OP_1 + OP_2;
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                if (RESULT != expected_result)
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                begin
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                    $display("FAIL. Check the results.");
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                    $finish;
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                end
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            end
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        $display("ADD operation successfully tested.");
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        $display("Testing SUB operation...");
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            OPCODE = `ALU_SUB;
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            for(i = 0; i < 10000; i=i+1)
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            begin
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                OP_1 = $random;
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                OP_2 = $random;
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                #10;
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                expected_result = OP_1 - OP_2;
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                if (RESULT != expected_result)
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                begin
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                    $display("FAIL. Check the results.");
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                    $finish;
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                end
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            end
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        $display("SUB operation successfully tested.");
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        $display("Testing SLTU operation...");
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            OPCODE = `ALU_SLTU;
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            for(i = 0; i < 10000; i=i+1)
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            begin
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                OP_1 = $random;
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                OP_2 = $random;
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                #10;
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                expected_result = {31'b0, OP_1 < OP_2};
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                if (RESULT != expected_result)
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                begin
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                    $display("FAIL. Check the results.");
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                    $finish;
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                end
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            end
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        $display("SLTU operation successfully tested.");
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        $display("Testing SLT operation...");
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            OPCODE = `ALU_SLT;
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            for(i = 0; i < 10000; i=i+1)
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            begin
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                OP_1 = $random;
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                OP_2 = $random;
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                #10;
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                expected_result = {31'b0, $signed(OP_1) < $signed(OP_2)};
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                if (RESULT != expected_result)
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                begin
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                    $display("FAIL. Check the results.");
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                    $finish;
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                end
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            end
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        $display("SLT operation successfully tested.");
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        $display("Testing AND operation...");
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            OPCODE = `ALU_AND;
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            for(i = 0; i < 10000; i=i+1)
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            begin
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                OP_1 = $random;
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                OP_2 = $random;
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                #10;
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                expected_result = OP_1 & OP_2;
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                if (RESULT != expected_result)
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                begin
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                    $display("FAIL. Check the results.");
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                    $finish;
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                end
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            end
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        $display("AND operation successfully tested.");
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        $display("Testing OR operation...");
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            OPCODE = `ALU_OR;
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            for(i = 0; i < 10000; i=i+1)
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            begin
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                OP_1 = $random;
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                OP_2 = $random;
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                #10;
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                expected_result = OP_1 | OP_2;
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                if (RESULT != expected_result)
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                begin
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                    $display("FAIL. Check the results.");
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                    $finish;
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                end
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            end
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        $display("OR operation successfully tested.");
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        $display("Testing XOR operation...");
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            OPCODE = `ALU_XOR;
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            for(i = 0; i < 10000; i=i+1)
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            begin
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                OP_1 = $random;
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                OP_2 = $random;
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                #10;
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                expected_result = OP_1 ^ OP_2;
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                if (RESULT != expected_result)
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                begin
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                    $display("FAIL. Check the results.");
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                    $finish;
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                end
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            end
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        $display("XOR operation successfully tested.");
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        $display("Testing SLL operation...");
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            OPCODE = `ALU_SLL;
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            for(i = 0; i < 10000; i=i+1)
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            begin
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                OP_1 = $random;
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                OP_2 = $random;
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                #10;
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                expected_result = OP_1 << OP_2[4:0];
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                if (RESULT != expected_result)
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                begin
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                    $display("FAIL. Check the results.");
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                    $finish;
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                end
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            end
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        $display("SLL operation successfully tested.");
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        $display("Testing SRL operation...");
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            OPCODE = `ALU_SRL;
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            for(i = 0; i < 10000; i=i+1)
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            begin
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                OP_1 = $random;
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                OP_2 = $random;
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                #10;
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                expected_result = OP_1 >> OP_2[4:0];
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                if (RESULT != expected_result)
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                begin
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                    $display("FAIL. Check the results.");
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                    $finish;
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                end
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            end
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        $display("SRL operation successfully tested.");
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        $display("Testing SRA operation...");
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            OPCODE = `ALU_SRA;
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            for(i = 0; i < 10000; i=i+1)
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            begin
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                OP_1 = $random;
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                OP_2 = $random;
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                #10;
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                expected_result = $signed(OP_1) >>> OP_2[4:0];
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                if (RESULT != expected_result)
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                begin
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                    $display("FAIL. Check the results.");
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                    $finish;
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                end
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            end
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        $display("SRA operation successfully tested.");
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        $display("All ALU operations successfully tested for pseudorandom values.");
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        $display("ALU successfully tested.");
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    end
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endmodule

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