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##-------------------------------------------------------------------------------
##                     Copyright 2019 Ken Campbell
##
##   Licensed under the Apache License, Version 2.0 (the "License");
##   you may not use this file except in compliance with the License.
##   You may obtain a copy of the License at
##
##     http://www.apache.org/licenses/LICENSE-2.0
##
##   Unless required by applicable law or agreed to in writing, software
##   distributed under the License is distributed on an "AS IS" BASIS,
##   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
##   See the License for the specific language governing permissions and
##   limitations under the License.
##-------------------------------------------------------------------------------
##-- $Author:  $ Ken Campbell
##-- $Date:  $ April 2019
##-- $Id:  $
##-- $Source:  $
##-- Description :
##--      This application takes a text file containing the definition of a Verilog
##--         module, produces a file set for the SV Directed Test Bench.
##--      This file is the parser and generator.
##--         The parser is a simple one, in that it is not able to provide reliable
##--         code generation for all possible syntax.  It is intended that it will
##--         generate good code if the module I/O are defined like shown in the examples.
##--
##--         If you intend to generate many TB, and this parser is not quite what you
##--         need, feel free to modify it for your needs.  There are ample comments
##--         and left over puts statements that should help with any efforts to 
##--         modify the parser.
##------------------------------------------------------------------------------
 
#################################################################
##  parse out the pin definitions from the list of raw pins text from the module.
##    input :  list of strings containing pin definitions.
##    output :  list of list of pin properties.
##           three lists are output, each designed to provide information for
##           the generation process.  
proc pars_pindef { pins } {
    set pdef  {}
    set def_lst  {}
    set lc 0
 
    set logic_lst {}
    set dut_modport {}
    set names_lst {}
 
    foreach l $pins {
        set is_mult [string first "," $l]
        set is_bv   [string first "\[" $l]
        set l [string trim $l "\;"]
        #puts $l
        #handle precompile
        set ispre [string first "`" $l]
        if {$ispre >= 0} {
            if {[string first "timescale" $l] >= 0} {
                continue
            }
            lappend names_lst $l
            lappend logic_lst $l
            lappend dut_modport $l
            continue
        }
        ##  if is a vector def
        #puts "is_bv:  $is_bv"
        if {$is_bv > 0} {
 
            set is_cbv [string last "\]" $l]
            set bv_spec [string range $l $is_bv $is_cbv]
            set type [string range $l 0 $is_bv-1]
            set names [string range $l $is_cbv+1 end]
            set snames [split $names ","]
            foreach n $snames {
                #puts $n
                set sn [string trim $n]
                if {$sn == ""} {
                    break
                }
                lappend names_lst [string trim $n]
                if {$type != "inout"} {
                    set tmp "logic "
                } else {
                    set tmp "wire "
                }
                append tmp $bv_spec " [string trim $n]\;"
                lappend logic_lst $tmp
                set tmp [string trim $type]
                append tmp " [string trim $n],"
                lappend dut_modport $tmp
            }
        } else {
            #puts $l
            set sl [split $l ","]
            set frst [split [lindex $sl 0]]
            set type [string trim [lindex $frst 0]]
            ## get the pin type from the def.
            set tmp ""
            foreach pt [lrange $frst 1 end] {
                if {$pt != ""} {
                    if {$pt == "var"} {
                        set tmp "$pt "
                    }  else {
                        append tmp $pt
                        set pin_type $tmp
                        break
                    }
                }
            }
            #puts $pin_type
            set fname [string trim [lindex $frst end]]
            set sl [lrange $sl 1 end]
            lappend names_lst [string trim $fname]
            if {$type != "inout"} {
                set tmp "$pin_type "
            } else {
                set tmp "wire "
            }
            #set tmp "logic "
            append tmp "$fname\;"
            lappend logic_lst $tmp
            set tmp $type
            append tmp " $fname,"
            lappend dut_modport $tmp
            foreach n $sl {
                if {$n == ""} {
                    continue
                }
                #puts $n
                lappend names_lst [string trim $n]
                if {$type != "inout"} {
                    set tmp "logic "
                } else {
                    set tmp "wire "
                }
                append tmp "[string trim $n]\;"
                lappend logic_lst $tmp
                set tmp $type
                append tmp " [string trim $n],"
                lappend dut_modport $tmp
            }
        }
    }
 
    lappend def_lst $logic_lst
    lappend def_lst $dut_modport
    lappend def_lst $names_lst
 
    return $def_lst
}
##  end pars_pindef
 
##-------------------------------------------------------------------------------
##  pars parameters 
proc pars_params {plst} {
    set rtn {}
    foreach p $plst {
        set sp [split [string trim $p ","] " "]
        set tmp [lindex $sp 1]
        lappend tmp [lindex $sp end]
        lappend rtn $tmp
    }
    return $rtn
}
##  end  pars_params
##--------------------------------------------------------------------------------
##  Write header to file passed
##    if you intend to use this tool many times and it matters
##    mod this section to output the header as required.
proc write_header { handle } {
    global version
    ##global scan_date
    set raw_date [clock scan now]
    set scan_date [clock format $raw_date -format "%d %b %Y %T"]
 
    ## so CVS will not modify selections, they have to be chopped up
    set auth "// \$Auth"
    append auth "or:  \$"
 
    puts $handle "///////////////////////////////////////////////////////////////////////////////"
    puts $handle "//             Copyright ///////////////////////////////////"
    puts $handle "//                        All Rights Reserved"
    puts $handle "///////////////////////////////////////////////////////////////////////////////"
    puts $handle "$auth"
    puts $handle "//"
    puts $handle "//"
    puts $handle "// Description :"
    puts $handle "//          This file was generated by SV TB Gen $version"
    puts $handle "//            on $scan_date"
    puts $handle "//////////////////////////////////////////////////////////////////////////////"
    puts $handle "// This software contains concepts confidential to ////////////////"
    puts $handle "// /////////. and is only made available within the terms of a written"
    puts $handle "// agreement."
    puts $handle "///////////////////////////////////////////////////////////////////////////////"
    puts $handle ""
  }
 
#####################################################################
##  A directory has been selected now fill the list win with *V files
proc fill_list {} {
    global ent_dir odir
    global use_list list_win ts_ent statsVar
    global view_win mo_sel sel_lst list_ent
 
    ## get the user selection
    browsed_from_set $ent_dir $ent_dir
    ## as a default make output dir = input dir
    set tmp_dir [$ent_dir get]
    $odir delete 0 end
    $odir insert end $tmp_dir
    $odir configure -state readonly
 
    ## clear the list window and selection
    $list_win delete 0 end
    $list_ent delete 0 end
    #$list_win clear selection
    $view_win delet 0.0 end
    ## get the working directory
    set dir [$ent_dir get]
    ## get the list of SV & v files in working directory
    set ftype ".*v"
    set file_lst ""
    set are_files [catch {glob -directory $dir *$ftype} rtn_code]
    if {$are_files == 0} {
        set file_lst [glob -directory $dir *$ftype]
    } else {
        return
    }
    #puts $file_lst
    ##  for each of the files in the file_lst
    foreach l $file_lst {
        ## creat string that is just the file name: no path
        #puts "File : $l"
        set testt $l
        set nstart [string last "/" $l]
        incr nstart
        #puts "Index : $nstart"
        set name_str [string range $l $nstart end]
        set sel_lst [lappend sel_lst $name_str]
        #puts $sel_lst
    }
}
 
######################################################################
##   click on the  listbox  process it.
proc process_selected {} {
    global list_win m_select
 
    set sz [$list_win size]
    #puts $sz
    if {$sz > 0} {
        set sel_dx [$list_win curselection]
        set m_select [$list_win get $sel_dx]
        load_ent_file
    } else {
    }
}
 
######################################################################
##  load the vhdl file that has just been selected from list_win
proc load_ent_file {} {
    global ent_dir list_win view_win statsVar gen_prog
 
    set gen_prog 0.0
    ## update selection with selected item
    set sel_dx [$list_win curselection]
    if {$sel_dx == ""} {
        return
    }
    ## recover the selected item
    set ln [$list_win get $sel_dx]
    ##  Get the working directory
    #puts $ln
    set lp [$ent_dir get]
    ##  append the file name
    append lp "/" $ln
    ## if the file does not exist  return
    set fexist [file exist $lp]
    if {$fexist == 0} {
        return
    }
    set ent_file [open $lp r]
    ## clear the view_win
    $view_win delete 1.0 end
    set file_list {}
    ## load file to memory
    while {![eof $ent_file]} {
        ##  Get a line
        set rline [gets $ent_file]
        lappend file_list $rline
    }
    close $ent_file
    ## put file in text window and highlite the module part
    set ent_found 0
    set in_ent 0
    set statsVar ""
    foreach l $file_list {
        if {$in_ent == 0} {
            set ent_def [string first module $l]
            ## Make crazy assumption the module def is in the first few chars.
            if {$ent_def >= 0 && $ent_def <= 6} {
                set ent_name [lindex $l 1]
                set statsVar "Module:  $ent_name found"
                set ent_found 1
                set in_ent 1
                $view_win insert end "$l\n" highlite
            } else {
                $view_win insert end "$l\n"
            }
        } else {
            set ent_def [string first "endmodule" $l]
            if {$ent_def >= 0} {
                set end_name [lindex $l 1]
                set end_found 1
                set in_ent 0
                $view_win insert end "$l\n" highlite
            } else {
                $view_win insert end "$l\n" highlite
            }
        }
    }
    if {$ent_found == 0} {
        set statsVar "No Module found!!"
    }
}
 
#########################################################################
##  The main generator proc
proc ttb_gen {} {
    global mo_sel template ent_dir list_win odir p_view tdir
    global cpakv gbatv gen_prog comb_val m_select
 
    set template [$tdir get]
 
    $p_view configure -maximum 7
    set gen_prog 1.0
    ## recover the selected item
    set ln $m_select
    ##  Get the working directory
    #puts $ln
    set lp [$ent_dir get]
    ##  append the file name
    append lp "/" $ln
 
    set path_text $lp
    set destin_text [$odir get]
    set infile [open $path_text r]
    set file_list {}
 
    set bl_comm 0;   ##  block comment indication.
##################################################################
##  Read in the file and strip comments as we do
    while {![eof $infile]} {
        ##  Get a line
        set rline [gets $infile]
        #puts $rline
        ## get rid of white space
        set rline [string trim $rline]
        ##  Find comment if there
        set cindex [string first "//" $rline]
        ##  Block comments.
        set bcomm_s [string first "/*" $rline]
        set bcomm_e [string first "*/" $rline]
        ##  this will break if  block start  after some code ...
        if {$bcomm_s >= 0} {
            set bl_comm 1
            continue
        }
        if {$bcomm_s == 1} {
            if {$bcomm_e >= 0} {
                set bl_comm 0
            }
            continue
        }
        ## if a comment was found at the start of the line
        if {$cindex == 0 || $rline == ""} {
            continue
        ## else if comment somewhere in the line
        } elseif {$cindex > 0} {
            #  get rid of trailing comments and trim off spaces
            set rline [string trim [string range $rline 0 $cindex-1]]
            lappend file_list $rline
        ## else was not found so put line in list
        } else {
            lappend file_list $rline
        }
    }
    close $infile
 
 
    #foreach l $file_list {
    #    puts $l
    #}
    #return
 
    #$p_view step
    ## check for the module def
    set mod_name ""
    foreach l $file_list {
        set mod_def [string first module $l]
        if {$mod_def >= 0} {
            set ml [split $l]
            set mod_name [lindex $l 1]
            break
        }
    }
 
    #puts "Module name is: $mod_name"
    ## if no ent  die
    if {$mod_def < 0} {
        dbg_msg "A module definition was not found in the file provided."
        return
        ##  exit
    }
    #$p_view step
    set mod_list {}
    ## check for end module
    foreach l $file_list {
        lappend mod_list $l
        set end_def [string first endmodule $l]
        if {$end_def >= 0} {
            break
        }
    }
    ## if no end die
    if {$end_def < 0} {
        dbg_msg "no endmodule statement found for this module"
        return
        ##  exit
    }
    ####
    ## collect the parameters if there are.
    set parameter_list {}
    set p_found 0
    foreach l $mod_list {
        set p_found [string first "parameter" $l]
        if {$p_found >= 0} {
            lappend parameter_list $l
        }
    }
    #foreach pl $parameter_list {
    #    puts $pl
    #}
    ##  inc the progress bar
    set gen_prog 2.0
    #foreach l $mod_list {
    #    puts $l
    #}
    ####################################################################
    ##  a few checks have been done, and non-relevant stuff stripped off.
    ##  now create an arrry of just the pin names and related info
    set port_lst {}
    set import_lst {}
    set lc 0
    foreach l $mod_list {
        ## make lines that are continued, one line.
        set cont [string first "\;" $l]
        ## look for the port statements
        set inp [string first "input " $l]
        if {$inp >= 0} {
            lappend port_lst $l
        }
        set onp [string first "output " $l]
        if {$onp >= 0} {
            lappend port_lst $l
        }
        set ionp [string first "inout " $l]
        if {$ionp >= 0} {
            lappend port_lst $l
        }
        set tick_dir [string first "`" $l]
        if {$tick_dir >= 0} {
            lappend port_lst $l
        }
        set is_import [string first "import" $l]
        if {$is_import >= 0} {
            lappend import_lst $l
        }
        set end_pins [string first "\)\;" $l]
        set end_len [string length $l]
        if {$end_pins >= 0 && $end_len >= 2} {
            set stl [string trim $l "\)\;"]
            if {$stl != ""} {
                lappend port_lst $l
            }
            break
        }
    }
 
    #foreach p $port_lst {
    #    puts $p
    #}
    #return
    ##  Change the port list into a pin info list of lists
    set io_pins [pars_pindef $port_lst]
    ##  get the lists
    set log_lst [lindex $io_pins 0]
    set mod_lst [lindex $io_pins 1]
    set name_lst [lindex $io_pins 2]
 
    #foreach r $log_lst {
    #    puts $r
    #}
    #foreach r $mod_lst {
    #    puts $r
    #}
    #foreach r $name_lst {
    #    puts $r
    #}
    #return
    ##########################################
    ##  if there are parameters.
    if {[llength $parameter_list] > 0} {
        set param_lst [pars_params $parameter_list]
    }
 
    #foreach l $param_lst {
    #    puts $l
    #}
 
    # dbg_msg $split_pin
    ## calculate the longest pin name in characters
    set name_length 0
    foreach l $name_lst {
        set temp_length [string length $l]
        if {$temp_length > $name_length} {
            set name_length $temp_length
        }
    }
    #dbg_msg $name_length
    ##  Make the name length one bigger
    incr name_length
 
    ##  inc the progress bar
    set gen_prog 3.0
#########################################################################
## Generate the tb top.
    set tfn $destin_text
    append tfn "/tb_top.sv"
    set tfh [open $tfn w]
 
    write_header $tfh
    puts $tfh "`include \"../sv/tb_mod.sv\""
    puts $tfh ""
    puts $tfh "module tb_top \(\)\;"
    puts $tfh ""
    puts $tfh "  string STM_FILE = \"../stm/stimulus_file.stm\"\;"
    puts $tfh "  string tmp_fn;"
    puts $tfh ""
    puts $tfh "  //  Handle plus args"
    puts $tfh "  initial begin : file_select"
    puts $tfh "    if\(\$value\$plusargs\(\"STM_FILE=%s\", tmp_fn\)\) begin"
    puts $tfh "      STM_FILE = tmp_fn\;"
    puts $tfh "    end"
    puts $tfh "  end"
    puts $tfh ""
    puts $tfh "  dut_if theif\(\)\;"
    puts $tfh ""
    ## handle parameters.
    if {[llength $param_lst] == 0} {
        puts $tfh "  $mod_name u1 \("
    } else {
        puts $tfh "  $mod_name"
        puts $tfh "  \#\("
        set llen [llength $param_lst]
        set idx 1
        foreach p $param_lst {
            set tmp "    .[lindex $p 0]\("
            if {$idx < $llen} {
                append tmp "[lindex $p 1]\),"
            } else {
                append tmp "[lindex $p 1]\)"
            }
            puts $tfh $tmp
            incr idx
        }
         puts $tfh "  \) u1 \("
    }
 
    set llen [llength $name_lst]
    set idx 1
    foreach n $name_lst {
        set ln $n
        set tick_dir [string first "`" $n]
        if {$tick_dir >= 0} {
            puts $tfh "    $n"
            incr idx
            continue
        }
        set len [string length $ln]
        while {$len < $name_length} {
            append ln " "
            set len [string length $ln]
        }
        if {$idx < $llen} {
            puts $tfh "    .$ln \(theif.$n\),"
        } else {
            puts $tfh "    .$ln \(theif.$n\)"
        }
        incr idx
    }
 
    puts $tfh "  \)\;"
    puts $tfh ""
    puts $tfh "  tb_mod prg_inst\(theif\)\;"
    puts $tfh ""
    puts $tfh "endmodule"
 
    close $tfh
    ##  inc the progress bar
    set gen_prog 4.0
############################################################################
##  generate the interface file.
    set ifn $destin_text
    append ifn "/dut_if.sv"
    set ifh [open $ifn w]
 
    write_header $ifh
    ##  handle the parameters.
    if {[llength $param_lst] == 0} {
        puts $ifh "interface dut_if\(\)\;"
    } else {
        puts $tfh "  $mod_name"
        puts $tfh "  \#\("
        set llen [llength $param_lst]
        set idx 1
        foreach p $param_lst {
            set tmp "    [lindex $p 0] = "
            if {$idx < $llen} {
                append tmp "[lindex $p 1],"
            } else {
                append tmp "[lindex $p 1]"
            }
            puts $tfh $tmp
            incr idx
        }
         puts $tfh "  \)\(\)\;"
    }
    puts $ifh ""
    foreach i $import_lst {
        puts $ifh "  $i"
    }
    puts $ifh ""
    foreach l $log_lst {
        puts $ifh "  $l"
    }
 
    puts $ifh ""
    puts $ifh "  modport dut_conn\("
    set llen [llength $mod_lst]
    set idx 1
    foreach p $mod_lst {
        ## if there is an `ifdef ...
        set tick_dir [string first "`" $l]
        if {$tick_dir >= 0} {
            puts $ifh "    $p"
            incr idx
            continue
        }
        set sp [split $p]
        if {$idx < $llen} {
            puts $ifh "    [lindex $sp 0]   [lindex $sp end]"
        } else {
            puts $ifh "    [lindex $sp 0]   [string trim [lindex $sp end] ","]"
        }
        incr idx
    }
    puts $ifh "  \)\;"
    puts $ifh ""
    puts $ifh "  modport tb_conn\("
    set idx 1
    foreach p $mod_lst {
        ## if there is an `ifdef ...
        set tick_dir [string first "`" $p]
        if {$tick_dir >= 0} {
            puts $ifh "    $p"
            incr idx
            continue
        }
        set in [string first "input" $p]
        set out [string first "output" $p]
        if {$in >= 0} {
            set type "output  "
        } elseif {$out >= 0} {
            set type "input   "
        } else {
            set type "inout   "
        }
 
        set sp [split $p]
        #puts $sp
        if {$idx < $llen} {
            puts $ifh "    $type [lindex $sp end]"
        } else {
            puts $ifh "    $type [string trim [lindex $sp end] ","]"
        }
        incr idx
    }
    puts $ifh "  \)\;"
    puts $ifh ""
    puts $ifh "endinterface"
    close $ifh
    ##  inc the progress bar
    set gen_prog 5.0
##########################################################################
##   generate the tb_prg  file from template.
    #puts $comb_val
    if {$comb_val == "No mod"} {
        ##  indicate done in progress bar.
        set gen_prog 7.0
        puts "No tb_mod file was generated."
            return
    }
    set tpl_fh [open $template r]
    set tpl_lst {}
    set hfound 0
    while {![eof $tpl_fh]} {
        set rline [gets $tpl_fh]
        if {$hfound == 0} {
            set head [string first ">>header" $rline]
            if {$head == 0} {
                set hfound 1
            }
        } else {
            lappend tpl_lst $rline
        }
    }
 
    #foreach l $tpl_lst {
    #    puts  $l
    #}
 
    set pfn $destin_text
    append pfn "/tb_mod.sv"
    set pfh [open $pfn w]
 
    set idx 0
    foreach l $tpl_lst {
        set ent_pt [string first ">>insert sigs" $l]
        if {$ent_pt == 0} {
            set tpl_lst [lreplace $tpl_lst $idx $idx]
            foreach l $log_lst {
                set tpl_lst [linsert $tpl_lst $idx "  $l"]
                incr idx
            }
            break
        }
        incr idx
    }
 
    #foreach l $tpl_lst {
    #    puts  $l
    #}
 
    ##  inc the progress bar
    set gen_prog 6.0
    set idx 0
    foreach l $tpl_lst {
        set ent_pt [string first ">>drive sigs" $l]
        if {$ent_pt == 0} {
            set tpl_lst [lreplace $tpl_lst $idx $idx]
            set midx 0
            foreach l $name_lst {
                set dir [lindex $mod_lst $midx]
                #puts $dir
                #puts "$idx $l"
                set idir [string first "input" $dir]
                if {[string first "`" $l] >= 0} {
                    set tmp $l
                } elseif {$idir >= 0} {
                    set tmp "  assign tif."
                    append tmp "$l = $l\;"
                } else {
                    set tmp "  assign $l"
                    append tmp " = tif.$l\;"
                }
                set tpl_lst [linsert $tpl_lst $idx $tmp]
                #puts [lindex $tpl_lst $idx]
                incr idx
                incr midx
            }
            break
        }
        incr idx
    }
 
    write_header $pfh
    foreach l $tpl_lst {
        puts $pfh $l
    }
    set gen_prog 7.0
    close $pfh
}

Line No.	Rev	Author	Line
1	5	sckoarn	`##-------------------------------------------------------------------------------`
2			`## Copyright 2019 Ken Campbell`
3			`##`
4			`## Licensed under the Apache License, Version 2.0 (the "License");`
5			`## you may not use this file except in compliance with the License.`
6			`## You may obtain a copy of the License at`
7			`##`
8			`## http://www.apache.org/licenses/LICENSE-2.0`
9			`##`
10			`## Unless required by applicable law or agreed to in writing, software`
11			`## distributed under the License is distributed on an "AS IS" BASIS,`
12			`## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.`
13			`## See the License for the specific language governing permissions and`
14			`## limitations under the License.`
15			`##-------------------------------------------------------------------------------`
16			`##-- $Author: $ Ken Campbell`
17	6	sckoarn	`##-- $Date: $ April 2019`
18	5	sckoarn	`##-- $Id: $`
19			`##-- $Source: $`
20			`##-- Description :`
21			`##-- This application takes a text file containing the definition of a Verilog`
22	6	sckoarn	`##-- module, produces a file set for the SV Directed Test Bench.`
23	5	sckoarn	`##-- This file is the parser and generator.`
24	6	sckoarn	`##-- The parser is a simple one, in that it is not able to provide reliable`
25			`##-- code generation for all possible syntax. It is intended that it will`
26			`##-- generate good code if the module I/O are defined like shown in the examples.`
27			`##--`
28			`##-- If you intend to generate many TB, and this parser is not quite what you`
29			`##-- need, feel free to modify it for your needs. There are ample comments`
30			`##-- and left over puts statements that should help with any efforts to`
31			`##-- modify the parser.`
32	5	sckoarn	`##------------------------------------------------------------------------------`
33	6	sckoarn
34			`#################################################################`
35			`## parse out the pin definitions from the list of raw pins text from the module.`
36			`## input : list of strings containing pin definitions.`
37			`## output : list of list of pin properties.`
38			`## three lists are output, each designed to provide information for`
39			`## the generation process.`
40	5	sckoarn	`proc pars_pindef { pins } {`
41			`set pdef {}`
42			`set def_lst {}`
43			`set lc 0`
44
45			`set logic_lst {}`
46			`set dut_modport {}`
47			`set names_lst {}`
48
49			`foreach l $pins {`
50			`set is_mult [string first "," $l]`
51			`set is_bv [string first "\[" $l]`
52			`set l [string trim $l "\;"]`
53			`#puts $l`
54			`#handle precompile`
55			set ispre [string first "`" $l]
56			`if {$ispre >= 0} {`
57			`if {[string first "timescale" $l] >= 0} {`
58			`continue`
59			`}`
60			`lappend names_lst $l`
61			`lappend logic_lst $l`
62			`lappend dut_modport $l`
63			`continue`
64			`}`
65	6	sckoarn	`## if is a vector def`
66	5	sckoarn	`#puts "is_bv: $is_bv"`
67			`if {$is_bv > 0} {`
68	6	sckoarn
69			`set is_cbv [string last "\]" $l]`
70	5	sckoarn	`set bv_spec [string range $l $is_bv $is_cbv]`
71			`set type [string range $l 0 $is_bv-1]`
72			`set names [string range $l $is_cbv+1 end]`
73			`set snames [split $names ","]`
74			`foreach n $snames {`
75	6	sckoarn	`#puts $n`
76			`set sn [string trim $n]`
77			`if {$sn == ""} {`
78			`break`
79			`}`
80	5	sckoarn	`lappend names_lst [string trim $n]`
81			`if {$type != "inout"} {`
82			`set tmp "logic "`
83			`} else {`
84			`set tmp "wire "`
85			`}`
86			`append tmp $bv_spec " [string trim $n]\;"`
87			`lappend logic_lst $tmp`
88			`set tmp [string trim $type]`
89			`append tmp " [string trim $n],"`
90			`lappend dut_modport $tmp`
91			`}`
92			`} else {`
93	6	sckoarn	`#puts $l`
94	5	sckoarn	`set sl [split $l ","]`
95			`set frst [split [lindex $sl 0]]`
96			`set type [string trim [lindex $frst 0]]`
97	6	sckoarn	`## get the pin type from the def.`
98			`set tmp ""`
99			`foreach pt [lrange $frst 1 end] {`
100			`if {$pt != ""} {`
101			`if {$pt == "var"} {`
102			`set tmp "$pt "`
103			`} else {`
104			`append tmp $pt`
105			`set pin_type $tmp`
106			`break`
107			`}`
108			`}`
109			`}`
110			`#puts $pin_type`
111	5	sckoarn	`set fname [string trim [lindex $frst end]]`
112			`set sl [lrange $sl 1 end]`
113			`lappend names_lst [string trim $fname]`
114			`if {$type != "inout"} {`
115	6	sckoarn	`set tmp "$pin_type "`
116	5	sckoarn	`} else {`
117			`set tmp "wire "`
118			`}`
119			`#set tmp "logic "`
120			`append tmp "$fname\;"`
121			`lappend logic_lst $tmp`
122			`set tmp $type`
123			`append tmp " $fname,"`
124			`lappend dut_modport $tmp`
125			`foreach n $sl {`
126			`if {$n == ""} {`
127			`continue`
128			`}`
129	6	sckoarn	`#puts $n`
130	5	sckoarn	`lappend names_lst [string trim $n]`
131			`if {$type != "inout"} {`
132			`set tmp "logic "`
133			`} else {`
134			`set tmp "wire "`
135			`}`
136			`append tmp "[string trim $n]\;"`
137			`lappend logic_lst $tmp`
138			`set tmp $type`
139			`append tmp " [string trim $n],"`
140			`lappend dut_modport $tmp`
141			`}`
142			`}`
143			`}`
144
145			`lappend def_lst $logic_lst`
146			`lappend def_lst $dut_modport`
147			`lappend def_lst $names_lst`
148
149			`return $def_lst`
150			`}`
151			`## end pars_pindef`
152
153	6	sckoarn	`##-------------------------------------------------------------------------------`
154			`## pars parameters`
155			`proc pars_params {plst} {`
156			`set rtn {}`
157			`foreach p $plst {`
158			`set sp [split [string trim $p ","] " "]`
159			`set tmp [lindex $sp 1]`
160			`lappend tmp [lindex $sp end]`
161			`lappend rtn $tmp`
162			`}`
163			`return $rtn`
164			`}`
165			`## end pars_params`
166	5	sckoarn	`##--------------------------------------------------------------------------------`
167			`## Write header to file passed`
168	6	sckoarn	`## if you intend to use this tool many times and it matters`
169			`## mod this section to output the header as required.`
170	5	sckoarn	`proc write_header { handle } {`
171			`global version`
172			`##global scan_date`
173			`set raw_date [clock scan now]`
174			`set scan_date [clock format $raw_date -format "%d %b %Y %T"]`
175
176			`## so CVS will not modify selections, they have to be chopped up`
177			`set auth "// \$Auth"`
178			`append auth "or: \$"`
179
180			`puts $handle "///////////////////////////////////////////////////////////////////////////////"`
181			`puts $handle "// Copyright ///////////////////////////////////"`
182			`puts $handle "// All Rights Reserved"`
183			`puts $handle "///////////////////////////////////////////////////////////////////////////////"`
184			`puts $handle "$auth"`
185			`puts $handle "//"`
186			`puts $handle "//"`
187			`puts $handle "// Description :"`
188			`puts $handle "// This file was generated by SV TB Gen $version"`
189			`puts $handle "// on $scan_date"`
190			`puts $handle "//////////////////////////////////////////////////////////////////////////////"`
191			`puts $handle "// This software contains concepts confidential to ////////////////"`
192			`puts $handle "// /////////. and is only made available within the terms of a written"`
193			`puts $handle "// agreement."`
194			`puts $handle "///////////////////////////////////////////////////////////////////////////////"`
195			`puts $handle ""`
196			`}`
197
198			`#####################################################################`
199			`## A directory has been selected now fill the list win with *V files`
200			`proc fill_list {} {`
201			`global ent_dir odir`
202	6	sckoarn	`global use_list list_win ts_ent statsVar`
203			`global view_win mo_sel sel_lst list_ent`
204	5	sckoarn
205			`## get the user selection`
206			`browsed_from_set $ent_dir $ent_dir`
207			`## as a default make output dir = input dir`
208			`set tmp_dir [$ent_dir get]`
209			`$odir delete 0 end`
210			`$odir insert end $tmp_dir`
211			`$odir configure -state readonly`
212
213			`## clear the list window and selection`
214	6	sckoarn	`$list_win delete 0 end`
215			`$list_ent delete 0 end`
216	5	sckoarn	`#$list_win clear selection`
217	6	sckoarn	`$view_win delet 0.0 end`
218	5	sckoarn	`## get the working directory`
219			`set dir [$ent_dir get]`
220	6	sckoarn	`## get the list of SV & v files in working directory`
221	5	sckoarn	`set ftype ".*v"`
222			`set file_lst ""`
223	6	sckoarn	`set are_files [catch {glob -directory $dir *$ftype} rtn_code]`
224			`if {$are_files == 0} {`
225			`set file_lst [glob -directory $dir *$ftype]`
226			`} else {`
227			`return`
228			`}`
229	5	sckoarn	`#puts $file_lst`
230			`## for each of the files in the file_lst`
231			`foreach l $file_lst {`
232			`## creat string that is just the file name: no path`
233	6	sckoarn	`#puts "File : $l"`
234	5	sckoarn	`set testt $l`
235			`set nstart [string last "/" $l]`
236			`incr nstart`
237			`#puts "Index : $nstart"`
238			`set name_str [string range $l $nstart end]`
239			`set sel_lst [lappend sel_lst $name_str]`
240			`#puts $sel_lst`
241			`}`
242			`}`
243
244			`######################################################################`
245	6	sckoarn	`## click on the listbox process it.`
246			`proc process_selected {} {`
247			`global list_win m_select`
248
249			`set sz [$list_win size]`
250			`#puts $sz`
251			`if {$sz > 0} {`
252			`set sel_dx [$list_win curselection]`
253			`set m_select [$list_win get $sel_dx]`
254			`load_ent_file`
255			`} else {`
256			`}`
257			`}`
258
259			`######################################################################`
260	5	sckoarn	`## load the vhdl file that has just been selected from list_win`
261			`proc load_ent_file {} {`
262			`global ent_dir list_win view_win statsVar gen_prog`
263
264			`set gen_prog 0.0`
265			`## update selection with selected item`
266			`set sel_dx [$list_win curselection]`
267			`if {$sel_dx == ""} {`
268			`return`
269			`}`
270			`## recover the selected item`
271			`set ln [$list_win get $sel_dx]`
272			`## Get the working directory`
273			`#puts $ln`
274			`set lp [$ent_dir get]`
275			`## append the file name`
276			`append lp "/" $ln`
277			`## if the file does not exist return`
278			`set fexist [file exist $lp]`
279			`if {$fexist == 0} {`
280			`return`
281			`}`
282			`set ent_file [open $lp r]`
283			`## clear the view_win`
284			`$view_win delete 1.0 end`
285			`set file_list {}`
286			`## load file to memory`
287			`while {![eof $ent_file]} {`
288			`## Get a line`
289			`set rline [gets $ent_file]`
290			`lappend file_list $rline`
291			`}`
292			`close $ent_file`
293	6	sckoarn	`## put file in text window and highlite the module part`
294	5	sckoarn	`set ent_found 0`
295			`set in_ent 0`
296			`set statsVar ""`
297			`foreach l $file_list {`
298			`if {$in_ent == 0} {`
299			`set ent_def [string first module $l]`
300	6	sckoarn	`## Make crazy assumption the module def is in the first few chars.`
301			`if {$ent_def >= 0 && $ent_def <= 6} {`
302	5	sckoarn	`set ent_name [lindex $l 1]`
303			`set statsVar "Module: $ent_name found"`
304			`set ent_found 1`
305			`set in_ent 1`
306			`$view_win insert end "$l\n" highlite`
307			`} else {`
308			`$view_win insert end "$l\n"`
309	6	sckoarn	`}`
310	5	sckoarn	`} else {`
311	6	sckoarn	`set ent_def [string first "endmodule" $l]`
312			`if {$ent_def >= 0} {`
313			`set end_name [lindex $l 1]`
314			`set end_found 1`
315			`set in_ent 0`
316	5	sckoarn	`$view_win insert end "$l\n" highlite`
317	6	sckoarn	`} else {`
318			`$view_win insert end "$l\n" highlite`
319			`}`
320	5	sckoarn	`}`
321			`}`
322			`if {$ent_found == 0} {`
323			`set statsVar "No Module found!!"`
324			`}`
325			`}`
326
327			`#########################################################################`
328	6	sckoarn	`## The main generator proc`
329	5	sckoarn	`proc ttb_gen {} {`
330			`global mo_sel template ent_dir list_win odir p_view tdir`
331			`global cpakv gbatv gen_prog comb_val m_select`
332
333			`set template [$tdir get]`
334
335			`$p_view configure -maximum 7`
336			`set gen_prog 1.0`
337			`## recover the selected item`
338			`set ln $m_select`
339			`## Get the working directory`
340			`#puts $ln`
341			`set lp [$ent_dir get]`
342			`## append the file name`
343			`append lp "/" $ln`
344
345			`set path_text $lp`
346			`set destin_text [$odir get]`
347			`set infile [open $path_text r]`
348			`set file_list {}`
349
350	6	sckoarn	`set bl_comm 0; ## block comment indication.`
351	5	sckoarn	`##################################################################`
352			`## Read in the file and strip comments as we do`
353			`while {![eof $infile]} {`
354			`## Get a line`
355			`set rline [gets $infile]`
356			`#puts $rline`
357			`## get rid of white space`
358			`set rline [string trim $rline]`
359			`## Find comment if there`
360			`set cindex [string first "//" $rline]`
361	6	sckoarn	`## Block comments.`
362			`set bcomm_s [string first "/*" $rline]`
363			`set bcomm_e [string first "*/" $rline]`
364			`## this will break if block start after some code ...`
365			`if {$bcomm_s >= 0} {`
366			`set bl_comm 1`
367			`continue`
368			`}`
369			`if {$bcomm_s == 1} {`
370			`if {$bcomm_e >= 0} {`
371			`set bl_comm 0`
372			`}`
373			`continue`
374			`}`
375	5	sckoarn	`## if a comment was found at the start of the line`
376			`if {$cindex == 0 \|\| $rline == ""} {`
377			`continue`
378	6	sckoarn	`## else if comment somewhere in the line`
379	5	sckoarn	`} elseif {$cindex > 0} {`
380			`# get rid of trailing comments and trim off spaces`
381			`set rline [string trim [string range $rline 0 $cindex-1]]`
382			`lappend file_list $rline`
383	6	sckoarn	`## else was not found so put line in list`
384	5	sckoarn	`} else {`
385			`lappend file_list $rline`
386			`}`
387			`}`
388			`close $infile`
389
390	6	sckoarn
391			`#foreach l $file_list {`
392			`# puts $l`
393			`#}`
394			`#return`
395
396			`#$p_view step`
397	5	sckoarn	`## check for the module def`
398			`set mod_name ""`
399			`foreach l $file_list {`
400			`set mod_def [string first module $l]`
401			`if {$mod_def >= 0} {`
402			`set ml [split $l]`
403			`set mod_name [lindex $l 1]`
404			`break`
405			`}`
406			`}`
407
408			`#puts "Module name is: $mod_name"`
409			`## if no ent die`
410			`if {$mod_def < 0} {`
411			`dbg_msg "A module definition was not found in the file provided."`
412			`return`
413			`## exit`
414			`}`
415	6	sckoarn	`#$p_view step`
416	5	sckoarn	`set mod_list {}`
417			`## check for end module`
418			`foreach l $file_list {`
419			`lappend mod_list $l`
420			`set end_def [string first endmodule $l]`
421			`if {$end_def >= 0} {`
422			`break`
423			`}`
424			`}`
425			`## if no end die`
426			`if {$end_def < 0} {`
427			`dbg_msg "no endmodule statement found for this module"`
428			`return`
429			`## exit`
430			`}`
431			`####`
432			`## collect the parameters if there are.`
433			`set parameter_list {}`
434			`set p_found 0`
435			`foreach l $mod_list {`
436			`set p_found [string first "parameter" $l]`
437			`if {$p_found >= 0} {`
438	6	sckoarn	`lappend parameter_list $l`
439	5	sckoarn	`}`
440			`}`
441	6	sckoarn	`#foreach pl $parameter_list {`
442			`# puts $pl`
443			`#}`
444			`## inc the progress bar`
445	5	sckoarn	`set gen_prog 2.0`
446			`#foreach l $mod_list {`
447			`# puts $l`
448			`#}`
449			`####################################################################`
450			`## a few checks have been done, and non-relevant stuff stripped off.`
451			`## now create an arrry of just the pin names and related info`
452			`set port_lst {}`
453	6	sckoarn	`set import_lst {}`
454	5	sckoarn	`set lc 0`
455			`foreach l $mod_list {`
456			`## make lines that are continued, one line.`
457			`set cont [string first "\;" $l]`
458			`## look for the port statements`
459			`set inp [string first "input " $l]`
460			`if {$inp >= 0} {`
461			`lappend port_lst $l`
462			`}`
463			`set onp [string first "output " $l]`
464			`if {$onp >= 0} {`
465			`lappend port_lst $l`
466			`}`
467			`set ionp [string first "inout " $l]`
468			`if {$ionp >= 0} {`
469			`lappend port_lst $l`
470			`}`
471			set tick_dir [string first "`" $l]
472			`if {$tick_dir >= 0} {`
473			`lappend port_lst $l`
474			`}`
475	6	sckoarn	`set is_import [string first "import" $l]`
476			`if {$is_import >= 0} {`
477			`lappend import_lst $l`
478			`}`
479			`set end_pins [string first "\)\;" $l]`
480			`set end_len [string length $l]`
481			`if {$end_pins >= 0 && $end_len >= 2} {`
482			`set stl [string trim $l "\)\;"]`
483			`if {$stl != ""} {`
484			`lappend port_lst $l`
485			`}`
486			`break`
487			`}`
488	5	sckoarn	`}`
489
490			`#foreach p $port_lst {`
491			`# puts $p`
492			`#}`
493	6	sckoarn	`#return`
494			`## Change the port list into a pin info list of lists`
495	5	sckoarn	`set io_pins [pars_pindef $port_lst]`
496	6	sckoarn	`## get the lists`
497	5	sckoarn	`set log_lst [lindex $io_pins 0]`
498			`set mod_lst [lindex $io_pins 1]`
499			`set name_lst [lindex $io_pins 2]`
500

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