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[/] [systemverilog-uart16550/] [trunk/] [sim/] [README_sim.txt] - Blame information for rev 3

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 ** run simulation **  by hiroshi
 
Environment  : unix or cygwin
 
* align 4byte versoin
 
    make clean
    make work
    make align=ALIGN_4B
 
* align 1byte versoin
 
    make clean
    make work
    make align=ALIGN_1B
 

Line No.	Rev	Author	Line
1	2	hiroshi
2			` run simulation by hiroshi`
3
4			`Environment : unix or cygwin`
5
6			`* align 4byte versoin`
7
8			`make clean`
9			`make work`
10			`make align=ALIGN_4B`
11
12			`* align 1byte versoin`
13
14			`make clean`
15			`make work`
16			`make align=ALIGN_1B`
17

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Subversion Repositories systemverilog-uart16550

[/] [systemverilog-uart16550/] [trunk/] [sim/] [README_sim.txt] - Blame information for rev 3