| 1 |
2 |
arniml |
--------------------------------------------------------------------------
|
| 2 |
|
|
-- This VHDL file was developed by Altera Corporation. It may be
|
| 3 |
|
|
-- freely copied and/or distributed at no cost. Any persons using this
|
| 4 |
|
|
-- file for any purpose do so at their own risk, and are responsible for
|
| 5 |
|
|
-- the results of such use. Altera Corporation does not guarantee that
|
| 6 |
|
|
-- this file is complete, correct, or fit for any particular purpose.
|
| 7 |
|
|
-- NO WARRANTY OF ANY KIND IS EXPRESSED OR IMPLIED. This notice must
|
| 8 |
|
|
-- accompany any copy of this file.
|
| 9 |
|
|
--
|
| 10 |
|
|
--------------------------------------------------------------------------
|
| 11 |
|
|
-- LPM Synthesizable Models (Support string type generic)
|
| 12 |
|
|
--------------------------------------------------------------------------
|
| 13 |
|
|
-- Version 2.0 (lpm 220) Date 01/04/00
|
| 14 |
|
|
--
|
| 15 |
|
|
-- 1. Fixed LPM_RAM_DQ, LPM_RAM_DP, LPM_RAM_IO and LPM_ROM to correctly
|
| 16 |
|
|
-- read in values from LPM_FILE (*.hex) when the DATA width is greater
|
| 17 |
|
|
-- than 16 bits.
|
| 18 |
|
|
-- 2. Explicit sign conversions are added to standard logic vector
|
| 19 |
|
|
-- comparisons in LPM_RAM_DQ, LPM_RAM_DP, LPM_RAM_IO, LPM_ROM, and
|
| 20 |
|
|
-- LPM_COMPARE.
|
| 21 |
|
|
-- 3. LPM_FIFO_DC is rewritten to have correct outputs.
|
| 22 |
|
|
-- 4. LPM_FIFO outputs zeros when nothing has been read from it, and
|
| 23 |
|
|
-- outputs LPM_NUMWORDS mod exp(2, LPM_WIDTHU) when it is full.
|
| 24 |
|
|
-- 5. Fixed LPM_DIVIDE to divide correctly.
|
| 25 |
|
|
--------------------------------------------------------------------------
|
| 26 |
|
|
-- Version 1.9 (lpm 220) Date 11/30/99
|
| 27 |
|
|
--
|
| 28 |
|
|
-- 1. Fixed UNUSED file not found problem and initialization problem
|
| 29 |
|
|
-- with LPM_RAM_DP, LPM_RAM_DQ, and LPM_RAM_IO.
|
| 30 |
|
|
-- 2. Fixed LPM_MULT when SUM port is not used.
|
| 31 |
|
|
-- 3. Fixed LPM_FIFO_DC to enable read when rdclock and wrclock rise
|
| 32 |
|
|
-- at the same time.
|
| 33 |
|
|
-- 4. Fixed LPM_COUNTER comparison problem when signed library is loaded
|
| 34 |
|
|
-- and counter is incrementing.
|
| 35 |
|
|
-- 5. Got rid of "Illegal Character" error message at time = 0 ns when
|
| 36 |
|
|
-- simulating LPM_COUNTER.
|
| 37 |
|
|
--------------------------------------------------------------------------
|
| 38 |
|
|
-- Version 1.8 (lpm 220) Date 10/25/99
|
| 39 |
|
|
--
|
| 40 |
|
|
-- 1. Some LPM_PVALUE implementations were missing, and now implemented.
|
| 41 |
|
|
-- 2. Fixed LPM_COUNTER to count correctly without conversion overflow,
|
| 42 |
|
|
-- that is, when LPM_MODULUS = 2 ** LPM_WIDTH.
|
| 43 |
|
|
-- 3. Fixed LPM_RAM_DP sync process sensitivity list to detect wraddress
|
| 44 |
|
|
-- changes.
|
| 45 |
|
|
--------------------------------------------------------------------------
|
| 46 |
|
|
-- Version 1.7 (lpm 220) Date 07/13/99
|
| 47 |
|
|
--
|
| 48 |
|
|
-- Changed LPM_RAM_IO so that it can be used to simulate both MP2 and
|
| 49 |
|
|
-- Quartus behaviour and LPM220-compliant behaviour.
|
| 50 |
|
|
--------------------------------------------------------------------------
|
| 51 |
|
|
-- Version 1.6 (lpm 220) Date 06/15/99
|
| 52 |
|
|
--
|
| 53 |
|
|
-- 1. Fixed LPM_ADD_SUB sign extension problem and subtraction bug.
|
| 54 |
|
|
-- 2. Fixed LPM_COUNTER to use LPM_MODULUS value.
|
| 55 |
|
|
-- 3. Added CIN and COUT port, and discarded EQ port in LPM_COUNTER to
|
| 56 |
|
|
-- comply with the specfication.
|
| 57 |
|
|
-- 4. Included LPM_RAM_DP, LPM_RAM_DQ, LPM_RAM_IO, LPM_ROM, LPM_FIFO, and
|
| 58 |
|
|
-- LPM_FIFO_DC; they are all initialized to 0's.
|
| 59 |
|
|
--------------------------------------------------------------------------
|
| 60 |
|
|
-- Version 1.5 (lpm 220) Date 05/10/99
|
| 61 |
|
|
--
|
| 62 |
|
|
-- Changed LPM_MODULUS from string type to integer.
|
| 63 |
|
|
--------------------------------------------------------------------------
|
| 64 |
|
|
-- Version 1.4 (lpm 220) Date 02/05/99
|
| 65 |
|
|
--
|
| 66 |
|
|
-- 1. Added LPM_DIVIDE module.
|
| 67 |
|
|
-- 2. Added CLKEN port to LPM_MUX, LPM_DECODE, LPM_ADD_SUB, LPM_MULT
|
| 68 |
|
|
-- and LPM_COMPARE
|
| 69 |
|
|
-- 3. Replaced the constants holding string with the actual string.
|
| 70 |
|
|
--------------------------------------------------------------------------
|
| 71 |
|
|
-- Version 1.3 Date 07/30/96
|
| 72 |
|
|
--
|
| 73 |
|
|
-- Modification History
|
| 74 |
|
|
--
|
| 75 |
|
|
-- 1. Changed the DEFAULT value to "UNUSED" for LPM_SVALUE, LPM_AVALUE,
|
| 76 |
|
|
-- LPM_MODULUS, and LPM_NUMWORDS, LPM_HINT,LPM_STRENGTH, LPM_DIRECTION,
|
| 77 |
|
|
-- and LPM_PVALUE
|
| 78 |
|
|
--
|
| 79 |
|
|
-- 2. Added the two dimentional port components (AND, OR, XOR, and MUX).
|
| 80 |
|
|
--------------------------------------------------------------------------
|
| 81 |
|
|
-- Excluded Functions:
|
| 82 |
|
|
--
|
| 83 |
|
|
-- LPM_FSM and LPM_TTABLE
|
| 84 |
|
|
--
|
| 85 |
|
|
--------------------------------------------------------------------------
|
| 86 |
|
|
-- Assumptions:
|
| 87 |
|
|
--
|
| 88 |
|
|
-- 1. All ports and signal types are std_logic or std_logic_vector
|
| 89 |
|
|
-- from IEEE 1164 package.
|
| 90 |
|
|
-- 2. Synopsys std_logic_arith, std_logic_unsigned, and std_logic_signed
|
| 91 |
|
|
-- package are assumed to be accessible from IEEE library.
|
| 92 |
|
|
-- 3. lpm_component_package must be accessible from library work.
|
| 93 |
|
|
-- 4. The default value of LPM_SVALUE, LPM_AVALUE, LPM_MODULUS, LPM_HINT,
|
| 94 |
|
|
-- LPM_NUMWORDS, LPM_STRENGTH, LPM_DIRECTION, and LPM_PVALUE is
|
| 95 |
|
|
-- string "UNUSED".
|
| 96 |
|
|
--------------------------------------------------------------------------
|
| 97 |
|
|
|
| 98 |
|
|
library IEEE;
|
| 99 |
|
|
use IEEE.std_logic_1164.all;
|
| 100 |
|
|
use IEEE.numeric_std.all;
|
| 101 |
|
|
--use IEEE.std_logic_unsigned.all;
|
| 102 |
|
|
use std.textio.all;
|
| 103 |
|
|
|
| 104 |
|
|
entity LPM_RAM_DQ is
|
| 105 |
|
|
generic (LPM_WIDTH : positive;
|
| 106 |
|
|
LPM_WIDTHAD : positive;
|
| 107 |
|
|
LPM_NUMWORDS : natural := 0;
|
| 108 |
|
|
LPM_INDATA : string := "REGISTERED";
|
| 109 |
|
|
LPM_ADDRESS_CONTROL: string := "REGISTERED";
|
| 110 |
|
|
LPM_OUTDATA : string := "REGISTERED";
|
| 111 |
|
|
LPM_FILE : string := "UNUSED";
|
| 112 |
|
|
LPM_TYPE : string := "LPM_RAM_DQ";
|
| 113 |
|
|
LPM_HINT : string := "UNUSED");
|
| 114 |
|
|
port (DATA : in std_logic_vector(LPM_WIDTH-1 downto 0);
|
| 115 |
|
|
ADDRESS : in std_logic_vector(LPM_WIDTHAD-1 downto 0);
|
| 116 |
|
|
INCLOCK : in std_logic := '0';
|
| 117 |
|
|
OUTCLOCK : in std_logic := '0';
|
| 118 |
|
|
WE : in std_logic;
|
| 119 |
|
|
Q : out std_logic_vector(LPM_WIDTH-1 downto 0));
|
| 120 |
|
|
|
| 121 |
|
|
function int_to_str( value : integer ) return string is
|
| 122 |
|
|
variable ivalue,index : integer;
|
| 123 |
|
|
variable digit : integer;
|
| 124 |
|
|
variable line_no: string(8 downto 1) := " ";
|
| 125 |
|
|
begin
|
| 126 |
|
|
ivalue := value;
|
| 127 |
|
|
index := 1;
|
| 128 |
|
|
while (ivalue > 0) loop
|
| 129 |
|
|
digit := ivalue MOD 10;
|
| 130 |
|
|
ivalue := ivalue/10;
|
| 131 |
|
|
case digit is
|
| 132 |
|
|
when 0 =>
|
| 133 |
|
|
line_no(index) := '0';
|
| 134 |
|
|
when 1 =>
|
| 135 |
|
|
line_no(index) := '1';
|
| 136 |
|
|
when 2 =>
|
| 137 |
|
|
line_no(index) := '2';
|
| 138 |
|
|
when 3 =>
|
| 139 |
|
|
line_no(index) := '3';
|
| 140 |
|
|
when 4 =>
|
| 141 |
|
|
line_no(index) := '4';
|
| 142 |
|
|
when 5 =>
|
| 143 |
|
|
line_no(index) := '5';
|
| 144 |
|
|
when 6 =>
|
| 145 |
|
|
line_no(index) := '6';
|
| 146 |
|
|
when 7 =>
|
| 147 |
|
|
line_no(index) := '7';
|
| 148 |
|
|
when 8 =>
|
| 149 |
|
|
line_no(index) := '8';
|
| 150 |
|
|
when 9 =>
|
| 151 |
|
|
line_no(index) := '9';
|
| 152 |
|
|
when others =>
|
| 153 |
|
|
ASSERT FALSE
|
| 154 |
|
|
REPORT "Illegal number!"
|
| 155 |
|
|
SEVERITY ERROR;
|
| 156 |
|
|
end case;
|
| 157 |
|
|
index := index + 1;
|
| 158 |
|
|
end loop;
|
| 159 |
|
|
return line_no;
|
| 160 |
|
|
end;
|
| 161 |
|
|
|
| 162 |
|
|
function hex_str_to_int( str : string ) return integer is
|
| 163 |
|
|
variable len : integer := str'length;
|
| 164 |
|
|
variable ivalue : integer := 0;
|
| 165 |
|
|
variable digit : integer;
|
| 166 |
|
|
begin
|
| 167 |
|
|
for i in len downto 1 loop
|
| 168 |
|
|
case str(i) is
|
| 169 |
|
|
when '0' =>
|
| 170 |
|
|
digit := 0;
|
| 171 |
|
|
when '1' =>
|
| 172 |
|
|
digit := 1;
|
| 173 |
|
|
when '2' =>
|
| 174 |
|
|
digit := 2;
|
| 175 |
|
|
when '3' =>
|
| 176 |
|
|
digit := 3;
|
| 177 |
|
|
when '4' =>
|
| 178 |
|
|
digit := 4;
|
| 179 |
|
|
when '5' =>
|
| 180 |
|
|
digit := 5;
|
| 181 |
|
|
when '6' =>
|
| 182 |
|
|
digit := 6;
|
| 183 |
|
|
when '7' =>
|
| 184 |
|
|
digit := 7;
|
| 185 |
|
|
when '8' =>
|
| 186 |
|
|
digit := 8;
|
| 187 |
|
|
when '9' =>
|
| 188 |
|
|
digit := 9;
|
| 189 |
|
|
when 'A' =>
|
| 190 |
|
|
digit := 10;
|
| 191 |
|
|
when 'a' =>
|
| 192 |
|
|
digit := 10;
|
| 193 |
|
|
when 'B' =>
|
| 194 |
|
|
digit := 11;
|
| 195 |
|
|
when 'b' =>
|
| 196 |
|
|
digit := 11;
|
| 197 |
|
|
when 'C' =>
|
| 198 |
|
|
digit := 12;
|
| 199 |
|
|
when 'c' =>
|
| 200 |
|
|
digit := 12;
|
| 201 |
|
|
when 'D' =>
|
| 202 |
|
|
digit := 13;
|
| 203 |
|
|
when 'd' =>
|
| 204 |
|
|
digit := 13;
|
| 205 |
|
|
when 'E' =>
|
| 206 |
|
|
digit := 14;
|
| 207 |
|
|
when 'e' =>
|
| 208 |
|
|
digit := 14;
|
| 209 |
|
|
when 'F' =>
|
| 210 |
|
|
digit := 15;
|
| 211 |
|
|
when 'f' =>
|
| 212 |
|
|
digit := 15;
|
| 213 |
|
|
when others =>
|
| 214 |
|
|
ASSERT FALSE
|
| 215 |
|
|
REPORT "Illegal character "& str(i) & "in Intel Hex File! "
|
| 216 |
|
|
SEVERITY ERROR;
|
| 217 |
|
|
end case;
|
| 218 |
|
|
ivalue := ivalue * 16 + digit;
|
| 219 |
|
|
end loop;
|
| 220 |
|
|
return ivalue;
|
| 221 |
|
|
end;
|
| 222 |
|
|
|
| 223 |
|
|
procedure Shrink_line(L : inout LINE; pos : in integer) is
|
| 224 |
|
|
subtype nstring is string(1 to pos);
|
| 225 |
|
|
variable stmp : nstring;
|
| 226 |
|
|
begin
|
| 227 |
|
|
if pos >= 1 then
|
| 228 |
|
|
read(l, stmp);
|
| 229 |
|
|
end if;
|
| 230 |
|
|
end;
|
| 231 |
|
|
|
| 232 |
|
|
end LPM_RAM_DQ;
|
| 233 |
|
|
|
| 234 |
|
|
architecture LPM_SYN of lpm_ram_dq is
|
| 235 |
|
|
|
| 236 |
|
|
--type lpm_memory is array(lpm_numwords-1 downto 0) of std_logic_vector(lpm_width-1 downto 0);
|
| 237 |
|
|
type lpm_memory is array(integer range (2**lpm_widthad)-1 downto 0) of std_logic_vector(lpm_width-1 downto 0);
|
| 238 |
|
|
|
| 239 |
|
|
signal data_tmp, data_reg : std_logic_vector(lpm_width-1 downto 0);
|
| 240 |
|
|
signal q_tmp, q_reg : std_logic_vector(lpm_width-1 downto 0) := (others => '0');
|
| 241 |
|
|
signal address_tmp, address_reg : std_logic_vector(lpm_widthad-1 downto 0);
|
| 242 |
|
|
signal we_tmp, we_reg : std_logic;
|
| 243 |
|
|
|
| 244 |
|
|
begin
|
| 245 |
|
|
|
| 246 |
|
|
sync: process(data, data_reg, address, address_reg,
|
| 247 |
|
|
we, we_reg, q_tmp, q_reg)
|
| 248 |
|
|
begin
|
| 249 |
|
|
if (lpm_address_control = "REGISTERED") then
|
| 250 |
|
|
address_tmp <= address_reg;
|
| 251 |
|
|
we_tmp <= we_reg;
|
| 252 |
|
|
else
|
| 253 |
|
|
address_tmp <= address;
|
| 254 |
|
|
we_tmp <= we;
|
| 255 |
|
|
end if;
|
| 256 |
|
|
if (lpm_indata = "REGISTERED") then
|
| 257 |
|
|
data_tmp <= data_reg;
|
| 258 |
|
|
else
|
| 259 |
|
|
data_tmp <= data;
|
| 260 |
|
|
end if;
|
| 261 |
|
|
if (lpm_outdata = "REGISTERED") then
|
| 262 |
|
|
q <= q_reg;
|
| 263 |
|
|
else
|
| 264 |
|
|
q <= q_tmp;
|
| 265 |
|
|
end if;
|
| 266 |
|
|
end process;
|
| 267 |
|
|
|
| 268 |
|
|
input_reg: process (inclock)
|
| 269 |
|
|
begin
|
| 270 |
|
|
if inclock'event and inclock = '1' then
|
| 271 |
|
|
data_reg <= data;
|
| 272 |
|
|
address_reg <= address;
|
| 273 |
|
|
we_reg <= we;
|
| 274 |
|
|
end if;
|
| 275 |
|
|
end process;
|
| 276 |
|
|
|
| 277 |
|
|
output_reg: process (outclock)
|
| 278 |
|
|
begin
|
| 279 |
|
|
if outclock'event and outclock = '1' then
|
| 280 |
|
|
q_reg <= q_tmp;
|
| 281 |
|
|
end if;
|
| 282 |
|
|
end process;
|
| 283 |
|
|
|
| 284 |
|
|
memory: process(data_tmp, we_tmp, address_tmp)
|
| 285 |
|
|
variable mem_data : lpm_memory;
|
| 286 |
|
|
variable mem_data_tmp : integer := 0;
|
| 287 |
|
|
variable mem_init: boolean := false;
|
| 288 |
|
|
variable i,j,k,lineno: integer := 0;
|
| 289 |
|
|
variable buf: line ;
|
| 290 |
|
|
variable booval: boolean ;
|
| 291 |
|
|
FILE unused_file: TEXT IS OUT "UNUSED";
|
| 292 |
|
|
FILE mem_data_file: TEXT IS IN LPM_FILE;
|
| 293 |
|
|
variable base, byte, rec_type, datain, addr, checksum: string(2 downto 1);
|
| 294 |
|
|
variable startadd: string(4 downto 1);
|
| 295 |
|
|
variable ibase: integer := 0;
|
| 296 |
|
|
variable ibyte: integer := 0;
|
| 297 |
|
|
variable istartadd: integer := 0;
|
| 298 |
|
|
variable check_sum_vec, check_sum_vec_tmp: unsigned(7 downto 0);
|
| 299 |
|
|
begin
|
| 300 |
|
|
-- INITIALIZE --
|
| 301 |
|
|
if NOT(mem_init) then
|
| 302 |
|
|
-- INITIALIZE TO 0 --
|
| 303 |
|
|
for i in mem_data'LOW to mem_data'HIGH loop
|
| 304 |
|
|
mem_data(i) := (OTHERS => '0');
|
| 305 |
|
|
end loop;
|
| 306 |
|
|
|
| 307 |
|
|
if (LPM_FILE = "UNUSED") then
|
| 308 |
|
|
ASSERT FALSE
|
| 309 |
|
|
REPORT "Initialization file not found!"
|
| 310 |
|
|
SEVERITY WARNING;
|
| 311 |
|
|
else
|
| 312 |
|
|
WHILE NOT ENDFILE(mem_data_file) loop
|
| 313 |
|
|
booval := true;
|
| 314 |
|
|
READLINE(mem_data_file, buf);
|
| 315 |
|
|
lineno := lineno + 1;
|
| 316 |
|
|
check_sum_vec := (OTHERS => '0');
|
| 317 |
|
|
if (buf(buf'LOW) = ':') then
|
| 318 |
|
|
i := 1;
|
| 319 |
|
|
shrink_line(buf, i);
|
| 320 |
|
|
READ(L=>buf, VALUE=>byte, good=>booval);
|
| 321 |
|
|
if not (booval) then
|
| 322 |
|
|
ASSERT FALSE
|
| 323 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format!"
|
| 324 |
|
|
SEVERITY ERROR;
|
| 325 |
|
|
end if;
|
| 326 |
|
|
ibyte := hex_str_to_int(byte);
|
| 327 |
|
|
check_sum_vec := unsigned(check_sum_vec) + to_unsigned(ibyte, check_sum_vec'length);
|
| 328 |
|
|
READ(L=>buf, VALUE=>startadd, good=>booval);
|
| 329 |
|
|
if not (booval) then
|
| 330 |
|
|
ASSERT FALSE
|
| 331 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format! "
|
| 332 |
|
|
SEVERITY ERROR;
|
| 333 |
|
|
end if;
|
| 334 |
|
|
istartadd := hex_str_to_int(startadd);
|
| 335 |
|
|
addr(2) := startadd(4);
|
| 336 |
|
|
addr(1) := startadd(3);
|
| 337 |
|
|
check_sum_vec := unsigned(check_sum_vec) + to_unsigned(hex_str_to_int(addr), check_sum_vec'length);
|
| 338 |
|
|
addr(2) := startadd(2);
|
| 339 |
|
|
addr(1) := startadd(1);
|
| 340 |
|
|
check_sum_vec := unsigned(check_sum_vec) + to_unsigned(hex_str_to_int(addr), check_sum_vec'length);
|
| 341 |
|
|
READ(L=>buf, VALUE=>rec_type, good=>booval);
|
| 342 |
|
|
if not (booval) then
|
| 343 |
|
|
ASSERT FALSE
|
| 344 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format! "
|
| 345 |
|
|
SEVERITY ERROR;
|
| 346 |
|
|
end if;
|
| 347 |
|
|
check_sum_vec := unsigned(check_sum_vec) + to_unsigned(hex_str_to_int(rec_type), check_sum_vec'length);
|
| 348 |
|
|
else
|
| 349 |
|
|
ASSERT FALSE
|
| 350 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format! "
|
| 351 |
|
|
SEVERITY ERROR;
|
| 352 |
|
|
end if;
|
| 353 |
|
|
case rec_type is
|
| 354 |
|
|
when "00"=> -- Data record
|
| 355 |
|
|
i := 0;
|
| 356 |
|
|
k := lpm_width / 8;
|
| 357 |
|
|
if ((lpm_width MOD 8) /= 0) then
|
| 358 |
|
|
k := k + 1;
|
| 359 |
|
|
end if;
|
| 360 |
|
|
-- k = no. of bytes per CAM entry.
|
| 361 |
|
|
while (i < ibyte) loop
|
| 362 |
|
|
mem_data_tmp := 0;
|
| 363 |
|
|
for j in 1 to k loop
|
| 364 |
|
|
READ(L=>buf, VALUE=>datain,good=>booval); -- read in data a byte (2 hex chars) at a time.
|
| 365 |
|
|
if not (booval) then
|
| 366 |
|
|
ASSERT FALSE
|
| 367 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format! "
|
| 368 |
|
|
SEVERITY ERROR;
|
| 369 |
|
|
end if;
|
| 370 |
|
|
check_sum_vec := unsigned(check_sum_vec) + to_unsigned(hex_str_to_int(datain), check_sum_vec'length);
|
| 371 |
|
|
mem_data_tmp := mem_data_tmp * 256 + hex_str_to_int(datain);
|
| 372 |
|
|
end loop;
|
| 373 |
|
|
i := i + k;
|
| 374 |
|
|
mem_data(ibase + istartadd) := STD_LOGIC_VECTOR(to_unsigned(mem_data_tmp, lpm_width));
|
| 375 |
|
|
istartadd := istartadd + 1;
|
| 376 |
|
|
end loop;
|
| 377 |
|
|
when "01"=>
|
| 378 |
|
|
exit;
|
| 379 |
|
|
when "02"=>
|
| 380 |
|
|
ibase := 0;
|
| 381 |
|
|
if (ibyte /= 2) then
|
| 382 |
|
|
ASSERT FALSE
|
| 383 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format for record type 02! "
|
| 384 |
|
|
SEVERITY ERROR;
|
| 385 |
|
|
end if;
|
| 386 |
|
|
for i in 0 to (ibyte-1) loop
|
| 387 |
|
|
READ(L=>buf, VALUE=>base,good=>booval);
|
| 388 |
|
|
ibase := ibase * 256 + hex_str_to_int(base);
|
| 389 |
|
|
if not (booval) then
|
| 390 |
|
|
ASSERT FALSE
|
| 391 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format! "
|
| 392 |
|
|
SEVERITY ERROR;
|
| 393 |
|
|
end if;
|
| 394 |
|
|
check_sum_vec := unsigned(check_sum_vec) + to_unsigned(hex_str_to_int(base), check_sum_vec'length);
|
| 395 |
|
|
end loop;
|
| 396 |
|
|
ibase := ibase * 16;
|
| 397 |
|
|
when OTHERS =>
|
| 398 |
|
|
ASSERT FALSE
|
| 399 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Illegal record type in Intel Hex File! "
|
| 400 |
|
|
SEVERITY ERROR;
|
| 401 |
|
|
end case;
|
| 402 |
|
|
READ(L=>buf, VALUE=>checksum,good=>booval);
|
| 403 |
|
|
if not (booval) then
|
| 404 |
|
|
ASSERT FALSE
|
| 405 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Checksum is missing! "
|
| 406 |
|
|
SEVERITY ERROR;
|
| 407 |
|
|
end if;
|
| 408 |
|
|
|
| 409 |
|
|
check_sum_vec := unsigned(not (check_sum_vec)) + 1 ;
|
| 410 |
|
|
check_sum_vec_tmp := to_unsigned(hex_str_to_int(checksum), check_sum_vec_tmp'length);
|
| 411 |
|
|
|
| 412 |
|
|
if (unsigned(check_sum_vec) /= unsigned(check_sum_vec_tmp)) then
|
| 413 |
|
|
ASSERT FALSE
|
| 414 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Incorrect checksum!"
|
| 415 |
|
|
SEVERITY ERROR;
|
| 416 |
|
|
end if;
|
| 417 |
|
|
end loop;
|
| 418 |
|
|
end if;
|
| 419 |
|
|
mem_init := TRUE;
|
| 420 |
|
|
end if;
|
| 421 |
|
|
|
| 422 |
|
|
-- MEMORY FUNCTION --
|
| 423 |
|
|
if we_tmp = '1' then
|
| 424 |
|
|
mem_data (to_integer(unsigned(address_tmp))) := data_tmp;
|
| 425 |
|
|
end if;
|
| 426 |
|
|
q_tmp <= mem_data(to_integer(unsigned(address_tmp)));
|
| 427 |
|
|
end process;
|
| 428 |
|
|
|
| 429 |
|
|
end LPM_SYN;
|
| 430 |
|
|
|
| 431 |
|
|
|
| 432 |
|
|
-- pragma translate_off
|
| 433 |
|
|
configuration lpm_ram_dq_c0 of lpm_ram_dq is
|
| 434 |
|
|
|
| 435 |
|
|
for lpm_syn
|
| 436 |
|
|
end for;
|
| 437 |
|
|
|
| 438 |
|
|
end lpm_ram_dq_c0;
|
| 439 |
|
|
-- pragma translate_on
|
