OpenCores
URL https://opencores.org/ocsvn/t400/t400/trunk

Subversion Repositories t400

[/] [t400/] [trunk/] [rtl/] [vhdl/] [t400_stack.vhd] - Blame information for rev 179

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 arniml
-------------------------------------------------------------------------------
2
--
3
-- The stack unit.
4
--
5 179 arniml
-- $Id: t400_stack.vhd 179 2009-04-01 19:48:38Z arniml $
6 2 arniml
--
7
-- Copyright (c) 2006 Arnim Laeuger (arniml@opencores.org)
8
--
9
-- All rights reserved
10
--
11
-- Redistribution and use in source and synthezised forms, with or without
12
-- modification, are permitted provided that the following conditions are met:
13
--
14
-- Redistributions of source code must retain the above copyright notice,
15
-- this list of conditions and the following disclaimer.
16
--
17
-- Redistributions in synthesized form must reproduce the above copyright
18
-- notice, this list of conditions and the following disclaimer in the
19
-- documentation and/or other materials provided with the distribution.
20
--
21
-- Neither the name of the author nor the names of other contributors may
22
-- be used to endorse or promote products derived from this software without
23
-- specific prior written permission.
24
--
25
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26
-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
27
-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28
-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
29
-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30
-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31
-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32
-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33
-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34
-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35
-- POSSIBILITY OF SUCH DAMAGE.
36
--
37
-- Please report bugs to the author, but before you do so, please
38
-- make sure that this is not a derivative work and that
39
-- you have the latest version of this file.
40
--
41
-- The latest version of this file can be found at:
42
--      http://www.opencores.org/cvsweb.shtml/t400/
43
--
44
-------------------------------------------------------------------------------
45
 
46
library ieee;
47
use ieee.std_logic_1164.all;
48
 
49
use work.t400_opt_pack.all;
50
use work.t400_pack.all;
51
 
52
entity t400_stack is
53
 
54
  generic (
55
    opt_type_g : integer := t400_opt_type_420_c
56
  );
57
  port (
58
    -- System Interface -------------------------------------------------------
59
    ck_i    : in  std_logic;
60
    ck_en_i : in  boolean;
61
    por_i   : in  boolean;
62
    -- Stack Control Interface ------------------------------------------------
63
    op_i    : in  stack_op_t;
64
    -- Program Counter Interface ----------------------------------------------
65
    pc_i    : in  pc_t;
66
    pc_o    : out pc_t
67
  );
68
 
69
end t400_stack;
70
 
71
 
72 69 arniml
-- pragma translate_off
73
use work.tb_pack.tb_sa_s;
74
-- pragma translate_on
75
 
76 2 arniml
architecture rtl of t400_stack is
77
 
78
  signal sa_q,
79
         sb_q,
80
         sc_q  : pc_t;
81
 
82
begin
83
 
84
  -----------------------------------------------------------------------------
85
  -- Process stack
86
  --
87
  -- Purpose:
88
  --   Implements the stack consisting of SA, SB, SC.
89
  --   SC is skipped when it's a 41xL.
90
  --
91
  stack: process (ck_i, por_i)
92
    variable t41x_type_v : boolean;
93
  begin
94
    if por_i then
95
      sa_q <= (others => '0');
96
      sb_q <= (others => '0');
97
      sc_q <= (others => '0');
98
 
99
    elsif ck_i'event and ck_i = '1' then
100
      -- determine type
101
      t41x_type_v := opt_type_g = t400_opt_type_410_c;
102
 
103
      if ck_en_i then
104
        case op_i is
105
          when STACK_PUSH =>
106
            sa_q   <= pc_i;
107
            sb_q   <= sa_q;
108
            if not t41x_type_v then
109
              sc_q <= sb_q;
110 129 arniml
            else
111
              sc_q <= (others => '0');
112 2 arniml
            end if;
113
 
114
          when STACK_POP =>
115
            sa_q   <= sb_q;
116
            if not t41x_type_v then
117
              sb_q <= sc_q;
118
            end if;
119
 
120
          when others =>
121
            null;
122
 
123
        end case;
124
      end if;
125
    end if;
126
  end process stack;
127
  --
128
  -----------------------------------------------------------------------------
129
 
130
 
131 69 arniml
  -- pragma translate_off
132
  -- instrument interrupt testbench
133
  tb_sa_s <= sa_q;
134
  -- pragma translate_on
135
 
136
 
137 2 arniml
  -----------------------------------------------------------------------------
138
  -- Output mapping
139
  -----------------------------------------------------------------------------
140
  pc_o <= sa_q;
141
 
142
end rtl;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.