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        ;; *******************************************************************
        ;; $Id: test.asm 179 2009-04-01 19:48:38Z arniml $
        ;;
        ;; Checks the LBI instruction (two byte).
        ;;
 
        ;; the cpu type is defined on asl's command line
 
        org     0x00
        clra
 
        ;; register 0
        ld      0x0
        jsr     clear_reg
        ;; register 1
        ld      0x1
        jsr     clear_reg
        ;; register 2
        ld      0x3
        jsr     clear_reg
        ;; register 3
        ld      0x1
        jsr     clear_reg
 
        jmp     test_code
 
 
        ;; subroutines for combined long LBI
        org     0x010
lbi_call_reg0:
        db      0x33, 0x80      ; lbi   0, 0
        db      0x33, 0x81      ; lbi   0, 1
        db      0x33, 0x82      ; lbi   0, 2
        db      0x33, 0x83      ; lbi   0, 3
        db      0x33, 0x84      ; lbi   0, 4
        db      0x33, 0x85      ; lbi   0, 5
        db      0x33, 0x86      ; lbi   0, 6
        db      0x33, 0x87      ; lbi   0, 7
        db      0x33, 0x88      ; lbi   0, 8
        db      0x33, 0x89      ; lbi   0, 9
        db      0x33, 0x8a      ; lbi   0, 10
        db      0x33, 0x8b      ; lbi   0, 11
        db      0x33, 0x8c      ; lbi   0, 12
        db      0x33, 0x8d      ; lbi   0, 13
        db      0x33, 0x8e      ; lbi   0, 14
        db      0x33, 0x8f      ; lbi   0, 15
        ret
        jmp     fail            ; catch me if you can
lbi_call_reg1:
        db      0x33, 0x90      ; lbi   1, 0
        db      0x33, 0x91      ; lbi   1, 1
        db      0x33, 0x92      ; lbi   1, 2
        db      0x33, 0x93      ; lbi   1, 3
        db      0x33, 0x94      ; lbi   1, 4
        db      0x33, 0x95      ; lbi   1, 5
        db      0x33, 0x96      ; lbi   1, 6
        db      0x33, 0x97      ; lbi   1, 7
        db      0x33, 0x98      ; lbi   1, 8
        db      0x33, 0x99      ; lbi   1, 9
        db      0x33, 0x9a      ; lbi   1, 10
        db      0x33, 0x9b      ; lbi   1, 11
        db      0x33, 0x9c      ; lbi   1, 12
        db      0x33, 0x9d      ; lbi   1, 13
        db      0x33, 0x9e      ; lbi   1, 14
        db      0x33, 0x9f      ; lbi   1, 15
        ret
        jmp     fail            ; catch me if you can
lbi_call_reg2:
        db      0x33, 0xa0      ; lbi   2, 0
        db      0x33, 0xa1      ; lbi   2, 1
        db      0x33, 0xa2      ; lbi   2, 2
        db      0x33, 0xa3      ; lbi   2, 3
        db      0x33, 0xa4      ; lbi   2, 4
        db      0x33, 0xa5      ; lbi   2, 5
        db      0x33, 0xa6      ; lbi   2, 6
        db      0x33, 0xa7      ; lbi   2, 7
        db      0x33, 0xa8      ; lbi   2, 8
        db      0x33, 0xa9      ; lbi   2, 9
        db      0x33, 0xaa      ; lbi   2, 10
        db      0x33, 0xab      ; lbi   2, 11
        db      0x33, 0xac      ; lbi   2, 12
        db      0x33, 0xad      ; lbi   2, 13
        db      0x33, 0xae      ; lbi   2, 14
        db      0x33, 0xaf      ; lbi   2, 15
        ret
        jmp     fail            ; catch me if you can
lbi_call_reg3:
        db      0x33, 0xb0      ; lbi   3, 0
        db      0x33, 0xb1      ; lbi   3, 1
        db      0x33, 0xb2      ; lbi   3, 2
        db      0x33, 0xb3      ; lbi   3, 3
        db      0x33, 0xb4      ; lbi   3, 4
        db      0x33, 0xb5      ; lbi   3, 5
        db      0x33, 0xb6      ; lbi   3, 6
        db      0x33, 0xb7      ; lbi   3, 7
        db      0x33, 0xb8      ; lbi   3, 8
        db      0x33, 0xb9      ; lbi   3, 9
        db      0x33, 0xba      ; lbi   3, 10
        db      0x33, 0xbb      ; lbi   3, 11
        db      0x33, 0xbc      ; lbi   3, 12
        db      0x33, 0xbd      ; lbi   3, 13
        db      0x33, 0xbe      ; lbi   3, 14
        db      0x33, 0xbf      ; lbi   3, 15
        ret
        jmp     fail            ; catch me if you can
 
 
        ;;
        ;; now test each register digit
        ;;
test_code:
 
        ;; *******************************************************************
        ;; register 0
        ;;
        ;; initialize all digits of register
        ;;
        ld      0x3             ; r: 3 -> 0
        jsr     init_reg
 
 
        ;; digit 0
        clra
        jsr     lbi_call_reg0 + 0 * 2
        ske
        jmp     fail
        ;; digit 1
        aisc    0x1
        jsr     lbi_call_reg0 + 1 * 2
        ske
        jmp     fail
        ;; digit 2
        aisc    0x1
        jsr     lbi_call_reg0 + 2 * 2
        ske
        jmp     fail
        ;; digit 3
        aisc    0x1
        jsr     lbi_call_reg0 + 3 * 2
        ske
        jmp     fail
        ;; digit 4
        aisc    0x1
        jsr     lbi_call_reg0 + 4 * 2
        ske
        jmp     fail
        ;; digit 5
        aisc    0x1
        jsr     lbi_call_reg0 + 5 * 2
        ske
        jmp     fail
        ;; digit 6
        aisc    0x1
        jsr     lbi_call_reg0 + 6 * 2
        ske
        jmp     fail
        ;; digit 7
        aisc    0x1
        jsr     lbi_call_reg0 + 7 * 2
        ske
        jmp     fail
        ;; digit 8
        aisc    0x1
        jsr     lbi_call_reg0 + 8 * 2
        ske
        jmp     fail
        ;; digit 9
        aisc    0x1
        jsr     lbi_call_reg0 + 9 * 2
        ske
        jmp     fail
        ;; digit 10
        aisc    0x1
        jsr     lbi_call_reg0 + 10 * 2
        ske
        jmp     fail
        ;; digit 11
        aisc    0x1
        jsr     lbi_call_reg0 + 11 * 2
        ske
        jmp     fail
        ;; digit 12
        aisc    0x1
        jsr     lbi_call_reg0 + 12 * 2
        ske
        jmp     fail
        ;; digit 13
        aisc    0x1
        jsr     lbi_call_reg0 + 13 * 2
        ske
        jmp     fail
        ;; digit 14
        aisc    0x1
        jsr     lbi_call_reg0 + 14 * 2
        ske
        jmp     fail
        ;; digit 15
        aisc    0x1
        jsr     lbi_call_reg0 + 15 * 2
        ske
        jmp     fail
 
 
        ;; *******************************************************************
        ;; register 1
        ;;
        ;; initialize all digits of register
        ;;
        ld      0x0             ; r: 0 -> 0
        jsr     clear_reg
        ld      0x1             ; r: 0 -> 1
        jsr     init_reg
 
 
        ;; digit 0
        clra
        jsr     lbi_call_reg1 + 0 * 2
        ske
        jmp     fail
        ;; digit 1
        aisc    0x1
        jsr     lbi_call_reg1 + 1 * 2
        ske
        jmp     fail
        ;; digit 2
        aisc    0x1
        jsr     lbi_call_reg1 + 2 * 2
        ske
        jmp     fail
        ;; digit 3
        aisc    0x1
        jsr     lbi_call_reg1 + 3 * 2
        ske
        jmp     fail
        ;; digit 4
        aisc    0x1
        jsr     lbi_call_reg1 + 4 * 2
        ske
        jmp     fail
        ;; digit 5
        aisc    0x1
        jsr     lbi_call_reg1 + 5 * 2
        ske
        jmp     fail
        ;; digit 6
        aisc    0x1
        jsr     lbi_call_reg1 + 6 * 2
        ske
        jmp     fail
        ;; digit 7
        aisc    0x1
        jsr     lbi_call_reg1 + 7 * 2
        ske
        jmp     fail
        ;; digit 8
        aisc    0x1
        jsr     lbi_call_reg1 + 8 * 2
        ske
        jmp     fail
        ;; digit 9
        aisc    0x1
        jsr     lbi_call_reg1 + 9 * 2
        ske
        jmp     fail
        ;; digit 10
        aisc    0x1
        jsr     lbi_call_reg1 + 10 * 2
        ske
        jmp     fail
        ;; digit 11
        aisc    0x1
        jsr     lbi_call_reg1 + 11 * 2
        ske
        jmp     fail
        ;; digit 12
        aisc    0x1
        jsr     lbi_call_reg1 + 12 * 2
        ske
        jmp     fail
        ;; digit 13
        aisc    0x1
        jsr     lbi_call_reg1 + 13 * 2
        ske
        jmp     fail
        ;; digit 14
        aisc    0x1
        jsr     lbi_call_reg1 + 14 * 2
        ske
        jmp     fail
        ;; digit 15
        aisc    0x1
        jsr     lbi_call_reg1 + 15 * 2
        ske
        jmp     fail
 
 
        ;; *******************************************************************
        ;; register 2
        ;;
        ;; initialize all digits of register
        ;;
        ld      0x0             ; r: 1 -> 1
        jsr     clear_reg
        ld      0x3             ; r: 1 -> 2
        jsr     init_reg
 
 
        ;; digit 0
        clra
        jsr     lbi_call_reg2 + 0 * 2
        ske
        jmp     fail
        ;; digit 1
        aisc    0x1
        jsr     lbi_call_reg2 + 1 * 2
        ske
        jmp     fail
        ;; digit 2
        aisc    0x1
        jsr     lbi_call_reg2 + 2 * 2
        ske
        jmp     fail
        ;; digit 3
        aisc    0x1
        jsr     lbi_call_reg2 + 3 * 2
        ske
        jmp     fail
        ;; digit 4
        aisc    0x1
        jsr     lbi_call_reg2 + 4 * 2
        ske
        jmp     fail
        ;; digit 5
        aisc    0x1
        jsr     lbi_call_reg2 + 5 * 2
        ske
        jmp     fail
        ;; digit 6
        aisc    0x1
        jsr     lbi_call_reg2 + 6 * 2
        ske
        jmp     fail
        ;; digit 7
        aisc    0x1
        jsr     lbi_call_reg2 + 7 * 2
        ske
        jmp     fail
        ;; digit 8
        aisc    0x1
        jsr     lbi_call_reg2 + 8 * 2
        ske
        jmp     fail
        ;; digit 9
        aisc    0x1
        jsr     lbi_call_reg2 + 9 * 2
        ske
        jmp     fail
        ;; digit 10
        aisc    0x1
        jsr     lbi_call_reg2 + 10 * 2
        ske
        jmp     fail
        ;; digit 11
        aisc    0x1
        jsr     lbi_call_reg2 + 11 * 2
        ske
        jmp     fail
        ;; digit 12
        aisc    0x1
        jsr     lbi_call_reg2 + 12 * 2
        ske
        jmp     fail
        ;; digit 13
        aisc    0x1
        jsr     lbi_call_reg2 + 13 * 2
        ske
        jmp     fail
        ;; digit 14
        aisc    0x1
        jsr     lbi_call_reg2 + 14 * 2
        ske
        jmp     fail
        ;; digit 15
        aisc    0x1
        jsr     lbi_call_reg2 + 15 * 2
        ske
        jmp     fail
 
 
        ;; *******************************************************************
        ;; register 3
        ;;
        ;; initialize all digits of register
        ;;
        ld      0x0             ; r: 2 -> 2
        jsr     clear_reg
        ld      0x1             ; r: 2 -> 3
        jsr     init_reg
 
 
        ;; digit 0
        clra
        jsr     lbi_call_reg3 + 0 * 2
        ske
        jmp     fail
        ;; digit 1
        aisc    0x1
        jsr     lbi_call_reg3 + 1 * 2
        ske
        jmp     fail
        ;; digit 2
        aisc    0x1
        jsr     lbi_call_reg3 + 2 * 2
        ske
        jmp     fail
        ;; digit 3
        aisc    0x1
        jsr     lbi_call_reg3 + 3 * 2
        ske
        jmp     fail
        ;; digit 4
        aisc    0x1
        jsr     lbi_call_reg3 + 4 * 2
        ske
        jmp     fail
        ;; digit 5
        aisc    0x1
        jsr     lbi_call_reg3 + 5 * 2
        ske
        jmp     fail
        ;; digit 6
        aisc    0x1
        jsr     lbi_call_reg3 + 6 * 2
        ske
        jmp     fail
        ;; digit 7
        aisc    0x1
        jsr     lbi_call_reg3 + 7 * 2
        ske
        jmp     fail
        ;; digit 8
        aisc    0x1
        jsr     lbi_call_reg3 + 8 * 2
        ske
        jmp     fail
        ;; digit 9
        aisc    0x1
        jsr     lbi_call_reg3 + 9 * 2
        ske
        jmp     fail
        ;; digit 10
        aisc    0x1
        jsr     lbi_call_reg3 + 10 * 2
        ske
        jmp     fail
        ;; digit 11
        aisc    0x1
        jsr     lbi_call_reg3 + 11 * 2
        ske
        jmp     fail
        ;; digit 12
        aisc    0x1
        jsr     lbi_call_reg3 + 12 * 2
        ske
        jmp     fail
        ;; digit 13
        aisc    0x1
        jsr     lbi_call_reg3 + 13 * 2
        ske
        jmp     fail
        ;; digit 14
        aisc    0x1
        jsr     lbi_call_reg3 + 14 * 2
        ske
        jmp     fail
        ;; digit 15
        aisc    0x1
        jsr     lbi_call_reg3 + 15 * 2
        ske
        jmp     fail
 
 
 
        jmp     pass
 
 
        ;;
        ;; initialize current register with proper values
        ;;
init_reg:
        clra
        cab
        stii    0x0
        stii    0x1
        stii    0x2
        stii    0x3
        stii    0x4
        stii    0x5
        stii    0x6
        stii    0x7
        stii    0x8
        stii    0x9
        stii    0xa
        stii    0xb
        stii    0xc
        stii    0xd
        stii    0xe
        stii    0xf
        ret
 
        ;;
        ;; clear current register
        ;;
clear_reg:
        clra
        cab
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        stii    0x0
        ret
 
        include "pass_fail.asm"

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[/] [t400/] [trunk/] [sw/] [verif/] [black_box/] [lbi_long/] [test.asm] - Blame information for rev 179

Line No.	Rev	Author	Line
1	32	arniml	`;; *******************************************************************`
2	179	arniml	`;; $Id: test.asm 179 2009-04-01 19:48:38Z arniml $`
3	32	arniml	`;;`
4			`;; Checks the LBI instruction (two byte).`
5			`;;`
6
7			`;; the cpu type is defined on asl's command line`
8
9			`org 0x00`
10			`clra`
11
12			`;; register 0`
13			`ld 0x0`
14			`jsr clear_reg`
15			`;; register 1`
16			`ld 0x1`
17			`jsr clear_reg`
18			`;; register 2`
19			`ld 0x3`
20			`jsr clear_reg`
21			`;; register 3`
22			`ld 0x1`
23			`jsr clear_reg`
24
25			`jmp test_code`
26
27
28			`;; subroutines for combined long LBI`
29			`org 0x010`
30			`lbi_call_reg0:`
31			`db 0x33, 0x80 ; lbi 0, 0`
32			`db 0x33, 0x81 ; lbi 0, 1`
33			`db 0x33, 0x82 ; lbi 0, 2`
34			`db 0x33, 0x83 ; lbi 0, 3`
35			`db 0x33, 0x84 ; lbi 0, 4`
36			`db 0x33, 0x85 ; lbi 0, 5`
37			`db 0x33, 0x86 ; lbi 0, 6`
38			`db 0x33, 0x87 ; lbi 0, 7`
39			`db 0x33, 0x88 ; lbi 0, 8`
40			`db 0x33, 0x89 ; lbi 0, 9`
41			`db 0x33, 0x8a ; lbi 0, 10`
42			`db 0x33, 0x8b ; lbi 0, 11`
43			`db 0x33, 0x8c ; lbi 0, 12`
44			`db 0x33, 0x8d ; lbi 0, 13`
45			`db 0x33, 0x8e ; lbi 0, 14`
46			`db 0x33, 0x8f ; lbi 0, 15`
47			`ret`
48			`jmp fail ; catch me if you can`
49			`lbi_call_reg1:`
50			`db 0x33, 0x90 ; lbi 1, 0`
51			`db 0x33, 0x91 ; lbi 1, 1`
52			`db 0x33, 0x92 ; lbi 1, 2`
53			`db 0x33, 0x93 ; lbi 1, 3`
54			`db 0x33, 0x94 ; lbi 1, 4`
55			`db 0x33, 0x95 ; lbi 1, 5`
56			`db 0x33, 0x96 ; lbi 1, 6`
57			`db 0x33, 0x97 ; lbi 1, 7`
58			`db 0x33, 0x98 ; lbi 1, 8`
59			`db 0x33, 0x99 ; lbi 1, 9`
60			`db 0x33, 0x9a ; lbi 1, 10`
61			`db 0x33, 0x9b ; lbi 1, 11`
62			`db 0x33, 0x9c ; lbi 1, 12`
63			`db 0x33, 0x9d ; lbi 1, 13`
64			`db 0x33, 0x9e ; lbi 1, 14`
65			`db 0x33, 0x9f ; lbi 1, 15`
66			`ret`
67			`jmp fail ; catch me if you can`
68			`lbi_call_reg2:`
69			`db 0x33, 0xa0 ; lbi 2, 0`
70			`db 0x33, 0xa1 ; lbi 2, 1`
71			`db 0x33, 0xa2 ; lbi 2, 2`
72			`db 0x33, 0xa3 ; lbi 2, 3`
73			`db 0x33, 0xa4 ; lbi 2, 4`
74			`db 0x33, 0xa5 ; lbi 2, 5`
75			`db 0x33, 0xa6 ; lbi 2, 6`
76			`db 0x33, 0xa7 ; lbi 2, 7`
77			`db 0x33, 0xa8 ; lbi 2, 8`
78			`db 0x33, 0xa9 ; lbi 2, 9`
79			`db 0x33, 0xaa ; lbi 2, 10`
80			`db 0x33, 0xab ; lbi 2, 11`
81			`db 0x33, 0xac ; lbi 2, 12`
82			`db 0x33, 0xad ; lbi 2, 13`
83			`db 0x33, 0xae ; lbi 2, 14`
84			`db 0x33, 0xaf ; lbi 2, 15`
85			`ret`
86			`jmp fail ; catch me if you can`
87			`lbi_call_reg3:`
88			`db 0x33, 0xb0 ; lbi 3, 0`
89			`db 0x33, 0xb1 ; lbi 3, 1`
90			`db 0x33, 0xb2 ; lbi 3, 2`
91			`db 0x33, 0xb3 ; lbi 3, 3`
92			`db 0x33, 0xb4 ; lbi 3, 4`
93			`db 0x33, 0xb5 ; lbi 3, 5`
94			`db 0x33, 0xb6 ; lbi 3, 6`
95			`db 0x33, 0xb7 ; lbi 3, 7`
96			`db 0x33, 0xb8 ; lbi 3, 8`
97			`db 0x33, 0xb9 ; lbi 3, 9`
98			`db 0x33, 0xba ; lbi 3, 10`
99			`db 0x33, 0xbb ; lbi 3, 11`
100			`db 0x33, 0xbc ; lbi 3, 12`
101			`db 0x33, 0xbd ; lbi 3, 13`
102			`db 0x33, 0xbe ; lbi 3, 14`
103			`db 0x33, 0xbf ; lbi 3, 15`
104			`ret`
105			`jmp fail ; catch me if you can`
106
107
108			`;;`
109			`;; now test each register digit`
110			`;;`
111			`test_code:`
112
113			`;; *******************************************************************`
114			`;; register 0`
115			`;;`
116			`;; initialize all digits of register`
117			`;;`
118			`ld 0x3 ; r: 3 -> 0`
119			`jsr init_reg`
120
121
122			`;; digit 0`
123			`clra`
124			`jsr lbi_call_reg0 + 0 * 2`
125			`ske`
126			`jmp fail`
127			`;; digit 1`
128			`aisc 0x1`
129			`jsr lbi_call_reg0 + 1 * 2`
130			`ske`
131			`jmp fail`
132			`;; digit 2`
133			`aisc 0x1`
134			`jsr lbi_call_reg0 + 2 * 2`
135			`ske`
136			`jmp fail`
137			`;; digit 3`
138			`aisc 0x1`
139			`jsr lbi_call_reg0 + 3 * 2`
140			`ske`
141			`jmp fail`
142			`;; digit 4`
143			`aisc 0x1`
144			`jsr lbi_call_reg0 + 4 * 2`
145			`ske`
146			`jmp fail`
147			`;; digit 5`
148			`aisc 0x1`
149			`jsr lbi_call_reg0 + 5 * 2`
150			`ske`
151			`jmp fail`
152			`;; digit 6`
153			`aisc 0x1`
154			`jsr lbi_call_reg0 + 6 * 2`
155			`ske`
156			`jmp fail`
157			`;; digit 7`
158			`aisc 0x1`
159			`jsr lbi_call_reg0 + 7 * 2`
160			`ske`
161			`jmp fail`
162			`;; digit 8`
163			`aisc 0x1`
164			`jsr lbi_call_reg0 + 8 * 2`
165			`ske`
166			`jmp fail`
167			`;; digit 9`
168			`aisc 0x1`
169			`jsr lbi_call_reg0 + 9 * 2`
170			`ske`
171			`jmp fail`
172			`;; digit 10`
173			`aisc 0x1`
174			`jsr lbi_call_reg0 + 10 * 2`
175			`ske`
176			`jmp fail`
177			`;; digit 11`
178			`aisc 0x1`
179			`jsr lbi_call_reg0 + 11 * 2`
180			`ske`
181			`jmp fail`
182			`;; digit 12`
183			`aisc 0x1`
184			`jsr lbi_call_reg0 + 12 * 2`
185			`ske`
186			`jmp fail`
187			`;; digit 13`
188			`aisc 0x1`
189			`jsr lbi_call_reg0 + 13 * 2`
190			`ske`
191			`jmp fail`
192			`;; digit 14`
193			`aisc 0x1`
194			`jsr lbi_call_reg0 + 14 * 2`
195			`ske`
196			`jmp fail`
197			`;; digit 15`
198			`aisc 0x1`
199			`jsr lbi_call_reg0 + 15 * 2`
200			`ske`
201			`jmp fail`
202
203
204			`;; *******************************************************************`
205			`;; register 1`
206			`;;`
207			`;; initialize all digits of register`
208			`;;`
209			`ld 0x0 ; r: 0 -> 0`
210			`jsr clear_reg`
211			`ld 0x1 ; r: 0 -> 1`
212			`jsr init_reg`
213
214
215			`;; digit 0`
216			`clra`
217			`jsr lbi_call_reg1 + 0 * 2`
218			`ske`
219			`jmp fail`
220			`;; digit 1`
221			`aisc 0x1`
222			`jsr lbi_call_reg1 + 1 * 2`
223			`ske`
224			`jmp fail`
225			`;; digit 2`
226			`aisc 0x1`
227			`jsr lbi_call_reg1 + 2 * 2`
228			`ske`
229			`jmp fail`
230			`;; digit 3`
231			`aisc 0x1`
232			`jsr lbi_call_reg1 + 3 * 2`
233			`ske`
234			`jmp fail`
235			`;; digit 4`
236			`aisc 0x1`
237			`jsr lbi_call_reg1 + 4 * 2`
238			`ske`
239			`jmp fail`
240			`;; digit 5`
241			`aisc 0x1`
242			`jsr lbi_call_reg1 + 5 * 2`
243			`ske`
244			`jmp fail`
245			`;; digit 6`
246			`aisc 0x1`
247			`jsr lbi_call_reg1 + 6 * 2`
248			`ske`
249			`jmp fail`
250			`;; digit 7`
251			`aisc 0x1`
252			`jsr lbi_call_reg1 + 7 * 2`
253			`ske`
254			`jmp fail`
255			`;; digit 8`
256			`aisc 0x1`
257			`jsr lbi_call_reg1 + 8 * 2`
258			`ske`
259			`jmp fail`
260			`;; digit 9`
261			`aisc 0x1`
262			`jsr lbi_call_reg1 + 9 * 2`
263			`ske`
264			`jmp fail`
265			`;; digit 10`
266			`aisc 0x1`
267			`jsr lbi_call_reg1 + 10 * 2`
268			`ske`
269			`jmp fail`
270			`;; digit 11`
271			`aisc 0x1`
272			`jsr lbi_call_reg1 + 11 * 2`
273			`ske`
274			`jmp fail`
275			`;; digit 12`
276			`aisc 0x1`
277			`jsr lbi_call_reg1 + 12 * 2`
278			`ske`
279			`jmp fail`
280			`;; digit 13`
281			`aisc 0x1`
282			`jsr lbi_call_reg1 + 13 * 2`
283			`ske`
284			`jmp fail`
285			`;; digit 14`
286			`aisc 0x1`
287			`jsr lbi_call_reg1 + 14 * 2`
288			`ske`
289			`jmp fail`
290			`;; digit 15`
291			`aisc 0x1`
292			`jsr lbi_call_reg1 + 15 * 2`
293			`ske`
294			`jmp fail`
295
296
297			`;; *******************************************************************`
298			`;; register 2`
299			`;;`
300			`;; initialize all digits of register`
301			`;;`
302			`ld 0x0 ; r: 1 -> 1`
303			`jsr clear_reg`
304			`ld 0x3 ; r: 1 -> 2`
305			`jsr init_reg`
306
307
308			`;; digit 0`
309			`clra`
310			`jsr lbi_call_reg2 + 0 * 2`
311			`ske`
312			`jmp fail`
313			`;; digit 1`
314			`aisc 0x1`
315			`jsr lbi_call_reg2 + 1 * 2`
316			`ske`
317			`jmp fail`
318			`;; digit 2`
319			`aisc 0x1`
320			`jsr lbi_call_reg2 + 2 * 2`
321			`ske`
322			`jmp fail`
323			`;; digit 3`
324			`aisc 0x1`
325			`jsr lbi_call_reg2 + 3 * 2`
326			`ske`
327			`jmp fail`
328			`;; digit 4`
329			`aisc 0x1`
330			`jsr lbi_call_reg2 + 4 * 2`
331			`ske`
332			`jmp fail`
333			`;; digit 5`
334			`aisc 0x1`
335			`jsr lbi_call_reg2 + 5 * 2`
336			`ske`
337			`jmp fail`
338			`;; digit 6`
339			`aisc 0x1`
340			`jsr lbi_call_reg2 + 6 * 2`
341			`ske`
342			`jmp fail`
343			`;; digit 7`
344			`aisc 0x1`
345			`jsr lbi_call_reg2 + 7 * 2`
346			`ske`
347			`jmp fail`
348			`;; digit 8`
349			`aisc 0x1`
350			`jsr lbi_call_reg2 + 8 * 2`
351			`ske`
352			`jmp fail`
353			`;; digit 9`
354			`aisc 0x1`
355			`jsr lbi_call_reg2 + 9 * 2`
356			`ske`
357			`jmp fail`
358			`;; digit 10`
359			`aisc 0x1`
360			`jsr lbi_call_reg2 + 10 * 2`
361			`ske`
362			`jmp fail`
363			`;; digit 11`
364			`aisc 0x1`
365			`jsr lbi_call_reg2 + 11 * 2`
366			`ske`
367			`jmp fail`
368			`;; digit 12`
369			`aisc 0x1`
370			`jsr lbi_call_reg2 + 12 * 2`
371			`ske`
372			`jmp fail`
373			`;; digit 13`
374			`aisc 0x1`
375			`jsr lbi_call_reg2 + 13 * 2`
376			`ske`
377			`jmp fail`
378			`;; digit 14`
379			`aisc 0x1`
380			`jsr lbi_call_reg2 + 14 * 2`
381			`ske`
382			`jmp fail`
383			`;; digit 15`
384			`aisc 0x1`
385			`jsr lbi_call_reg2 + 15 * 2`
386			`ske`
387			`jmp fail`
388
389
390			`;; *******************************************************************`
391			`;; register 3`
392			`;;`
393			`;; initialize all digits of register`
394			`;;`
395			`ld 0x0 ; r: 2 -> 2`
396			`jsr clear_reg`
397			`ld 0x1 ; r: 2 -> 3`
398			`jsr init_reg`
399
400
401			`;; digit 0`
402			`clra`
403			`jsr lbi_call_reg3 + 0 * 2`
404			`ske`
405			`jmp fail`
406			`;; digit 1`
407			`aisc 0x1`
408			`jsr lbi_call_reg3 + 1 * 2`
409			`ske`
410			`jmp fail`
411			`;; digit 2`
412			`aisc 0x1`
413			`jsr lbi_call_reg3 + 2 * 2`
414			`ske`
415			`jmp fail`
416			`;; digit 3`
417			`aisc 0x1`
418			`jsr lbi_call_reg3 + 3 * 2`
419			`ske`
420			`jmp fail`
421			`;; digit 4`
422			`aisc 0x1`
423			`jsr lbi_call_reg3 + 4 * 2`
424			`ske`
425			`jmp fail`
426			`;; digit 5`
427			`aisc 0x1`
428			`jsr lbi_call_reg3 + 5 * 2`
429			`ske`
430			`jmp fail`
431			`;; digit 6`
432			`aisc 0x1`
433			`jsr lbi_call_reg3 + 6 * 2`
434			`ske`
435			`jmp fail`
436			`;; digit 7`
437			`aisc 0x1`
438			`jsr lbi_call_reg3 + 7 * 2`
439			`ske`
440			`jmp fail`
441			`;; digit 8`
442			`aisc 0x1`
443			`jsr lbi_call_reg3 + 8 * 2`
444			`ske`
445			`jmp fail`
446			`;; digit 9`
447			`aisc 0x1`
448			`jsr lbi_call_reg3 + 9 * 2`
449			`ske`
450			`jmp fail`
451			`;; digit 10`
452			`aisc 0x1`
453			`jsr lbi_call_reg3 + 10 * 2`
454			`ske`
455			`jmp fail`
456			`;; digit 11`
457			`aisc 0x1`
458			`jsr lbi_call_reg3 + 11 * 2`
459			`ske`
460			`jmp fail`
461			`;; digit 12`
462			`aisc 0x1`
463			`jsr lbi_call_reg3 + 12 * 2`
464			`ske`
465			`jmp fail`
466			`;; digit 13`
467			`aisc 0x1`
468			`jsr lbi_call_reg3 + 13 * 2`
469			`ske`
470			`jmp fail`
471			`;; digit 14`
472			`aisc 0x1`
473			`jsr lbi_call_reg3 + 14 * 2`
474			`ske`
475			`jmp fail`
476			`;; digit 15`
477			`aisc 0x1`
478			`jsr lbi_call_reg3 + 15 * 2`
479			`ske`
480			`jmp fail`
481
482
483
484			`jmp pass`
485
486
487			`;;`
488			`;; initialize current register with proper values`
489			`;;`
490			`init_reg:`
491			`clra`
492			`cab`
493			`stii 0x0`
494			`stii 0x1`
495			`stii 0x2`
496			`stii 0x3`
497			`stii 0x4`
498			`stii 0x5`
499			`stii 0x6`
500			`stii 0x7`
501			`stii 0x8`
502			`stii 0x9`
503			`stii 0xa`
504			`stii 0xb`
505			`stii 0xc`
506			`stii 0xd`
507			`stii 0xe`
508			`stii 0xf`
509			`ret`
510
511			`;;`
512			`;; clear current register`
513			`;;`
514			`clear_reg:`
515			`clra`
516			`cab`
517			`stii 0x0`
518			`stii 0x0`
519			`stii 0x0`
520			`stii 0x0`
521			`stii 0x0`
522			`stii 0x0`
523			`stii 0x0`
524			`stii 0x0`
525			`stii 0x0`
526			`stii 0x0`
527			`stii 0x0`
528			`stii 0x0`
529			`stii 0x0`
530			`stii 0x0`
531			`stii 0x0`
532			`stii 0x0`
533			`ret`
534
535			`include "pass_fail.asm"`