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        ;; *******************************************************************
        ;; $Id: test.asm 179 2009-04-01 19:48:38Z arniml $
        ;;
        ;; Checks the LBI instruction (single byte).
        ;;
 
        ;; the cpu type is defined on asl's command line
 
        org     0x00
        clra
 
        ;;
        ;; initialize 4 x 8 RAM digits
        ;;
 
        ;; register 0
        stii    0x0
        aisc    0x9
        cab
        stii    0x1
        stii    0x2
        stii    0x3
        stii    0x4
        stii    0x5
        stii    0x6
        stii    0x7
 
        ;; register 1
        ld      0x1
        stii    0x4
        cba
        aisc    0x8
        cab
        stii    0x5
        stii    0x6
        stii    0x7
        stii    0x8
        stii    0x9
        stii    0xa
        stii    0xb
 
        ;; register 2
        ld      0x3
        stii    0x8
        cba
        aisc    0x8
        cab
        stii    0x9
        stii    0xa
        stii    0xb
        stii    0xc
        stii    0xd
        stii    0xe
        stii    0xf
 
        ;; register 3
        ld      0x1
        stii    0xc
        cba
        aisc    0x8
        cab
        stii    0xd
        stii    0xe
        stii    0xf
        stii    0x0
        stii    0x1
        stii    0x2
        stii    0x3
 
        jmp     test_code
 
 
        ;; subroutine page 2
        org     0x80
lbi_call_reg0:
        lbi     0, 0
        lbi     0, 9
        lbi     0, 10
        lbi     0, 11
        lbi     0, 12
        lbi     0, 13
        lbi     0, 14
        lbi     0, 15
        ret
lbi_call_reg1:
        lbi     1, 0
        lbi     1, 9
        lbi     1, 10
        lbi     1, 11
        lbi     1, 12
        lbi     1, 13
        lbi     1, 14
        lbi     1, 15
        ret
lbi_call_reg2:
        lbi     2, 0
        lbi     2, 9
        lbi     2, 10
        lbi     2, 11
        lbi     2, 12
        lbi     2, 13
        lbi     2, 14
        lbi     2, 15
        ret
lbi_call_reg3:
        lbi     3, 0
        lbi     3, 9
        lbi     3, 10
        lbi     3, 11
        lbi     3, 12
        lbi     3, 13
        lbi     3, 14
        lbi     3, 15
        ret
 
 
        org     0x100
 
        ;;
        ;; now test each register digit
        ;;
test_code:
 
        ;; register 0
        ;; digit 0
        clra
        jsrp    lbi_call_reg0 + 0
        ske
        jmp     fail
        ;; digit 9
        aisc    0x1
        jsrp    lbi_call_reg0 + 1
        ske
        jmp     fail
        ;; digit 10
        aisc    0x1
        jsrp    lbi_call_reg0 + 2
        ske
        jmp     fail
        ;; digit 11
        aisc    0x1
        jsrp    lbi_call_reg0 + 3
        ske
        jmp     fail
        ;; digit 12
        aisc    0x1
        jsrp    lbi_call_reg0 + 4
        ske
        jmp     fail
        ;; digit 13
        aisc    0x1
        jsrp    lbi_call_reg0 + 5
        ske
        jmp     fail
        ;; digit 14
        aisc    0x1
        jsrp    lbi_call_reg0 + 6
        ske
        jmp     fail
        ;; digit 15
        aisc    0x1
        jsrp    lbi_call_reg0 + 7
        ske
        jmp     fail
 
        ;; register 1
        ;; digit 0
        clra
        aisc     0x4
        jsrp    lbi_call_reg1 + 0
        ske
        jmp     fail
        ;; digit 9
        aisc    0x1
        jsrp    lbi_call_reg1 + 1
        ske
        jmp     fail
        ;; digit 10
        aisc    0x1
        jsrp    lbi_call_reg1 + 2
        ske
        jmp     fail
        ;; digit 11
        aisc    0x1
        jsrp    lbi_call_reg1 + 3
        ske
        jmp     fail
        ;; digit 12
        aisc    0x1
        jsrp    lbi_call_reg1 + 4
        ske
        jmp     fail
        ;; digit 13
        aisc    0x1
        jsrp    lbi_call_reg1 + 5
        ske
        jmp     fail
        ;; digit 14
        aisc    0x1
        jsrp    lbi_call_reg1 + 6
        ske
        jmp     fail
        ;; digit 15
        aisc    0x1
        jsrp    lbi_call_reg1 + 7
        ske
        jmp     fail
 
        ;; register 2
        ;; digit 0
        clra
        aisc    0x8
        jsrp    lbi_call_reg2 + 0
        ske
        jmp     fail
        ;; digit 9
        aisc    0x1
        jsrp    lbi_call_reg2 + 1
        ske
        jmp     fail
        ;; digit 10
        aisc    0x1
        jsrp    lbi_call_reg2 + 2
        ske
        jmp     fail
        ;; digit 11
        aisc    0x1
        jsrp    lbi_call_reg2 + 3
        ske
        jmp     fail
        ;; digit 12
        aisc    0x1
        jsrp    lbi_call_reg2 + 4
        ske
        jmp     fail
        ;; digit 13
        aisc    0x1
        jsrp    lbi_call_reg2 + 5
        ske
        jmp     fail
        ;; digit 14
        aisc    0x1
        jsrp    lbi_call_reg2 + 6
        ske
        jmp     fail
        ;; digit 15
        aisc    0x1
        jsrp    lbi_call_reg2 + 7
        ske
        jmp     fail
 
        ;; register 3
        ;; digit 0
        clra
        aisc    0xc
        jsrp    lbi_call_reg3 + 0
        ske
        jmp     fail
        ;; digit 9
        aisc    0x1
        jsrp    lbi_call_reg3 + 1
        ske
        jmp     fail
        ;; digit 10
        aisc    0x1
        jsrp    lbi_call_reg3 + 2
        ske
        jmp     fail
        ;; digit 11
        aisc    0x1
        jsrp    lbi_call_reg3 + 3
        ske
        jmp     fail
        ;; digit 12
        aisc    0x1
        nop
        jsrp    lbi_call_reg3 + 4
        ske
        jmp     fail
        ;; digit 13
        aisc    0x1
        jsrp    lbi_call_reg3 + 5
        ske
        jmp     fail
        ;; digit 14
        aisc    0x1
        jsrp    lbi_call_reg3 + 6
        ske
        jmp     fail
        ;; digit 15
        aisc    0x1
        jsrp    lbi_call_reg3 + 7
        ske
        jmp     fail
 
 
        jmp     pass
 
        include "pass_fail.asm"

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Subversion Repositories t400

[/] [t400/] [trunk/] [sw/] [verif/] [black_box/] [lbi_short/] [test.asm] - Blame information for rev 179

Line No.	Rev	Author	Line
1	2	arniml	`;; *******************************************************************`
2	179	arniml	`;; $Id: test.asm 179 2009-04-01 19:48:38Z arniml $`
3	2	arniml	`;;`
4			`;; Checks the LBI instruction (single byte).`
5			`;;`
6
7			`;; the cpu type is defined on asl's command line`
8
9			`org 0x00`
10			`clra`
11
12			`;;`
13			`;; initialize 4 x 8 RAM digits`
14			`;;`
15
16			`;; register 0`
17			`stii 0x0`
18			`aisc 0x9`
19			`cab`
20			`stii 0x1`
21			`stii 0x2`
22			`stii 0x3`
23			`stii 0x4`
24			`stii 0x5`
25			`stii 0x6`
26			`stii 0x7`
27
28			`;; register 1`
29			`ld 0x1`
30			`stii 0x4`
31			`cba`
32			`aisc 0x8`
33			`cab`
34			`stii 0x5`
35			`stii 0x6`
36			`stii 0x7`
37			`stii 0x8`
38			`stii 0x9`
39			`stii 0xa`
40			`stii 0xb`
41
42			`;; register 2`
43			`ld 0x3`
44			`stii 0x8`
45			`cba`
46			`aisc 0x8`
47			`cab`
48			`stii 0x9`
49			`stii 0xa`
50			`stii 0xb`
51			`stii 0xc`
52			`stii 0xd`
53			`stii 0xe`
54			`stii 0xf`
55
56			`;; register 3`
57			`ld 0x1`
58			`stii 0xc`
59			`cba`
60			`aisc 0x8`
61			`cab`
62			`stii 0xd`
63			`stii 0xe`
64			`stii 0xf`
65			`stii 0x0`
66			`stii 0x1`
67			`stii 0x2`
68			`stii 0x3`
69
70			`jmp test_code`
71
72
73			`;; subroutine page 2`
74			`org 0x80`
75			`lbi_call_reg0:`
76			`lbi 0, 0`
77			`lbi 0, 9`
78			`lbi 0, 10`
79			`lbi 0, 11`
80			`lbi 0, 12`
81			`lbi 0, 13`
82			`lbi 0, 14`
83			`lbi 0, 15`
84			`ret`
85			`lbi_call_reg1:`
86			`lbi 1, 0`
87			`lbi 1, 9`
88			`lbi 1, 10`
89			`lbi 1, 11`
90			`lbi 1, 12`
91			`lbi 1, 13`
92			`lbi 1, 14`
93			`lbi 1, 15`
94			`ret`
95			`lbi_call_reg2:`
96			`lbi 2, 0`
97			`lbi 2, 9`
98			`lbi 2, 10`
99			`lbi 2, 11`
100			`lbi 2, 12`
101			`lbi 2, 13`
102			`lbi 2, 14`
103			`lbi 2, 15`
104			`ret`
105			`lbi_call_reg3:`
106			`lbi 3, 0`
107			`lbi 3, 9`
108			`lbi 3, 10`
109			`lbi 3, 11`
110			`lbi 3, 12`
111			`lbi 3, 13`
112			`lbi 3, 14`
113			`lbi 3, 15`
114			`ret`
115
116
117			`org 0x100`
118
119			`;;`
120			`;; now test each register digit`
121			`;;`
122			`test_code:`
123
124			`;; register 0`
125			`;; digit 0`
126			`clra`
127			`jsrp lbi_call_reg0 + 0`
128			`ske`
129			`jmp fail`
130			`;; digit 9`
131			`aisc 0x1`
132			`jsrp lbi_call_reg0 + 1`
133			`ske`
134			`jmp fail`
135			`;; digit 10`
136			`aisc 0x1`
137			`jsrp lbi_call_reg0 + 2`
138			`ske`
139			`jmp fail`
140			`;; digit 11`
141			`aisc 0x1`
142			`jsrp lbi_call_reg0 + 3`
143			`ske`
144			`jmp fail`
145			`;; digit 12`
146			`aisc 0x1`
147			`jsrp lbi_call_reg0 + 4`
148			`ske`
149			`jmp fail`
150			`;; digit 13`
151			`aisc 0x1`
152			`jsrp lbi_call_reg0 + 5`
153			`ske`
154			`jmp fail`
155			`;; digit 14`
156			`aisc 0x1`
157			`jsrp lbi_call_reg0 + 6`
158			`ske`
159			`jmp fail`
160			`;; digit 15`
161			`aisc 0x1`
162			`jsrp lbi_call_reg0 + 7`
163			`ske`
164			`jmp fail`
165
166			`;; register 1`
167			`;; digit 0`
168			`clra`
169			`aisc 0x4`
170			`jsrp lbi_call_reg1 + 0`
171			`ske`
172			`jmp fail`
173			`;; digit 9`
174			`aisc 0x1`
175			`jsrp lbi_call_reg1 + 1`
176			`ske`
177			`jmp fail`
178			`;; digit 10`
179			`aisc 0x1`
180			`jsrp lbi_call_reg1 + 2`
181			`ske`
182			`jmp fail`
183			`;; digit 11`
184			`aisc 0x1`
185			`jsrp lbi_call_reg1 + 3`
186			`ske`
187			`jmp fail`
188			`;; digit 12`
189			`aisc 0x1`
190			`jsrp lbi_call_reg1 + 4`
191			`ske`
192			`jmp fail`
193			`;; digit 13`
194			`aisc 0x1`
195			`jsrp lbi_call_reg1 + 5`
196			`ske`
197			`jmp fail`
198			`;; digit 14`
199			`aisc 0x1`
200			`jsrp lbi_call_reg1 + 6`
201			`ske`
202			`jmp fail`
203			`;; digit 15`
204			`aisc 0x1`
205			`jsrp lbi_call_reg1 + 7`
206			`ske`
207			`jmp fail`
208
209			`;; register 2`
210			`;; digit 0`
211			`clra`
212			`aisc 0x8`
213			`jsrp lbi_call_reg2 + 0`
214			`ske`
215			`jmp fail`
216			`;; digit 9`
217			`aisc 0x1`
218			`jsrp lbi_call_reg2 + 1`
219			`ske`
220			`jmp fail`
221			`;; digit 10`
222			`aisc 0x1`
223			`jsrp lbi_call_reg2 + 2`
224			`ske`
225			`jmp fail`
226			`;; digit 11`
227			`aisc 0x1`
228			`jsrp lbi_call_reg2 + 3`
229			`ske`
230			`jmp fail`
231			`;; digit 12`
232			`aisc 0x1`
233			`jsrp lbi_call_reg2 + 4`
234			`ske`
235			`jmp fail`
236			`;; digit 13`
237			`aisc 0x1`
238			`jsrp lbi_call_reg2 + 5`
239			`ske`
240			`jmp fail`
241			`;; digit 14`
242			`aisc 0x1`
243			`jsrp lbi_call_reg2 + 6`
244			`ske`
245			`jmp fail`
246			`;; digit 15`
247			`aisc 0x1`
248			`jsrp lbi_call_reg2 + 7`
249			`ske`
250			`jmp fail`
251
252			`;; register 3`
253			`;; digit 0`
254			`clra`
255			`aisc 0xc`
256			`jsrp lbi_call_reg3 + 0`
257			`ske`
258			`jmp fail`
259			`;; digit 9`
260			`aisc 0x1`
261			`jsrp lbi_call_reg3 + 1`
262			`ske`
263			`jmp fail`
264			`;; digit 10`
265			`aisc 0x1`
266			`jsrp lbi_call_reg3 + 2`
267			`ske`
268			`jmp fail`
269			`;; digit 11`
270			`aisc 0x1`
271			`jsrp lbi_call_reg3 + 3`
272			`ske`
273			`jmp fail`
274			`;; digit 12`
275			`aisc 0x1`
276			`nop`
277			`jsrp lbi_call_reg3 + 4`
278			`ske`
279			`jmp fail`
280			`;; digit 13`
281			`aisc 0x1`
282			`jsrp lbi_call_reg3 + 5`
283			`ske`
284			`jmp fail`
285			`;; digit 14`
286			`aisc 0x1`
287			`jsrp lbi_call_reg3 + 6`
288			`ske`
289			`jmp fail`
290			`;; digit 15`
291			`aisc 0x1`
292			`jsrp lbi_call_reg3 + 7`
293			`ske`
294			`jmp fail`
295
296
297			`jmp pass`
298
299			`include "pass_fail.asm"`