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        ;; *******************************************************************
        ;; $Id: test.asm 179 2009-04-01 19:48:38Z arniml $
        ;;
        ;; Checks the XDS instruction.
        ;;
 
        ;; the cpu type is defined on asl's command line
 
        org     0x00
        clra
 
 
        ;; *******************************************************************
        ;; XOR 0
        jsr     init_ram
 
        ;; xor 0 in digit 0
        lbi     0, 0
        jsr     init_bd
        ;;
        xds     0                ; 0, 3 = 0x3
        ;;
        cba
        xds     0                ; 0, 2 = 0x2
        ;;
        cba
        xds     0                ; 0, 1 = 0x1
        ;;
        cba
        xds     0                ; 0, 0 = 0x0
        jmp     fail
 
        ;; xor 0 in digit 1
        lbi     1, 0
        jsr     init_bd
        ;;
        aisc    1 << 2
        xds     0                ; 1, 3 = 0x7
        ;;
        cba
        aisc    1 << 2
        xds     0                ; 1, 2 = 0x6
        ;;
        cba
        aisc    1 << 2
        xds     0                ; 1, 1 = 0x5
        ;;
        cba
        aisc    1 << 2
        xds     0                ; 1, 0 = 0x4
        jmp     fail
 
        ;; xor 0 in digit 2
        lbi     2, 0
        jsr     init_bd
        ;;
        aisc    2 << 2
        xds     0                ; 2, 3 = 0xb
        ;;
        cba
        aisc    2 << 2
        xds     0                ; 2, 2 = 0xa
        ;;
        cba
        aisc    2 << 2
        xds     0                ; 2, 1 = 0x9
        ;;
        cba
        aisc    2 << 2
        xds     0                ; 2, 0 = 0x8
        jmp     fail
 
        ;; xor 0 in digit 3
        lbi     3, 0
        jsr     init_bd
        ;;
        aisc    3 << 2
        xds     0                ; 3, 3 = 0xf
        ;;
        cba
        aisc    3 << 2
        xds     0                ; 3, 2 = 0xe
        ;;
        cba
        aisc    3 << 2
        xds     0                ; 3, 1 = 0xd
        ;;
        cba
        aisc    3 << 2
        xds     0                ; 3, 0 = 0xc
        jmp     fail
        ;; check remaining Br == 3
        clra
        cab
        aisc    0xc
        ske
        jmp     fail
 
        jsr     check_ram
 
 
        ;; *******************************************************************
        ;; XOR 1
        jsr     init_ram
 
        ;;
        ;; xor 1 in digit 0 & 1
        ;;
        lbi     0, 0
        jsr     init_bd
        ;;
        xds     1               ; 0, 3 = 0x3
        ;;
        cba
        aisc    1 << 2
        xds     1               ; 1, 2 = 0x6
        ;;
        cba
        xds     1               ; 0, 1 = 0x1
        ;;
        cba
        aisc    1 << 2
        xds     1               ; 1, 0 = 0x4
        jmp     fail
        ;; check remaining Br == 0
        clra
        cab
        aisc    0xf             ; RAM init value
        ske
        jmp     fail
        ;; reload to Br = 1
        lbi     1, 0
        jsr     init_bd
        ;;
        aisc    1 << 2
        xds     1               ; 1, 3 = 0x7
        ;;
        cba
        xds     1               ; 0, 2 = 0x2
        ;;
        cba
        aisc    1 << 2
        xds     1               ; 1, 1 = 0x5
        ;;
        cba
        xds     1               ; 0, 0 = 0x0
        jmp     fail
        ;; check remaining Br == 1
        clra
        cab
        aisc    0x4
        ske
        jmp     fail
 
        ;;
        ;; xor 1 in digit 2 & 3
        ;;
        lbi     2, 0
        jsr     init_bd
        ;;
        aisc    2 << 2
        xds     1               ; 2, 3 = 0xb
        ;;
        cba
        aisc    3 << 2
        xds     1               ; 3, 2 = 0xe
        ;;
        cba
        aisc    2 << 2
        xds     1               ; 2, 1 = 0x9
        ;;
        cba
        aisc    3 << 2
        xds     1               ; 3, 0 = 0xc
        jmp     fail
        ;; check remaining Br == 2
        clra
        cab
        aisc    0x7             ; RAM init value
        ske
        jmp     fail
        ;; reload to Br = 3
        lbi     3, 0
        jsr     init_bd
        ;;
        aisc    3 << 2
        xds     1               ; 3, 3 = 0xf
        ;;
        cba
        aisc    2 << 2
        xds     1               ; 2, 2 = 0xa
        ;;
        cba
        aisc    3 << 2
        xds     1               ; 3, 1 = 0xd
        ;;
        cba
        aisc    2 << 2
        xds     1               ; 2, 0 = 0x8
        jmp     fail
        ;; check remaining Br == 3
        clra
        cab
        aisc    0xc
        ske
        jmp     fail
 
        jsr     check_ram
 
 
        ;; *******************************************************************
        ;; XOR 2
        jsr     init_ram
 
        ;;
        ;; xor 2 in digit 0 & 2
        ;;
        lbi     0, 0
        jsr     init_bd
        ;;
        xds     2               ; 0, 3 = 0x3
        ;;
        cba
        aisc    2 << 2
        xds     2               ; 2, 2 = 0xa
        ;;
        cba
        xds     2               ; 0, 1 = 0x1
        ;;
        cba
        aisc    2 << 2
        xds     2               ; 2, 0 = 0x8
        jmp     fail
        ;; check remainig Br == 0
        clra
        cab
        aisc    0xf             ; RAM init value
        ske
        jmp     fail
        ;; reload to Br == 2
        lbi     2, 0
        jsr     init_bd
        ;;
        aisc    2 << 2
        xds     2               ; 2, 3 = 0xb
        ;;
        cba
        xds     2               ; 0, 2 = 0x2
        ;;
        cba
        aisc    2 << 2
        xds     2               ; 2, 1 = 0x9
        ;;
        cba
        xds     2               ; 0, 0 = 0x0
        jmp     fail
        ;; check remainig Br == 2
        clra
        cab
        aisc    0x8
        ske
        jmp     fail
 
        ;;
        ;; xor 2 in digit 1 & 3
        ;;
        lbi     1, 0
        jsr     init_bd
        ;;
        aisc    1 << 2
        xds     2               ; 1, 3 = 0x7
        ;;
        cba
        aisc    3 << 2
        xds     2               ; 3, 2 = 0xe
        ;;
        cba
        aisc    1 << 2
        xds     2               ; 1, 1 = 0x5
        ;;
        cba
        aisc    3 << 2
        xds     2               ; 3, 0 = 0xc
        jmp     fail
        ;; check remaining Br == 1
        clra
        cab
        aisc    0xc             ; RAM init value
        ske
        jmp     fail
        ;; reload to Br = 3
        lbi     3, 0
        jsr     init_bd
        ;;
        aisc    3 << 2
        xds     2               ; 3, 3 = 0xf
        ;;
        cba
        aisc    1 << 2
        xds     2               ; 1, 2 = 0x6
        ;;
        cba
        aisc    3 << 2
        xds     2               ; 3, 1 = 0xd
        ;;
        cba
        aisc    1 << 2
        xds     2               ; 1, 0 = 0x4
        jmp     fail
        ;; check remaining Br == 3
        clra
        cab
        aisc    0xc
        ske
        jmp     fail
 
        jsr     check_ram
 
 
        ;; *******************************************************************
        ;; XOR 3
        jsr     init_ram
 
        ;;
        ;; xor 3 in digit 0 & 3
        ;;
        lbi     0, 0
        jsr     init_bd
        ;;
        xds     3               ; 0, 3 = 0x3
        ;;
        cba
        aisc    3 << 2
        xds     3               ; 3, 2 = 0xe
        ;;
        cba
        xds     3               ; 0, 1 = 0x1
        ;;
        cba
        aisc    3 << 2
        xds     3               ; 3, 0 = 0xc
        jmp     fail
        ;; check remaining BR == 0
        clra
        cab
        aisc    0xf             ; RAM init value
        ske
        jmp     fail
        ;; reload BR = 3
        lbi     3, 0
        jsr     init_bd
        ;;
        aisc    3 << 2
        xds     3               ; 3, 3 = 0xf
        ;;
        cba
        xds     3               ; 0, 2 = 0x2
        ;;
        cba
        aisc    3 << 2
        xds     3               ; 3, 1 = 0xb
        ;;
        cba
        xds     3               ; 0, 0 = 0x0
        jmp     fail
        ;; check remaining BR == 3
        clra
        cab
        aisc    0xc
        ske
        jmp     fail
 
        ;;
        ;; xor 3 in digit 1 & 2
        ;;
        lbi     1, 0
        jsr     init_bd
        ;;
        aisc    1 << 2
        xds     3               ; 1, 3 = 0x7
        ;;
        cba
        aisc    2 << 2
        xds     3               ; 2, 2 = 0xa
        ;;
        cba
        aisc    1 << 2
        xds     3               ; 1, 1 = 0x5
        ;;
        cba
        aisc    2 << 2
        xds     3               ; 2, 0 = 0x8
        jmp     fail
        ;; check remaining BR == 1
        clra
        cab
        aisc    0xc             ; RAM init value
        ske
        jmp     fail
        ;; reload BR = 2
        lbi     2, 0
        jsr     init_bd
        ;;
        aisc    2 << 2
        xds     3               ; 2, 3 = 0xb
        ;;
        cba
        aisc    1 << 2
        xds     3               ; 1, 2 = 0x6
        ;;
        cba
        aisc    2 << 2
        xds     3               ; 2, 1 = 0x9
        ;;
        cba
        aisc    1 << 2
        xds     3               ; 1, 0 = 0x5
        jmp     fail
        ;; check remaining BR == 2
        clra
        cab
        aisc    0x8
        ske
        jmp     fail
 
        jsr     check_ram
 
 
        jmp     pass
 
 
 
 
        org     0x158
 
        ;; initializes Bd to 3
init_bd:
        clra
        aisc    0x3
        cab
        ret
 
 
        ;; preload digits of each data register
init_ram:
        ;; Br = 0
        lbi     0, 0
        stii    0xf
        stii    0xe
        stii    0xd
        stii    0xb
        ;; Br = 1
        lbi     1, 0
        stii    0xc
        stii    0xa
        stii    0x9
        stii    0x8
        ;; Br = 2
        lbi     2, 0
        stii    0x7
        stii    0x6
        stii    0x5
        stii    0x4
        ;; Br = 3
        lbi     3, 0
        stii    0x3
        stii    0x2
        stii    0x1
        stii    0x0
        ret
 
 
check   MACRO   dig
        ;; check dig, 0
        clra
        IF      dig > 0
        aisc    dig << 2
        ENDIF
        ske
        jmp     fail
        ;; check 0, 1
        clra
        aisc    0x1
        cab
        IF      dig > 0
        aisc    dig << 2
        ENDIF
        ske
        jmp     fail
        ;; check 0, 2
        clra
        aisc    0x2
        cab
        IF      dig > 0
        aisc    dig << 2
        ENDIF
        ske
        jmp     fail
        ;; check 0, 3
        clra
        aisc    0x3
        cab
        IF      dig > 0
        aisc    dig << 2
        ENDIF
        ske
        jmp     fail
        ENDM
 
        ;; check contents of RAM entries
check_ram:
        ;; check digit 0
        lbi     0, 0
        check   0
 
        ;; check digit 1
        lbi     1, 0
        check   1
 
        ;; check digit 2
        lbi     2, 0
        check   2
 
        ;; check digit 3
        lbi     3, 0
        check   3
 
        ret
 
        include "pass_fail.asm"

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[/] [t400/] [trunk/] [sw/] [verif/] [black_box/] [xds/] [test.asm] - Blame information for rev 179

Line No.	Rev	Author	Line
1	2	arniml	`;; *******************************************************************`
2	179	arniml	`;; $Id: test.asm 179 2009-04-01 19:48:38Z arniml $`
3	2	arniml	`;;`
4			`;; Checks the XDS instruction.`
5			`;;`
6
7			`;; the cpu type is defined on asl's command line`
8
9			`org 0x00`
10			`clra`
11
12
13			`;; *******************************************************************`
14			`;; XOR 0`
15			`jsr init_ram`
16
17			`;; xor 0 in digit 0`
18			`lbi 0, 0`
19			`jsr init_bd`
20			`;;`
21			`xds 0 ; 0, 3 = 0x3`
22			`;;`
23			`cba`
24			`xds 0 ; 0, 2 = 0x2`
25			`;;`
26			`cba`
27			`xds 0 ; 0, 1 = 0x1`
28			`;;`
29			`cba`
30			`xds 0 ; 0, 0 = 0x0`
31			`jmp fail`
32
33			`;; xor 0 in digit 1`
34			`lbi 1, 0`
35			`jsr init_bd`
36			`;;`
37			`aisc 1 << 2`
38			`xds 0 ; 1, 3 = 0x7`
39			`;;`
40			`cba`
41			`aisc 1 << 2`
42			`xds 0 ; 1, 2 = 0x6`
43			`;;`
44			`cba`
45			`aisc 1 << 2`
46			`xds 0 ; 1, 1 = 0x5`
47			`;;`
48			`cba`
49			`aisc 1 << 2`
50			`xds 0 ; 1, 0 = 0x4`
51			`jmp fail`
52
53			`;; xor 0 in digit 2`
54			`lbi 2, 0`
55			`jsr init_bd`
56			`;;`
57			`aisc 2 << 2`
58			`xds 0 ; 2, 3 = 0xb`
59			`;;`
60			`cba`
61			`aisc 2 << 2`
62			`xds 0 ; 2, 2 = 0xa`
63			`;;`
64			`cba`
65			`aisc 2 << 2`
66			`xds 0 ; 2, 1 = 0x9`
67			`;;`
68			`cba`
69			`aisc 2 << 2`
70			`xds 0 ; 2, 0 = 0x8`
71			`jmp fail`
72
73			`;; xor 0 in digit 3`
74			`lbi 3, 0`
75			`jsr init_bd`
76			`;;`
77			`aisc 3 << 2`
78			`xds 0 ; 3, 3 = 0xf`
79			`;;`
80			`cba`
81			`aisc 3 << 2`
82			`xds 0 ; 3, 2 = 0xe`
83			`;;`
84			`cba`
85			`aisc 3 << 2`
86			`xds 0 ; 3, 1 = 0xd`
87			`;;`
88			`cba`
89			`aisc 3 << 2`
90			`xds 0 ; 3, 0 = 0xc`
91			`jmp fail`
92			`;; check remaining Br == 3`
93			`clra`
94			`cab`
95			`aisc 0xc`
96			`ske`
97			`jmp fail`
98
99			`jsr check_ram`
100
101
102			`;; *******************************************************************`
103			`;; XOR 1`
104			`jsr init_ram`
105
106			`;;`
107			`;; xor 1 in digit 0 & 1`
108			`;;`
109			`lbi 0, 0`
110			`jsr init_bd`
111			`;;`
112			`xds 1 ; 0, 3 = 0x3`
113			`;;`
114			`cba`
115			`aisc 1 << 2`
116			`xds 1 ; 1, 2 = 0x6`
117			`;;`
118			`cba`
119			`xds 1 ; 0, 1 = 0x1`
120			`;;`
121			`cba`
122			`aisc 1 << 2`
123			`xds 1 ; 1, 0 = 0x4`
124			`jmp fail`
125			`;; check remaining Br == 0`
126			`clra`
127			`cab`
128			`aisc 0xf ; RAM init value`
129			`ske`
130			`jmp fail`
131			`;; reload to Br = 1`
132			`lbi 1, 0`
133			`jsr init_bd`
134			`;;`
135			`aisc 1 << 2`
136			`xds 1 ; 1, 3 = 0x7`
137			`;;`
138			`cba`
139			`xds 1 ; 0, 2 = 0x2`
140			`;;`
141			`cba`
142			`aisc 1 << 2`
143			`xds 1 ; 1, 1 = 0x5`
144			`;;`
145			`cba`
146			`xds 1 ; 0, 0 = 0x0`
147			`jmp fail`
148			`;; check remaining Br == 1`
149			`clra`
150			`cab`
151			`aisc 0x4`
152			`ske`
153			`jmp fail`
154
155			`;;`
156			`;; xor 1 in digit 2 & 3`
157			`;;`
158			`lbi 2, 0`
159			`jsr init_bd`
160			`;;`
161			`aisc 2 << 2`
162			`xds 1 ; 2, 3 = 0xb`
163			`;;`
164			`cba`
165			`aisc 3 << 2`
166			`xds 1 ; 3, 2 = 0xe`
167			`;;`
168			`cba`
169			`aisc 2 << 2`
170			`xds 1 ; 2, 1 = 0x9`
171			`;;`
172			`cba`
173			`aisc 3 << 2`
174			`xds 1 ; 3, 0 = 0xc`
175			`jmp fail`
176			`;; check remaining Br == 2`
177			`clra`
178			`cab`
179			`aisc 0x7 ; RAM init value`
180			`ske`
181			`jmp fail`
182			`;; reload to Br = 3`
183			`lbi 3, 0`
184			`jsr init_bd`
185			`;;`
186			`aisc 3 << 2`
187			`xds 1 ; 3, 3 = 0xf`
188			`;;`
189			`cba`
190			`aisc 2 << 2`
191			`xds 1 ; 2, 2 = 0xa`
192			`;;`
193			`cba`
194			`aisc 3 << 2`
195			`xds 1 ; 3, 1 = 0xd`
196			`;;`
197			`cba`
198			`aisc 2 << 2`
199			`xds 1 ; 2, 0 = 0x8`
200			`jmp fail`
201			`;; check remaining Br == 3`
202			`clra`
203			`cab`
204			`aisc 0xc`
205			`ske`
206			`jmp fail`
207
208			`jsr check_ram`
209
210
211			`;; *******************************************************************`
212			`;; XOR 2`
213			`jsr init_ram`
214
215			`;;`
216			`;; xor 2 in digit 0 & 2`
217			`;;`
218			`lbi 0, 0`
219			`jsr init_bd`
220			`;;`
221			`xds 2 ; 0, 3 = 0x3`
222			`;;`
223			`cba`
224			`aisc 2 << 2`
225			`xds 2 ; 2, 2 = 0xa`
226			`;;`
227			`cba`
228			`xds 2 ; 0, 1 = 0x1`
229			`;;`
230			`cba`
231			`aisc 2 << 2`
232			`xds 2 ; 2, 0 = 0x8`
233			`jmp fail`
234			`;; check remainig Br == 0`
235			`clra`
236			`cab`
237			`aisc 0xf ; RAM init value`
238			`ske`
239			`jmp fail`
240			`;; reload to Br == 2`
241			`lbi 2, 0`
242			`jsr init_bd`
243			`;;`
244			`aisc 2 << 2`
245			`xds 2 ; 2, 3 = 0xb`
246			`;;`
247			`cba`
248			`xds 2 ; 0, 2 = 0x2`
249			`;;`
250			`cba`
251			`aisc 2 << 2`
252			`xds 2 ; 2, 1 = 0x9`
253			`;;`
254			`cba`
255			`xds 2 ; 0, 0 = 0x0`
256			`jmp fail`
257			`;; check remainig Br == 2`
258			`clra`
259			`cab`
260			`aisc 0x8`
261			`ske`
262			`jmp fail`
263
264			`;;`
265			`;; xor 2 in digit 1 & 3`
266			`;;`
267			`lbi 1, 0`
268			`jsr init_bd`
269			`;;`
270			`aisc 1 << 2`
271			`xds 2 ; 1, 3 = 0x7`
272			`;;`
273			`cba`
274			`aisc 3 << 2`
275			`xds 2 ; 3, 2 = 0xe`
276			`;;`
277			`cba`
278			`aisc 1 << 2`
279			`xds 2 ; 1, 1 = 0x5`
280			`;;`
281			`cba`
282			`aisc 3 << 2`
283			`xds 2 ; 3, 0 = 0xc`
284			`jmp fail`
285			`;; check remaining Br == 1`
286			`clra`
287			`cab`
288			`aisc 0xc ; RAM init value`
289			`ske`
290			`jmp fail`
291			`;; reload to Br = 3`
292			`lbi 3, 0`
293			`jsr init_bd`
294			`;;`
295			`aisc 3 << 2`
296			`xds 2 ; 3, 3 = 0xf`
297			`;;`
298			`cba`
299			`aisc 1 << 2`
300			`xds 2 ; 1, 2 = 0x6`
301			`;;`
302			`cba`
303			`aisc 3 << 2`
304			`xds 2 ; 3, 1 = 0xd`
305			`;;`
306			`cba`
307			`aisc 1 << 2`
308			`xds 2 ; 1, 0 = 0x4`
309			`jmp fail`
310			`;; check remaining Br == 3`
311			`clra`
312			`cab`
313			`aisc 0xc`
314			`ske`
315			`jmp fail`
316
317			`jsr check_ram`
318
319
320			`;; *******************************************************************`
321			`;; XOR 3`
322			`jsr init_ram`
323
324			`;;`
325			`;; xor 3 in digit 0 & 3`
326			`;;`
327			`lbi 0, 0`
328			`jsr init_bd`
329			`;;`
330			`xds 3 ; 0, 3 = 0x3`
331			`;;`
332			`cba`
333			`aisc 3 << 2`
334			`xds 3 ; 3, 2 = 0xe`
335			`;;`
336			`cba`
337			`xds 3 ; 0, 1 = 0x1`
338			`;;`
339			`cba`
340			`aisc 3 << 2`
341			`xds 3 ; 3, 0 = 0xc`
342			`jmp fail`
343			`;; check remaining BR == 0`
344			`clra`
345			`cab`
346			`aisc 0xf ; RAM init value`
347			`ske`
348			`jmp fail`
349			`;; reload BR = 3`
350			`lbi 3, 0`
351			`jsr init_bd`
352			`;;`
353			`aisc 3 << 2`
354			`xds 3 ; 3, 3 = 0xf`
355			`;;`
356			`cba`
357			`xds 3 ; 0, 2 = 0x2`
358			`;;`
359			`cba`
360			`aisc 3 << 2`
361			`xds 3 ; 3, 1 = 0xb`
362			`;;`
363			`cba`
364			`xds 3 ; 0, 0 = 0x0`
365			`jmp fail`
366			`;; check remaining BR == 3`
367			`clra`
368			`cab`
369			`aisc 0xc`
370			`ske`
371			`jmp fail`
372
373			`;;`
374			`;; xor 3 in digit 1 & 2`
375			`;;`
376			`lbi 1, 0`
377			`jsr init_bd`
378			`;;`
379			`aisc 1 << 2`
380			`xds 3 ; 1, 3 = 0x7`
381			`;;`
382			`cba`
383			`aisc 2 << 2`
384			`xds 3 ; 2, 2 = 0xa`
385			`;;`
386			`cba`
387			`aisc 1 << 2`
388			`xds 3 ; 1, 1 = 0x5`
389			`;;`
390			`cba`
391			`aisc 2 << 2`
392			`xds 3 ; 2, 0 = 0x8`
393			`jmp fail`
394			`;; check remaining BR == 1`
395			`clra`
396			`cab`
397			`aisc 0xc ; RAM init value`
398			`ske`
399			`jmp fail`
400			`;; reload BR = 2`
401			`lbi 2, 0`
402			`jsr init_bd`
403			`;;`
404			`aisc 2 << 2`
405			`xds 3 ; 2, 3 = 0xb`
406			`;;`
407			`cba`
408			`aisc 1 << 2`
409			`xds 3 ; 1, 2 = 0x6`
410			`;;`
411			`cba`
412			`aisc 2 << 2`
413			`xds 3 ; 2, 1 = 0x9`
414			`;;`
415			`cba`
416			`aisc 1 << 2`
417			`xds 3 ; 1, 0 = 0x5`
418			`jmp fail`
419			`;; check remaining BR == 2`
420			`clra`
421			`cab`
422			`aisc 0x8`
423			`ske`
424			`jmp fail`
425
426			`jsr check_ram`
427
428
429			`jmp pass`
430
431
432
433
434			`org 0x158`
435
436			`;; initializes Bd to 3`
437			`init_bd:`
438			`clra`
439			`aisc 0x3`
440			`cab`
441			`ret`
442
443
444			`;; preload digits of each data register`
445			`init_ram:`
446			`;; Br = 0`
447			`lbi 0, 0`
448			`stii 0xf`
449			`stii 0xe`
450			`stii 0xd`
451			`stii 0xb`
452			`;; Br = 1`
453			`lbi 1, 0`
454			`stii 0xc`
455			`stii 0xa`
456			`stii 0x9`
457			`stii 0x8`
458			`;; Br = 2`
459			`lbi 2, 0`
460			`stii 0x7`
461			`stii 0x6`
462			`stii 0x5`
463			`stii 0x4`
464			`;; Br = 3`
465			`lbi 3, 0`
466			`stii 0x3`
467			`stii 0x2`
468			`stii 0x1`
469			`stii 0x0`
470			`ret`
471
472
473			`check MACRO dig`
474			`;; check dig, 0`
475			`clra`
476			`IF dig > 0`
477			`aisc dig << 2`
478			`ENDIF`
479			`ske`
480			`jmp fail`
481			`;; check 0, 1`
482			`clra`
483			`aisc 0x1`
484			`cab`
485			`IF dig > 0`
486			`aisc dig << 2`
487			`ENDIF`
488			`ske`
489			`jmp fail`
490			`;; check 0, 2`
491			`clra`
492			`aisc 0x2`
493			`cab`
494			`IF dig > 0`
495			`aisc dig << 2`
496			`ENDIF`
497			`ske`
498			`jmp fail`
499			`;; check 0, 3`
500			`clra`
501			`aisc 0x3`
502			`cab`
503			`IF dig > 0`
504			`aisc dig << 2`
505			`ENDIF`
506			`ske`
507			`jmp fail`
508			`ENDM`
509
510			`;; check contents of RAM entries`
511			`check_ram:`
512			`;; check digit 0`
513			`lbi 0, 0`
514			`check 0`
515
516			`;; check digit 1`
517			`lbi 1, 0`
518			`check 1`
519
520			`;; check digit 2`
521			`lbi 2, 0`
522			`check 2`
523
524			`;; check digit 3`
525			`lbi 3, 0`
526			`check 3`
527
528			`ret`
529
530			`include "pass_fail.asm"`