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URL https://opencores.org/ocsvn/tcp_socket/tcp_socket/trunk

Subversion Repositories tcp_socket

[/] [tcp_socket/] [trunk/] [TCPIP.pdf] - Blame information for rev 2

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1 2 jondawson 
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BT 1 0 0 1 0 26 Tm /F1 10 Tf 12 TL 1.584692 Tw (This project implements a TCP/IP stack. The TCP/IP stack acts as a server, and can accept a single) Tj T* 0 Tw .502927 Tw (connection to a TCP port. The connection is provided as a bidirectional stream of data to the application.) Tj T* 0 Tw (The following protocols are supported:) Tj T* ET
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BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
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BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (ARP request/response \(with 16 level cache\)) Tj T* ET
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1 0 0 1 20 18 cm
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BT /F1 10 Tf 12 TL ET
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1 0 0 1 6 -3 cm
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q
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BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
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Q
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q
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1 0 0 1 23 -3 cm
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q
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460 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (ICMP echo request/response \(ping\)) Tj T* ET
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BT /F1 10 Tf 12 TL ET
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1 0 0 1 6 -3 cm
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q
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BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
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1 0 0 1 23 -3 cm
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q
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BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (TCP/IP socket) Tj T* ET
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1 0 0 1 20 0 cm
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BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (The TCP/IP server consumes around 800 LUTs and 300 Flip-Flops in a Xilinx Spartan 6 device.) Tj T* ET
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BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (The TCP/IP stack is provided by two source files:) Tj T* ET
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BT /F1 10 Tf 12 TL ET
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1 0 0 1 20 30 cm
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1 0 0 1 20 18 cm
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BT /F1 10 Tf 12 TL ET
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1 0 0 1 6 -3 cm
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q
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560 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
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1 0 0 1 23 -3 cm
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BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (source/server.h) Tj T* ET
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1 0 0 1 20 0 cm
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BT /F1 10 Tf 12 TL ET
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1 0 0 1 6 -3 cm
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BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
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Q
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Q
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q
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1 0 0 1 23 -3 cm
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q
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BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (source/server.c) Tj T* ET
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1 0 0 1 20 0 cm
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611 
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612 
q
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1 0 0 1 62.69291 339.0236 cm
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616 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (The following parameters can be configured at compile time within source/server.h:) Tj T* ET
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618 
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619 
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622 
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623 
1 0 0 1 62.69291 279.0236 cm
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625 
BT /F1 10 Tf 12 TL ET
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BT 1 0 0 1 0 2 Tm  T* ET
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1 0 0 1 20 48 cm
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1 0 0 1 20 48 cm
632 
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633 
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634 
1 0 0 1 20 36 cm
635 
 
636 
BT /F1 10 Tf 12 TL ET
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q
638 
1 0 0 1 6 -3 cm
639 
q
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641 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
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1 0 0 1 23 -3 cm
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648 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Local Ethernet MAC address) Tj T* ET
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1 0 0 1 20 18 cm
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660 
BT /F1 10 Tf 12 TL ET
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1 0 0 1 6 -3 cm
663 
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665 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
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669 
1 0 0 1 23 -3 cm
670 
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672 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Local IP Address) Tj T* ET
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1 0 0 1 20 12 cm
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1 0 0 1 20 0 cm
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684 
BT /F1 10 Tf 12 TL ET
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1 0 0 1 6 -3 cm
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q
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689 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
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692 
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693 
1 0 0 1 23 -3 cm
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q
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696 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Local TCP Port number) Tj T* ET
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1 0 0 1 20 0 cm
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1 0 0 1 62.69291 279.0236 cm
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1 0 0 1 62.69291 246.0236 cm
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BT 1 0 0 1 0 3.5 Tm 21 TL /F2 17.5 Tf 0 0 0 rg (Compile) Tj T* ET
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1 0 0 1 62.69291 228.0236 cm
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BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Compile into a Verilog module \(server.v\) using the following command:) Tj T* ET
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n -6 -6 468.6898 24 re B*
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BT 1 0 0 1 0 2 Tm /F3 10 Tf 12 TL ($ chip2/c2verilog source/server.v) Tj T* ET
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1 0 0 1 62.69291 161.8236 cm
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1 0 0 1 62.69291 113.8236 cm
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BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (The Ethernet interface consists of two streams of data:) Tj T* ET
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q
765 
1 0 0 1 62.69291 107.8236 cm
766 
Q
767 
 
768 
endstream
769 
endobj
770 
% 'R28': class PDFStream
771 
28 0 obj
772 
% page stream
773 
<< /Length 8532 >>
774 
stream
775 
1 0 0 1 0 0 cm  BT /F1 12 Tf 14.4 TL ET
776 
q
777 
1 0 0 1 62.69291 729.0236 cm
778 
 
779 
BT /F1 10 Tf 12 TL ET
780 
BT 1 0 0 1 0 2 Tm  T* ET
781 
q
782 
1 0 0 1 20 30 cm
783 
Q
784 
q
785 
1 0 0 1 20 30 cm
786 
Q
787 
q
788 
1 0 0 1 20 18 cm
789 
 
790 
BT /F1 10 Tf 12 TL ET
791 
q
792 
1 0 0 1 6 -3 cm
793 
q
794 
 
795 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
796 
Q
797 
Q
798 
q
799 
1 0 0 1 23 -3 cm
800 
q
801 
 
802 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (An input, input_eth_rx.) Tj T* ET
803 
Q
804 
Q
805 
q
806 
Q
807 
Q
808 
q
809 
1 0 0 1 20 12 cm
810 
Q
811 
q
812 
1 0 0 1 20 0 cm
813 
 
814 
BT /F1 10 Tf 12 TL ET
815 
q
816 
1 0 0 1 6 -3 cm
817 
q
818 
 
819 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
820 
Q
821 
Q
822 
q
823 
1 0 0 1 23 -3 cm
824 
q
825 
 
826 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (An output, output_eth_tx.) Tj T* ET
827 
Q
828 
Q
829 
q
830 
Q
831 
Q
832 
q
833 
1 0 0 1 20 0 cm
834 
Q
835 
q
836 
Q
837 
Q
838 
q
839 
1 0 0 1 62.69291 729.0236 cm
840 
Q
841 
q
842 
1 0 0 1 62.69291 711.0236 cm
843 
q
844 
 
845 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Both streams are 16 bits wide, and use the following protocol:) Tj T* ET
846 
Q
847 
Q
848 
q
849 
1 0 0 1 62.69291 705.0236 cm
850 
Q
851 
q
852 
1 0 0 1 62.69291 651.0236 cm
853 
1 1 1 rg
854 
n 0 54 469.8898 -18 re f*
855 
.878431 .878431 .878431 rg
856 
n 0 36 469.8898 -18 re f*
857 
1 1 1 rg
858 
n 0 18 469.8898 -18 re f*
859 
 
860 
BT /F1 10 Tf 12 TL ET
861 
q
862 
1 0 0 1 6 39 cm
863 
q
864 
 
865 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (word) Tj T* ET
866 
Q
867 
Q
868 
q
869 
1 0 0 1 128.5799 39 cm
870 
q
871 
 
872 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (designation) Tj T* ET
873 
Q
874 
Q
875 
q
876 
1 0 0 1 6 21 cm
877 
q
878 
 
879 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (0) Tj T* ET
880 
Q
881 
Q
882 
q
883 
1 0 0 1 128.5799 21 cm
884 
q
885 
 
886 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (length in bytes) Tj T* ET
887 
Q
888 
Q
889 
q
890 
1 0 0 1 6 3 cm
891 
q
892 
 
893 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (n) Tj T* ET
894 
Q
895 
Q
896 
q
897 
1 0 0 1 128.5799 3 cm
898 
q
899 
 
900 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (data) Tj T* ET
901 
Q
902 
Q
903 
q
904 
1 J
905 
1 j
906 
 
907 
.25 w
908 
n 0 36 m 469.8898 36 l S
909 
n 0 18 m 469.8898 18 l S
910 
n 122.5799 0 m 122.5799 54 l S
911 
n 0 54 m 469.8898 54 l S
912 
n 0 0 m 469.8898 0 l S
913 
n 0 0 m 0 54 l S
914 
n 469.8898 0 m 469.8898 54 l S
915 
Q
916 
Q
917 
q
918 
1 0 0 1 62.69291 651.0236 cm
919 
Q
920 
q
921 
1 0 0 1 62.69291 621.0236 cm
922 
q
923 
BT 1 0 0 1 0 3 Tm 18 TL /F2 15 Tf 0 0 0 rg (Socket Interface) Tj T* ET
924 
Q
925 
Q
926 
q
927 
1 0 0 1 62.69291 603.0236 cm
928 
q
929 
 
930 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (The socket interface consists of two streams of data:) Tj T* ET
931 
Q
932 
Q
933 
q
934 
1 0 0 1 62.69291 597.0236 cm
935 
Q
936 
q
937 
1 0 0 1 62.69291 561.0236 cm
938 
 
939 
BT /F1 10 Tf 12 TL ET
940 
BT 1 0 0 1 0 2 Tm  T* ET
941 
q
942 
1 0 0 1 20 30 cm
943 
Q
944 
q
945 
1 0 0 1 20 30 cm
946 
Q
947 
q
948 
1 0 0 1 20 18 cm
949 
 
950 
BT /F1 10 Tf 12 TL ET
951 
q
952 
1 0 0 1 6 -3 cm
953 
q
954 
 
955 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
956 
Q
957 
Q
958 
q
959 
1 0 0 1 23 -3 cm
960 
q
961 
 
962 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (An input, input_socket.) Tj T* ET
963 
Q
964 
Q
965 
q
966 
Q
967 
Q
968 
q
969 
1 0 0 1 20 12 cm
970 
Q
971 
q
972 
1 0 0 1 20 0 cm
973 
 
974 
BT /F1 10 Tf 12 TL ET
975 
q
976 
1 0 0 1 6 -3 cm
977 
q
978 
 
979 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
980 
Q
981 
Q
982 
q
983 
1 0 0 1 23 -3 cm
984 
q
985 
 
986 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (An output, output_socket.) Tj T* ET
987 
Q
988 
Q
989 
q
990 
Q
991 
Q
992 
q
993 
1 0 0 1 20 0 cm
994 
Q
995 
q
996 
Q
997 
Q
998 
q
999 
1 0 0 1 62.69291 561.0236 cm
1000 
Q
1001 
q
1002 
1 0 0 1 62.69291 543.0236 cm
1003 
q
1004 
 
1005 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Both streams are 16 bits wide, and use the following protocol:) Tj T* ET
1006 
Q
1007 
Q
1008 
q
1009 
1 0 0 1 62.69291 537.0236 cm
1010 
Q
1011 
q
1012 
1 0 0 1 62.69291 483.0236 cm
1013 
1 1 1 rg
1014 
n 0 54 469.8898 -18 re f*
1015 
.878431 .878431 .878431 rg
1016 
n 0 36 469.8898 -18 re f*
1017 
1 1 1 rg
1018 
n 0 18 469.8898 -18 re f*
1019 
 
1020 
BT /F1 10 Tf 12 TL ET
1021 
q
1022 
1 0 0 1 6 39 cm
1023 
q
1024 
 
1025 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (word) Tj T* ET
1026 
Q
1027 
Q
1028 
q
1029 
1 0 0 1 128.5799 39 cm
1030 
q
1031 
 
1032 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (designation) Tj T* ET
1033 
Q
1034 
Q
1035 
q
1036 
1 0 0 1 6 21 cm
1037 
q
1038 
 
1039 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (0) Tj T* ET
1040 
Q
1041 
Q
1042 
q
1043 
1 0 0 1 128.5799 21 cm
1044 
q
1045 
 
1046 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (length in bytes) Tj T* ET
1047 
Q
1048 
Q
1049 
q
1050 
1 0 0 1 6 3 cm
1051 
q
1052 
 
1053 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (n) Tj T* ET
1054 
Q
1055 
Q
1056 
q
1057 
1 0 0 1 128.5799 3 cm
1058 
q
1059 
 
1060 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (data) Tj T* ET
1061 
Q
1062 
Q
1063 
q
1064 
1 J
1065 
1 j
1066 
 
1067 
.25 w
1068 
n 0 36 m 469.8898 36 l S
1069 
n 0 18 m 469.8898 18 l S
1070 
n 122.5799 0 m 122.5799 54 l S
1071 
n 0 54 m 469.8898 54 l S
1072 
n 0 0 m 469.8898 0 l S
1073 
n 0 0 m 0 54 l S
1074 
n 469.8898 0 m 469.8898 54 l S
1075 
Q
1076 
Q
1077 
q
1078 
1 0 0 1 62.69291 483.0236 cm
1079 
Q
1080 
q
1081 
1 0 0 1 62.69291 450.0236 cm
1082 
q
1083 
BT 1 0 0 1 0 3.5 Tm 21 TL /F2 17.5 Tf 0 0 0 rg (Stream Interconnect Conventions) Tj T* ET
1084 
Q
1085 
Q
1086 
q
1087 
1 0 0 1 62.69291 432.0236 cm
1088 
q
1089 
 
1090 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (The main aims of the interface are:) Tj T* ET
1091 
Q
1092 
Q
1093 
q
1094 
1 0 0 1 62.69291 426.0236 cm
1095 
Q
1096 
q
1097 
1 0 0 1 62.69291 354.0236 cm
1098 
 
1099 
BT /F1 10 Tf 12 TL ET
1100 
BT 1 0 0 1 0 2 Tm  T* ET
1101 
q
1102 
1 0 0 1 20 66 cm
1103 
Q
1104 
q
1105 
1 0 0 1 20 66 cm
1106 
Q
1107 
q
1108 
1 0 0 1 20 54 cm
1109 
 
1110 
BT /F1 10 Tf 12 TL ET
1111 
q
1112 
1 0 0 1 6 -3 cm
1113 
q
1114 
 
1115 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1116 
Q
1117 
Q
1118 
q
1119 
1 0 0 1 23 -3 cm
1120 
q
1121 
 
1122 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (To be simple to implement.) Tj T* ET
1123 
Q
1124 
Q
1125 
q
1126 
Q
1127 
Q
1128 
q
1129 
1 0 0 1 20 48 cm
1130 
Q
1131 
q
1132 
1 0 0 1 20 36 cm
1133 
 
1134 
BT /F1 10 Tf 12 TL ET
1135 
q
1136 
1 0 0 1 6 -3 cm
1137 
q
1138 
 
1139 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1140 
Q
1141 
Q
1142 
q
1143 
1 0 0 1 23 -3 cm
1144 
q
1145 
 
1146 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Add little performance/logic overhead.) Tj T* ET
1147 
Q
1148 
Q
1149 
q
1150 
Q
1151 
Q
1152 
q
1153 
1 0 0 1 20 30 cm
1154 
Q
1155 
q
1156 
1 0 0 1 20 18 cm
1157 
 
1158 
BT /F1 10 Tf 12 TL ET
1159 
q
1160 
1 0 0 1 6 -3 cm
1161 
q
1162 
 
1163 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1164 
Q
1165 
Q
1166 
q
1167 
1 0 0 1 23 -3 cm
1168 
q
1169 
 
1170 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Allow designs to grow without adding extra levels of asynchronous logic.) Tj T* ET
1171 
Q
1172 
Q
1173 
q
1174 
Q
1175 
Q
1176 
q
1177 
1 0 0 1 20 12 cm
1178 
Q
1179 
q
1180 
1 0 0 1 20 0 cm
1181 
 
1182 
BT /F1 10 Tf 12 TL ET
1183 
q
1184 
1 0 0 1 6 -3 cm
1185 
q
1186 
 
1187 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1188 
Q
1189 
Q
1190 
q
1191 
1 0 0 1 23 -3 cm
1192 
q
1193 
 
1194 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Easy to interface with standard interconnects.) Tj T* ET
1195 
Q
1196 
Q
1197 
q
1198 
Q
1199 
Q
1200 
q
1201 
1 0 0 1 20 0 cm
1202 
Q
1203 
q
1204 
Q
1205 
Q
1206 
q
1207 
1 0 0 1 62.69291 354.0236 cm
1208 
Q
1209 
q
1210 
1 0 0 1 62.69291 140.8236 cm
1211 
q
1212 
q
1213 
1 0 0 1 0 0 cm
1214 
q
1215 
1 0 0 1 6.6 6.6 cm
1216 
q
1217 
.662745 .662745 .662745 RG
1218 
.5 w
1219 
.960784 .960784 .862745 rg
1220 
n -6 -6 468.6898 204 re B*
1221 
Q
1222 
q
1223 
BT 1 0 0 1 0 182 Tm 12 TL /F3 10 Tf 0 0 0 rg (RST ) Tj (>) Tj (-o-----------------------------+) Tj T* (CLK ) Tj (>) Tj (-+-o-------------------------+ |) Tj T* (      | |                         | |) Tj T* (      | |   +-----------+         | |     +--------------+) Tj T* (      | |   | TX        |         | |     | RX           |) Tj T* (      | +---) Tj (>) Tj (           |         | +-----) Tj (>) Tj (              |) Tj T* (      +-----) Tj (>) Tj (           |         +-------) Tj (>) Tj (              |) Tj T* (            |           |                 |              |) Tj T* (            |           | ) Tj (<) Tj (BUS_NAME) Tj (>) Tj (      |              |) Tj T* (            |       out ) Tj (>) Tj (=================) Tj (>) Tj ( in           |) Tj T* (            |           | ) Tj (<) Tj (BUS_NAME) Tj (>) Tj (_STB  |              |) Tj T* (            |       out ) Tj (>) Tj (-----------------) Tj (>) Tj ( in           |) Tj T* (            |           | ) Tj (<) Tj (BUS_NAME) Tj (>) Tj (_ACK  |              |) Tj T* (            |       in  ) Tj (<) Tj (-----------------) Tj (<) Tj ( out          |) Tj T* (            |           |                 |              |) Tj T* (            +-----------+                 +--------------+) Tj T* ET
1224 
Q
1225 
Q
1226 
Q
1227 
Q
1228 
Q
1229 
q
1230 
1 0 0 1 62.69291 110.8236 cm
1231 
q
1232 
BT 1 0 0 1 0 3 Tm 18 TL /F2 15 Tf 0 0 0 rg (Global Signals) Tj T* ET
1233 
Q
1234 
Q
1235 
q
1236 
1 0 0 1 62.69291 98.82362 cm
1237 
Q
1238 
q
1239 
1 0 0 1 62.69291 80.82362 cm
1240 
1 1 1 rg
1241 
n 0 18 469.8898 -18 re f*
1242 
 
1243 
BT /F1 10 Tf 12 TL ET
1244 
q
1245 
1 0 0 1 6 3 cm
1246 
q
1247 
 
1248 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Name) Tj T* ET
1249 
Q
1250 
Q
1251 
q
1252 
1 0 0 1 84.31496 3 cm
1253 
q
1254 
 
1255 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Direction) Tj T* ET
1256 
Q
1257 
Q
1258 
q
1259 
1 0 0 1 227.8924 3 cm
1260 
q
1261 
 
1262 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Type) Tj T* ET
1263 
Q
1264 
Q
1265 
q
1266 
1 0 0 1 306.2073 3 cm
1267 
q
1268 
 
1269 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Description) Tj T* ET
1270 
Q
1271 
Q
1272 
q
1273 
1 J
1274 
1 j
1275 
 
1276 
.25 w
1277 
n 0 0 m 469.8898 0 l S
1278 
n 78.31496 0 m 78.31496 18 l S
1279 
n 221.8924 0 m 221.8924 18 l S
1280 
n 300.2073 0 m 300.2073 18 l S
1281 
n 0 18 m 469.8898 18 l S
1282 
n 0 0 m 0 18 l S
1283 
n 469.8898 0 m 469.8898 18 l S
1284 
Q
1285 
Q
1286 
 
1287 
endstream
1288 
endobj
1289 
% 'R29': class PDFStream
1290 
29 0 obj
1291 
% page stream
1292 
<< /Length 10789 >>
1293 
stream
1294 
1 0 0 1 0 0 cm  BT /F1 12 Tf 14.4 TL ET
1295 
q
1296 
1 0 0 1 62.69291 729.0236 cm
1297 
1 1 1 rg
1298 
n 0 36 469.8898 -18 re f*
1299 
.878431 .878431 .878431 rg
1300 
n 0 18 469.8898 -18 re f*
1301 
 
1302 
BT /F1 10 Tf 12 TL ET
1303 
q
1304 
1 0 0 1 6 21 cm
1305 
q
1306 
 
1307 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (CLK) Tj T* ET
1308 
Q
1309 
Q
1310 
q
1311 
1 0 0 1 84.31496 21 cm
1312 
q
1313 
 
1314 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (input) Tj T* ET
1315 
Q
1316 
Q
1317 
q
1318 
1 0 0 1 227.8924 21 cm
1319 
q
1320 
 
1321 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (bit) Tj T* ET
1322 
Q
1323 
Q
1324 
q
1325 
1 0 0 1 306.2073 21 cm
1326 
q
1327 
 
1328 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Clock) Tj T* ET
1329 
Q
1330 
Q
1331 
q
1332 
1 0 0 1 6 3 cm
1333 
q
1334 
 
1335 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (RST) Tj T* ET
1336 
Q
1337 
Q
1338 
q
1339 
1 0 0 1 84.31496 3 cm
1340 
q
1341 
 
1342 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (input) Tj T* ET
1343 
Q
1344 
Q
1345 
q
1346 
1 0 0 1 227.8924 3 cm
1347 
q
1348 
 
1349 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (bit) Tj T* ET
1350 
Q
1351 
Q
1352 
q
1353 
1 0 0 1 306.2073 3 cm
1354 
q
1355 
 
1356 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Reset) Tj T* ET
1357 
Q
1358 
Q
1359 
q
1360 
1 J
1361 
1 j
1362 
 
1363 
.25 w
1364 
n 0 36 m 469.8898 36 l S
1365 
n 0 18 m 469.8898 18 l S
1366 
n 78.31496 0 m 78.31496 36 l S
1367 
n 221.8924 0 m 221.8924 36 l S
1368 
n 300.2073 0 m 300.2073 36 l S
1369 
n 0 0 m 0 36 l S
1370 
n 469.8898 0 m 469.8898 36 l S
1371 
n 0 0 m 469.8898 0 l S
1372 
Q
1373 
Q
1374 
q
1375 
1 0 0 1 62.69291 729.0236 cm
1376 
Q
1377 
q
1378 
1 0 0 1 62.69291 699.0236 cm
1379 
q
1380 
BT 1 0 0 1 0 3 Tm 18 TL /F2 15 Tf 0 0 0 rg (Interconnect Signals) Tj T* ET
1381 
Q
1382 
Q
1383 
q
1384 
1 0 0 1 62.69291 687.0236 cm
1385 
Q
1386 
q
1387 
1 0 0 1 62.69291 615.0236 cm
1388 
1 1 1 rg
1389 
n 0 72 469.8898 -18 re f*
1390 
.878431 .878431 .878431 rg
1391 
n 0 54 469.8898 -18 re f*
1392 
1 1 1 rg
1393 
n 0 36 469.8898 -18 re f*
1394 
.878431 .878431 .878431 rg
1395 
n 0 18 469.8898 -18 re f*
1396 
 
1397 
BT /F1 10 Tf 12 TL ET
1398 
q
1399 
1 0 0 1 6 57 cm
1400 
q
1401 
 
1402 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Name) Tj T* ET
1403 
Q
1404 
Q
1405 
q
1406 
1 0 0 1 87.71996 57 cm
1407 
q
1408 
 
1409 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Direction) Tj T* ET
1410 
Q
1411 
Q
1412 
q
1413 
1 0 0 1 143.9024 57 cm
1414 
q
1415 
 
1416 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Type) Tj T* ET
1417 
Q
1418 
Q
1419 
q
1420 
1 0 0 1 174.5474 57 cm
1421 
q
1422 
 
1423 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Description) Tj T* ET
1424 
Q
1425 
Q
1426 
q
1427 
1 0 0 1 6 39 cm
1428 
q
1429 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (<) Tj (BUS_NAME) Tj (>) Tj T* ET
1430 
Q
1431 
Q
1432 
q
1433 
1 0 0 1 87.71996 39 cm
1434 
q
1435 
 
1436 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (TX to RX) Tj T* ET
1437 
Q
1438 
Q
1439 
q
1440 
1 0 0 1 143.9024 39 cm
1441 
q
1442 
 
1443 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (bus) Tj T* ET
1444 
Q
1445 
Q
1446 
q
1447 
1 0 0 1 174.5474 39 cm
1448 
q
1449 
 
1450 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Payload Data) Tj T* ET
1451 
Q
1452 
Q
1453 
q
1454 
1 0 0 1 6 21 cm
1455 
q
1456 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (<) Tj (BUS_NAME) Tj (>) Tj (_STB) Tj T* ET
1457 
Q
1458 
Q
1459 
q
1460 
1 0 0 1 87.71996 21 cm
1461 
q
1462 
 
1463 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (TX to RX) Tj T* ET
1464 
Q
1465 
Q
1466 
q
1467 
1 0 0 1 143.9024 21 cm
1468 
q
1469 
 
1470 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (bit) Tj T* ET
1471 
Q
1472 
Q
1473 
q
1474 
1 0 0 1 174.5474 21 cm
1475 
q
1476 
 
1477 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL ('1' indicates that payload data is valid and TX is ready.) Tj T* ET
1478 
Q
1479 
Q
1480 
q
1481 
1 0 0 1 6 3 cm
1482 
q
1483 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (<) Tj (BUS_NAME) Tj (>) Tj (_ACK) Tj T* ET
1484 
Q
1485 
Q
1486 
q
1487 
1 0 0 1 87.71996 3 cm
1488 
q
1489 
 
1490 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (TX to RX) Tj T* ET
1491 
Q
1492 
Q
1493 
q
1494 
1 0 0 1 143.9024 3 cm
1495 
q
1496 
 
1497 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (bit) Tj T* ET
1498 
Q
1499 
Q
1500 
q
1501 
1 0 0 1 174.5474 3 cm
1502 
q
1503 
 
1504 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL ('1' indicates that RX is ready.) Tj T* ET
1505 
Q
1506 
Q
1507 
q
1508 
1 J
1509 
1 j
1510 
 
1511 
.25 w
1512 
n 0 54 m 469.8898 54 l S
1513 
n 0 36 m 469.8898 36 l S
1514 
n 0 18 m 469.8898 18 l S
1515 
n 81.71996 0 m 81.71996 72 l S
1516 
n 137.9024 0 m 137.9024 72 l S
1517 
n 168.5474 0 m 168.5474 72 l S
1518 
n 0 72 m 469.8898 72 l S
1519 
n 0 0 m 469.8898 0 l S
1520 
n 0 0 m 0 72 l S
1521 
n 469.8898 0 m 469.8898 72 l S
1522 
Q
1523 
Q
1524 
q
1525 
1 0 0 1 62.69291 615.0236 cm
1526 
Q
1527 
q
1528 
1 0 0 1 62.69291 585.0236 cm
1529 
q
1530 
BT 1 0 0 1 0 3 Tm 18 TL /F2 15 Tf 0 0 0 rg (Interconnect Bus Transaction) Tj T* ET
1531 
Q
1532 
Q
1533 
q
1534 
1 0 0 1 62.69291 573.0236 cm
1535 
Q
1536 
q
1537 
1 0 0 1 62.69291 573.0236 cm
1538 
Q
1539 
q
1540 
1 0 0 1 62.69291 561.0236 cm
1541 
 
1542 
BT /F1 10 Tf 12 TL ET
1543 
q
1544 
1 0 0 1 6 -3 cm
1545 
q
1546 
 
1547 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1548 
Q
1549 
Q
1550 
q
1551 
1 0 0 1 23 -3 cm
1552 
q
1553 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (Both transmitter and receiver shall be synchronised to the '0' -) Tj (> '1' transition of CLK.) Tj T* ET
1554 
Q
1555 
Q
1556 
q
1557 
Q
1558 
Q
1559 
q
1560 
1 0 0 1 62.69291 555.0236 cm
1561 
Q
1562 
q
1563 
1 0 0 1 62.69291 531.0236 cm
1564 
 
1565 
BT /F1 10 Tf 12 TL ET
1566 
q
1567 
1 0 0 1 6 9 cm
1568 
q
1569 
 
1570 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1571 
Q
1572 
Q
1573 
q
1574 
1 0 0 1 23 -3 cm
1575 
q
1576 
BT 1 0 0 1 0 14 Tm .497988 Tw 12 TL /F1 10 Tf 0 0 0 rg (If RST is set to '1' upon the '0' -) Tj (> '1' transition of clock the transmitter shall terminate any active bus) Tj T* 0 Tw (transaction and set <) Tj (BUS_NAME) Tj (>) Tj (_STB to '0'.) Tj T* ET
1577 
Q
1578 
Q
1579 
q
1580 
Q
1581 
Q
1582 
q
1583 
1 0 0 1 62.69291 525.0236 cm
1584 
Q
1585 
q
1586 
1 0 0 1 62.69291 501.0236 cm
1587 
 
1588 
BT /F1 10 Tf 12 TL ET
1589 
q
1590 
1 0 0 1 6 9 cm
1591 
q
1592 
 
1593 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1594 
Q
1595 
Q
1596 
q
1597 
1 0 0 1 23 -3 cm
1598 
q
1599 
BT 1 0 0 1 0 14 Tm 1.081488 Tw 12 TL /F1 10 Tf 0 0 0 rg (If RST is set to '1' upon the '0' -) Tj (> '1' transition of clock the receiver shall terminate any active bus) Tj T* 0 Tw (transaction and set <) Tj (BUS_NAME) Tj (>) Tj (_ACK to '0'.) Tj T* ET
1600 
Q
1601 
Q
1602 
q
1603 
Q
1604 
Q
1605 
q
1606 
1 0 0 1 62.69291 495.0236 cm
1607 
Q
1608 
q
1609 
1 0 0 1 62.69291 483.0236 cm
1610 
 
1611 
BT /F1 10 Tf 12 TL ET
1612 
q
1613 
1 0 0 1 6 -3 cm
1614 
q
1615 
 
1616 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1617 
Q
1618 
Q
1619 
q
1620 
1 0 0 1 23 -3 cm
1621 
q
1622 
 
1623 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (If RST is set to '0', normal operation shall commence as follows:) Tj T* ET
1624 
Q
1625 
Q
1626 
q
1627 
Q
1628 
Q
1629 
q
1630 
1 0 0 1 62.69291 477.0236 cm
1631 
Q
1632 
q
1633 
1 0 0 1 62.69291 465.0236 cm
1634 
 
1635 
BT /F1 10 Tf 12 TL ET
1636 
q
1637 
1 0 0 1 6 -3 cm
1638 
q
1639 
 
1640 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1641 
Q
1642 
Q
1643 
q
1644 
1 0 0 1 23 -3 cm
1645 
q
1646 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (The transmitter may insert wait states on the bus by setting <) Tj (BUS_NAME) Tj (>) Tj (_STB '0'.) Tj T* ET
1647 
Q
1648 
Q
1649 
q
1650 
Q
1651 
Q
1652 
q
1653 
1 0 0 1 62.69291 459.0236 cm
1654 
Q
1655 
q
1656 
1 0 0 1 62.69291 447.0236 cm
1657 
 
1658 
BT /F1 10 Tf 12 TL ET
1659 
q
1660 
1 0 0 1 6 -3 cm
1661 
q
1662 
 
1663 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1664 
Q
1665 
Q
1666 
q
1667 
1 0 0 1 23 -3 cm
1668 
q
1669 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (The transmitter shall set <) Tj (BUS_NAME) Tj (>) Tj (_STB to '1' to signify that data is valid.) Tj T* ET
1670 
Q
1671 
Q
1672 
q
1673 
Q
1674 
Q
1675 
q
1676 
1 0 0 1 62.69291 441.0236 cm
1677 
Q
1678 
q
1679 
1 0 0 1 62.69291 429.0236 cm
1680 
 
1681 
BT /F1 10 Tf 12 TL ET
1682 
q
1683 
1 0 0 1 6 -3 cm
1684 
q
1685 
 
1686 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1687 
Q
1688 
Q
1689 
q
1690 
1 0 0 1 23 -3 cm
1691 
q
1692 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (Once <) Tj (BUS_NAME) Tj (>) Tj (_STB has been set to '1', it shall remain at '1' until the transaction completes.) Tj T* ET
1693 
Q
1694 
Q
1695 
q
1696 
Q
1697 
Q
1698 
q
1699 
1 0 0 1 62.69291 423.0236 cm
1700 
Q
1701 
q
1702 
1 0 0 1 62.69291 399.0236 cm
1703 
 
1704 
BT /F1 10 Tf 12 TL ET
1705 
q
1706 
1 0 0 1 6 9 cm
1707 
q
1708 
 
1709 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1710 
Q
1711 
Q
1712 
q
1713 
1 0 0 1 23 -3 cm
1714 
q
1715 
BT 1 0 0 1 0 14 Tm 3.036905 Tw 12 TL /F1 10 Tf 0 0 0 rg (The transmitter shall ensure that <) Tj (BUS_NAME) Tj (> contains valid data for the entire period that) Tj T* 0 Tw (<) Tj (BUS_NAME) Tj (>) Tj (_STB is '1'.) Tj T* ET
1716 
Q
1717 
Q
1718 
q
1719 
Q
1720 
Q
1721 
q
1722 
1 0 0 1 62.69291 393.0236 cm
1723 
Q
1724 
q
1725 
1 0 0 1 62.69291 381.0236 cm
1726 
 
1727 
BT /F1 10 Tf 12 TL ET
1728 
q
1729 
1 0 0 1 6 -3 cm
1730 
q
1731 
 
1732 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1733 
Q
1734 
Q
1735 
q
1736 
1 0 0 1 23 -3 cm
1737 
q
1738 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (The transmitter may set <) Tj (BUS_NAME) Tj (> to any value when <) Tj (BUS_NAME) Tj (>) Tj (_STB is '0'.) Tj T* ET
1739 
Q
1740 
Q
1741 
q
1742 
Q
1743 
Q
1744 
q
1745 
1 0 0 1 62.69291 375.0236 cm
1746 
Q
1747 
q
1748 
1 0 0 1 62.69291 363.0236 cm
1749 
 
1750 
BT /F1 10 Tf 12 TL ET
1751 
q
1752 
1 0 0 1 6 -3 cm
1753 
q
1754 
 
1755 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1756 
Q
1757 
Q
1758 
q
1759 
1 0 0 1 23 -3 cm
1760 
q
1761 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (The receiver may insert wait states on the bus by setting <) Tj (BUS_NAME) Tj (>) Tj (_ACK to '0'.) Tj T* ET
1762 
Q
1763 
Q
1764 
q
1765 
Q
1766 
Q
1767 
q
1768 
1 0 0 1 62.69291 357.0236 cm
1769 
Q
1770 
q
1771 
1 0 0 1 62.69291 345.0236 cm
1772 
 
1773 
BT /F1 10 Tf 12 TL ET
1774 
q
1775 
1 0 0 1 6 -3 cm
1776 
q
1777 
 
1778 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1779 
Q
1780 
Q
1781 
q
1782 
1 0 0 1 23 -3 cm
1783 
q
1784 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (The receiver shall set <) Tj (BUS_NAME) Tj (>) Tj (_ACK to '1' to signify that it is ready to receive data.) Tj T* ET
1785 
Q
1786 
Q
1787 
q
1788 
Q
1789 
Q
1790 
q
1791 
1 0 0 1 62.69291 339.0236 cm
1792 
Q
1793 
q
1794 
1 0 0 1 62.69291 327.0236 cm
1795 
 
1796 
BT /F1 10 Tf 12 TL ET
1797 
q
1798 
1 0 0 1 6 -3 cm
1799 
q
1800 
 
1801 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1802 
Q
1803 
Q
1804 
q
1805 
1 0 0 1 23 -3 cm
1806 
q
1807 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (Once <) Tj (BUS_NAME) Tj (>) Tj (_ACK has been set to '1', it shall remain at '1' until the transaction completes.) Tj T* ET
1808 
Q
1809 
Q
1810 
q
1811 
Q
1812 
Q
1813 
q
1814 
1 0 0 1 62.69291 321.0236 cm
1815 
Q
1816 
q
1817 
1 0 0 1 62.69291 297.0236 cm
1818 
 
1819 
BT /F1 10 Tf 12 TL ET
1820 
q
1821 
1 0 0 1 6 9 cm
1822 
q
1823 
 
1824 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1825 
Q
1826 
Q
1827 
q
1828 
1 0 0 1 23 -3 cm
1829 
q
1830 
BT 1 0 0 1 0 14 Tm 3.199069 Tw 12 TL /F1 10 Tf 0 0 0 rg (Whenever <) Tj (BUS_NAME) Tj (>) Tj (_STB is '1' and <) Tj (BUS_NAME) Tj (>) Tj (_ACK are '1', a bus transaction shall) Tj T* 0 Tw (complete on the following '0' -) Tj (> '1' transition of CLK.) Tj T* ET
1831 
Q
1832 
Q
1833 
q
1834 
Q
1835 
Q
1836 
q
1837 
1 0 0 1 62.69291 297.0236 cm
1838 
Q
1839 
q
1840 
1 0 0 1 62.69291 91.11439 cm
1841 
q
1842 
q
1843 
.96447 0 0 .96447 0 0 cm
1844 
q
1845 
1 0 0 1 6.6 6.843137 cm
1846 
q
1847 
.662745 .662745 .662745 RG
1848 
.5 w
1849 
.960784 .960784 .862745 rg
1850 
n -6 -6 486 204 re B*
1851 
Q
1852 
q
1853 
BT 1 0 0 1 0 182 Tm 12 TL /F3 10 Tf 0 0 0 rg (RST) Tj T* (                 --------------------------------------------------------------) Tj T* (                   -   -   -   -   -   -   -   -   -   -   -   -   -   -   -) Tj T* ( CLK              | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |) Tj T* (                 -   -   -   -   -   -   -   -   -   -   -   -   -   -   -   -) Tj T*  T* (                 ----- ------- ------------------------------------------------) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (            X VALID X) Tj T* (                 ----- ------- ------------------------------------------------) Tj T* (                       -------) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (_STB        |       |) Tj T* (                 -----         ------------------------------------------------) Tj T* (                           ---) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (_ACK            |   |) Tj T* (                 ---------     ------------------------------------------------) Tj T*  T* ET
1854 
Q
1855 
Q
1856 
Q
1857 
Q
1858 
Q
1859 
 
1860 
endstream
1861 
endobj
1862 
% 'R30': class PDFStream
1863 
30 0 obj
1864 
% page stream
1865 
<< /Length 4895 >>
1866 
stream
1867 
1 0 0 1 0 0 cm  BT /F1 12 Tf 14.4 TL ET
1868 
q
1869 
1 0 0 1 62.69291 462.9516 cm
1870 
q
1871 
q
1872 
.96447 0 0 .96447 0 0 cm
1873 
q
1874 
1 0 0 1 6.6 6.843137 cm
1875 
q
1876 
.662745 .662745 .662745 RG
1877 
.5 w
1878 
.960784 .960784 .862745 rg
1879 
n -6 -6 486 312 re B*
1880 
Q
1881 
q
1882 
BT 1 0 0 1 0 290 Tm 12 TL /F3 10 Tf 0 0 0 rg  T* (                       ^^^^ RX adds wait states) Tj T*  T* (                           ^^^^  Data transfers) Tj T*  T* (RST) Tj T* (                 --------------------------------------------------------------) Tj T* (                   -   -   -   -   -   -   -   -   -   -   -   -   -   -   -) Tj T* ( CLK              | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |) Tj T* (                 -   -   -   -   -   -   -   -   -   -   -   -   -   -   -   -) Tj T*  T* (                 ----- ------- ------------------------------------------------) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (            X VALID X) Tj T* (                 ----- ------- ------------------------------------------------) Tj T* (                           ---) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (_STB            |   |) Tj T* (                 ---------     ------------------------------------------------) Tj T* (                       -------) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (_ACK        |       |) Tj T* (                 -----         ------------------------------------------------) Tj T*  T*  T* (                       ^^^^ TX adds wait states) Tj T*  T* (                           ^^^^  Data transfers) Tj T* ET
1883 
Q
1884 
Q
1885 
Q
1886 
Q
1887 
Q
1888 
q
1889 
1 0 0 1 62.69291 448.9516 cm
1890 
Q
1891 
q
1892 
1 0 0 1 62.69291 448.9516 cm
1893 
Q
1894 
q
1895 
1 0 0 1 62.69291 436.9516 cm
1896 
 
1897 
BT /F1 10 Tf 12 TL ET
1898 
q
1899 
1 0 0 1 6 -3 cm
1900 
q
1901 
 
1902 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1903 
Q
1904 
Q
1905 
q
1906 
1 0 0 1 23 -3 cm
1907 
q
1908 
 
1909 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Both the transmitter and receiver may commence a new transaction without inserting any wait states.) Tj T* ET
1910 
Q
1911 
Q
1912 
q
1913 
Q
1914 
Q
1915 
q
1916 
1 0 0 1 62.69291 436.9516 cm
1917 
Q
1918 
q
1919 
1 0 0 1 62.69291 198.6952 cm
1920 
q
1921 
q
1922 
.868237 0 0 .868237 0 0 cm
1923 
q
1924 
1 0 0 1 6.6 7.601613 cm
1925 
q
1926 
.662745 .662745 .662745 RG
1927 
.5 w
1928 
.960784 .960784 .862745 rg
1929 
n -6 -6 540 264 re B*
1930 
Q
1931 
q
1932 
BT 1 0 0 1 0 242 Tm 12 TL /F3 10 Tf 0 0 0 rg (RST) Tj T* (                 --------------------------------------------------------------) Tj T* (                   -   -   -   -   -   -   -   -   -   -   -   -   -   -   -) Tj T* ( CLK              | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |) Tj T* (                 -   -   -   -   -   -   -   -   -   -   -   -   -   -   -   -) Tj T*  T* (                 ----- ------- ---- ---- --------------------------------------) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (            X D0    X D1 X D2 X) Tj T* (                 ----- ------- ---- ---- --------------------------------------) Tj T* (                           -------------) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (_STB            |             |) Tj T* (                 ---------               --------------------------------------) Tj T* (                       -----------------) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (_ACK        |                 |) Tj T* (                 -----                   --------------------------------------) Tj T*  T* (                        ^^^^ TX adds wait states) Tj T*  T* (                             ^^^^  Data transfers) Tj T*  T* (                                 ^^^^ STB and ACK needn't return to 0 between data words) Tj T* ET
1933 
Q
1934 
Q
1935 
Q
1936 
Q
1937 
Q
1938 
q
1939 
1 0 0 1 62.69291 184.6952 cm
1940 
Q
1941 
q
1942 
1 0 0 1 62.69291 184.6952 cm
1943 
Q
1944 
q
1945 
1 0 0 1 62.69291 160.6952 cm
1946 
 
1947 
BT /F1 10 Tf 12 TL ET
1948 
q
1949 
1 0 0 1 6 9 cm
1950 
q
1951 
 
1952 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1953 
Q
1954 
Q
1955 
q
1956 
1 0 0 1 23 -3 cm
1957 
q
1958 
 
1959 
BT 1 0 0 1 0 14 Tm /F1 10 Tf 12 TL .483984 Tw (The receiver may delay a transaction by inserting wait states until the transmitter indicates that data) Tj T* 0 Tw (is available.) Tj T* ET
1960 
Q
1961 
Q
1962 
q
1963 
Q
1964 
Q
1965 
q
1966 
1 0 0 1 62.69291 154.6952 cm
1967 
Q
1968 
q
1969 
1 0 0 1 62.69291 130.6952 cm
1970 
 
1971 
BT /F1 10 Tf 12 TL ET
1972 
q
1973 
1 0 0 1 6 9 cm
1974 
q
1975 
 
1976 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
1977 
Q
1978 
Q
1979 
q
1980 
1 0 0 1 23 -3 cm
1981 
q
1982 
 
1983 
BT 1 0 0 1 0 14 Tm /F1 10 Tf 12 TL 1.496235 Tw (The transmitter shall not delay a transaction by inserting wait states until the receiver is ready to) Tj T* 0 Tw (accept data.) Tj T* ET
1984 
Q
1985 
Q
1986 
q
1987 
Q
1988 
Q
1989 
q
1990 
1 0 0 1 62.69291 124.6952 cm
1991 
Q
1992 
q
1993 
1 0 0 1 62.69291 100.6952 cm
1994 
 
1995 
BT /F1 10 Tf 12 TL ET
1996 
q
1997 
1 0 0 1 6 9 cm
1998 
q
1999 
 
2000 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
2001 
Q
2002 
Q
2003 
q
2004 
1 0 0 1 23 -3 cm
2005 
q
2006 
 
2007 
BT 1 0 0 1 0 14 Tm /F1 10 Tf 12 TL .853984 Tw (Deadlock would occur if both the transmitter and receiver delayed a transaction until the other was) Tj T* 0 Tw (ready.) Tj T* ET
2008 
Q
2009 
Q
2010 
q
2011 
Q
2012 
Q
2013 
q
2014 
1 0 0 1 62.69291 100.6952 cm
2015 
Q
2016 
 
2017 
endstream
2018 
endobj
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