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[/] [tcp_socket/] [trunk/] [chips2/] [c2verilog] - Blame information for rev 2

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Line No. Rev Author Line
1 2 jondawson
#!/usr/bin/env python
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"""A C to Verilog compiler - Command line interface"""
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__author__ = "Jon Dawson"
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__copyright__ = "Copyright (C) 2012, Jonathan P Dawson"
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__version__ = "0.1"
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import sys
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import os
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from chips.compiler.compiler import comp
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if len(sys.argv) < 2 or "help" in sys.argv or "h" in sys.argv:
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    print "Usage: c2verilog.py [options] "
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    print
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    print "compile options:"
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    print "  no_reuse      : prevent register resuse"
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    print "  no_concurrent : prevent concurrency"
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    print "  no_initialize_memory : don't initialize memory"
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    print "  speed : optimize for speed (defaults to area)"
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    print
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    print "tool options:"
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    print "  iverilog      : compiles using the icarus verilog compiler"
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    print "  run           : runs compiled code, used with ghdl or modelsimoptions"
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    sys.exit(-1)
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input_file = sys.argv[-1]
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options = sys.argv[1:-1]
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name, inputs, outputs, documentation = comp(input_file, options)
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#run the compiled design using the simulator of your choice.
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if "iverilog" in sys.argv:
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    import os
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    import tempfile
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    import shutil
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    verilog_file = os.path.abspath("%s.v"%name)
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    #tempdir = tempfile.mkdtemp()
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    #os.chdir(tempdir)
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    os.system("iverilog -o %s %s"%(name, verilog_file))
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    if "run" in sys.argv:
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      result = os.system("vvp %s"%name)
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      if result:
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        sys.exit(1)
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      else:
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        sys.exit(0)
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    #shutil.rmtree(tempdir)
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#Add more tools here ...

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