OpenCores
URL https://opencores.org/ocsvn/tcp_socket/tcp_socket/trunk

Subversion Repositories tcp_socket

[/] [tcp_socket/] [trunk/] [chips2/] [chips/] [compiler/] [compiler.py] - Blame information for rev 2

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 jondawson
#!/usr/bin/env python
2
"""A C to Verilog compiler"""
3
 
4
__author__ = "Jon Dawson"
5
__copyright__ = "Copyright (C) 2013, Jonathan P Dawson"
6
__version__ = "0.1"
7
 
8
import sys
9
import os
10
 
11
from chips.compiler.parser import Parser
12
from chips.compiler.exceptions import C2CHIPError
13
from chips.compiler.optimizer import parallelise
14
from chips.compiler.optimizer import cleanup_functions
15
from chips.compiler.optimizer import cleanup_registers
16
from chips.compiler.tokens import Tokens
17
from chips.compiler.verilog_speed import generate_CHIP as generate_CHIP_speed
18
from chips.compiler.verilog_area import generate_CHIP as generate_CHIP_area
19
 
20
def comp(input_file, options=[]):
21
 
22
  reuse = "no_reuse" not in options
23
  initialize_memory = "no_initialize_memory" not in options
24
 
25
  try:
26
      if "speed" not in options:
27
 
28
          #Optimize for area
29
          parser = Parser(input_file, reuse, initialize_memory)
30
          process = parser.parse_process()
31
          name = process.main.name
32
          instructions = process.generate()
33
          instructions = cleanup_functions(instructions)
34
          instructions, registers = cleanup_registers(instructions, parser.allocator.all_registers)
35
          output_file = name + ".v"
36
          output_file = open(output_file, "w")
37
          inputs, outputs = generate_CHIP_area(
38
                  input_file,
39
                  name,
40
                  instructions,
41
                  output_file,
42
                  registers,
43
                  parser.allocator.memory_size_2,
44
                  parser.allocator.memory_size_4,
45
                  initialize_memory,
46
                  parser.allocator.memory_content_2,
47
                  parser.allocator.memory_content_4)
48
          output_file.close()
49
 
50
      else:
51
 
52
          #Optimize for speed
53
          parser = Parser(input_file, reuse, initialize_memory)
54
          process = parser.parse_process()
55
          name = process.main.name
56
          instructions = process.generate()
57
          instructions = cleanup_functions(instructions)
58
          instructions, registers = cleanup_registers(instructions, parser.allocator.all_registers)
59
          if "no_concurrent" in sys.argv:
60
            frames = [[i] for i in instructions]
61
          else:
62
            frames = parallelise(instructions)
63
          output_file = name + ".v"
64
          output_file = open(output_file, "w")
65
          inputs, outputs = generate_CHIP_speed(
66
                  input_file,
67
                  name,
68
                  frames,
69
                  output_file,
70
                  registers,
71
                  parser.allocator.memory_size_2,
72
                  parser.allocator.memory_size_4,
73
                  initialize_memory,
74
                  parser.allocator.memory_content_2,
75
                  parser.allocator.memory_content_4)
76
          output_file.close()
77
 
78
  except C2CHIPError as err:
79
      print "Error in file:", err.filename, "at line:", err.lineno
80
      print err.message
81
      sys.exit(-1)
82
 
83
 
84
  return name, inputs, outputs, ""

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.