URL https://opencores.org/ocsvn/tcp_socket/tcp_socket/trunk

Subversion Repositories tcp_socket

[/] [tcp_socket/] [trunk/] [chips2/] [test_suite/] [interconnect.py] - Blame information for rev 2

Details | Compare with Previous | View Log


#!/usr/bin/env python
 
from chips.api.api import *
import sys
 
 
my_chip = Chip("interconnect")
 
wire = Wire(my_chip)
Component("producer.c")(my_chip, outputs={"z":wire})
Component("consumer.c")(my_chip, inputs={"a":wire})
 
my_chip.generate_verilog()
my_chip.generate_testbench()

Line No.	Rev	Author	Line
1	2	jondawson	`#!/usr/bin/env python`
2
3			`from chips.api.api import *`
4			`import sys`
5
6
7			`my_chip = Chip("interconnect")`
8
9			`wire = Wire(my_chip)`
10			`Component("producer.c")(my_chip, outputs={"z":wire})`
11			`Component("consumer.c")(my_chip, inputs={"a":wire})`
12
13			`my_chip.generate_verilog()`
14			`my_chip.generate_testbench()`

Browse

Tools

Subversion Repositories tcp_socket

[/] [tcp_socket/] [trunk/] [chips2/] [test_suite/] [interconnect.py] - Blame information for rev 2