URL https://opencores.org/ocsvn/tcp_socket/tcp_socket/trunk

Subversion Repositories tcp_socket

[/] [tcp_socket/] [trunk/] [xilinx_input/] [ATLYS.prj] - Blame information for rev 2

Details | Compare with Previous | View Log


verilog work "user_design.v"
verilog work "server.v"
vhdl work "../source/serial_out.vhd"
vhdl work "../source/serial_in.vhd"
vhdl work "../source/gigabit_ethernet.vhd"
vhdl work "../source/atlys.vhd"

Line No.	Rev	Author	Line
1	2	jondawson	`verilog work "user_design.v"`
2			`verilog work "server.v"`
3			`vhdl work "../source/serial_out.vhd"`
4			`vhdl work "../source/serial_in.vhd"`
5			`vhdl work "../source/gigabit_ethernet.vhd"`
6			`vhdl work "../source/atlys.vhd"`

Browse

Tools

Subversion Repositories tcp_socket

[/] [tcp_socket/] [trunk/] [xilinx_input/] [ATLYS.prj] - Blame information for rev 2